commit | 7f3c38e034fb70157562b92d0f3d632c0784a93a | [log] [tgz] |
---|---|---|
author | Paul Burton <paul.burton@imgtec.com> | Mon Apr 07 16:41:47 2014 +0100 |
committer | Tom Rini <trini@ti.com> | Fri Apr 18 10:42:30 2014 -0400 |
tree | cf49a6530090852c02dab05228ebc358de25787a | |
parent | 525059211ca56fd1223d34f03cc73b622f1a5437 [diff] |
pcnet: align rx buffers for cache invalidation The RX buffers are invalidated when a packet is received, however they were not suitably cache-line aligned. Allocate them seperately to the pcnet_priv structure and align to ARCH_DMA_MINALIGN in order to ensure suitable alignment for the cache invalidation, preventing anything else being placed in the same lines & lost. Signed-off-by: Paul Burton <paul.burton@imgtec.com>