commit | 14c3049791c80bcd8a3083b5d35311f41e570aac | [log] [tgz] |
---|---|---|
author | York Sun <yorksun@freescale.com> | Mon Mar 25 07:33:27 2013 +0000 |
committer | Andy Fleming <afleming@freescale.com> | Tue May 14 16:00:29 2013 -0500 |
tree | e2f0639298f97b9fbc2f132de878d7f28389cd83 | |
parent | d571f77691a56aad634895e688f6c2ae05337319 [diff] |
powerpc/mpc85xx: Fix PIR parsing for chassis2 The PIR parsing algorithm we used is not only for E6500. It applies to all SoCs with chassis 2. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>