ARM: socfpga: move board select into mach-socfpga/Kconfig
Switch to a more standard way of board select; put the SoC select
into arch/arm/Kconfig and move the board select menu under
arch/arm/mach-socfpga/Kconfig.
Also, consolidate SYS_BOARD, SYS_VENDOR, SYS_SOC, SYS_CONFIG_NAME.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 49bcad1..cee3126 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -619,22 +619,14 @@
select DM_SERIAL
select DM_GPIO
-config TARGET_SOCFPGA_ARRIA5
- bool "Support socfpga_arria5"
+config ARCH_SOCFPGA
+ bool "Altera SOCFPGA family"
select CPU_V7
select SUPPORT_SPL
select DM
select DM_SPI_FLASH
select DM_SPI
-config TARGET_SOCFPGA_CYCLONE5
- bool "Support socfpga_cyclone5"
- select CPU_V7
- select SUPPORT_SPL
- select DM
- select DM_SPI_FLASH
- select DM_SPI
-
config ARCH_SUNXI
bool "Support sunxi (Allwinner) SoCs"
select DM
@@ -841,6 +833,8 @@
source "arch/arm/cpu/armv7/s5pc1xx/Kconfig"
+source "arch/arm/mach-socfpga/Kconfig"
+
source "arch/arm/mach-tegra/Kconfig"
source "arch/arm/mach-uniphier/Kconfig"
@@ -863,7 +857,6 @@
source "board/Marvell/db-88f6820-gp/Kconfig"
source "board/Marvell/db-mv784mp-gp/Kconfig"
source "board/Marvell/gplugd/Kconfig"
-source "board/altera/socfpga/Kconfig"
source "board/armadeus/apf27/Kconfig"
source "board/armltd/vexpress/Kconfig"
source "board/armltd/vexpress64/Kconfig"
diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
new file mode 100644
index 0000000..204efca
--- /dev/null
+++ b/arch/arm/mach-socfpga/Kconfig
@@ -0,0 +1,27 @@
+if ARCH_SOCFPGA
+
+choice
+ prompt "Altera SOCFPGA board select"
+
+config TARGET_SOCFPGA_ARRIA5
+ bool "Altera SOCFPGA Arria V"
+
+config TARGET_SOCFPGA_CYCLONE5
+ bool "Altera SOCFPGA Cyclone V"
+
+endchoice
+
+config SYS_BOARD
+ default "socfpga"
+
+config SYS_VENDOR
+ default "altera"
+
+config SYS_SOC
+ default "socfpga"
+
+config SYS_CONFIG_NAME
+ default "socfpga_arria5" if TARGET_SOCFPGA_ARRIA5
+ default "socfpga_cyclone5" if TARGET_SOCFPGA_CYCLONE5
+
+endif