diff --git a/drivers/mmc/davinci_mmc.c b/drivers/mmc/davinci_mmc.c
index c3f7b57..ef5cd4e 100644
--- a/drivers/mmc/davinci_mmc.c
+++ b/drivers/mmc/davinci_mmc.c
@@ -32,6 +32,10 @@
 	uint input_clk;		/* Input clock to MMC controller */
 	struct gpio_desc cd_gpio;       /* Card Detect GPIO */
 	struct gpio_desc wp_gpio;       /* Write Protect GPIO */
+};
+
+struct davinci_mmc_plat
+{
 	struct mmc_config cfg;
 	struct mmc mmc;
 };
@@ -480,8 +484,9 @@
 static int davinci_mmc_probe(struct udevice *dev)
 {
 	struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
+	struct davinci_mmc_plat *plat = dev_get_platdata(dev);
 	struct davinci_mmc_priv *priv = dev_get_priv(dev);
-	struct mmc_config *cfg = &priv->cfg;
+ 	struct mmc_config *cfg = &plat->cfg;
 #ifdef CONFIG_SPL_BUILD
 	int ret;
 #endif
@@ -502,7 +507,7 @@
 	gpio_request_by_name(dev, "wp-gpios", 0, &priv->wp_gpio, GPIOD_IS_IN);
 #endif
 
-	upriv->mmc = &priv->mmc;
+	upriv->mmc = &plat->mmc;
 
 #ifdef CONFIG_SPL_BUILD
 	/*
@@ -513,7 +518,7 @@
 	 * support in SPL, hence the hard-coded base register address.
 	 */
 	priv->reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE;
-	ret = mmc_bind(dev, &priv->mmc, &priv->cfg);
+	ret = mmc_bind(dev, &plat->mmc, &plat->cfg);
 	if (ret)
 		return ret;
 #endif
@@ -523,9 +528,9 @@
 
 static int davinci_mmc_bind(struct udevice *dev)
 {
-	struct davinci_mmc_priv *priv = dev_get_priv(dev);
+	struct davinci_mmc_plat *plat = dev_get_platdata(dev);
 
-	return mmc_bind(dev, &priv->mmc, &priv->cfg);
+	return mmc_bind(dev, &plat->mmc, &plat->cfg);
 }
 
 static const struct udevice_id davinci_mmc_ids[] = {
@@ -542,6 +547,7 @@
 #endif
 	.probe = davinci_mmc_probe,
 	.ops = &davinci_mmc_ops,
+	.platdata_auto_alloc_size = sizeof(struct davinci_mmc_plat),
 	.priv_auto_alloc_size = sizeof(struct davinci_mmc_priv),
 };
 #endif