tree 158b092ab1119bcab415f46c91f5a5865db0ea1c
parent 0af3e85b7c794b7863c2c6a1441b409c7a88ce08
author Anup Patel <Anup.Patel@wdc.com> 1551082450 +0000
committer Andes <uboot@andestech.com> 1551229953 +0800

riscv: Rename cpu/qemu to cpu/generic

The QEMU CPU support under arch/riscv is pretty much generic
and works fine for SiFive Unleashed as well. In fact, there
will be quite a few RISC-V SOCs for which QEMU CPU support
will work fine.

This patch renames cpu/qemu to cpu/generic to indicate the
above fact. If there are SOC specific errata workarounds
required in cpu/generic then those can be done at runtime
in cpu/generic based on CPU vendor specific DT compatible
string.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>