commit 11b251dccc985cce294679d4f669e211fa1705ee
author Christophe Kerello <christophe.kerello@st.com> Mon Jul 09 15:32:38 2018 +0200
committer Tom Rini <trini@konsulko.com> Mon Jul 23 14:33:21 2018 -0400
tree a0a1b6f9a863c1fb626f9f7e4557d659a85070aa
parent a1a725a6ce2ac2116226d36cfa91eec413e2921d

spi: stm32_qspi: rework mode management

This patch solves quad read issue with Macronix/Micron spi nor.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>

drivers/spi/stm32_qspi.c

diff --git a/drivers/spi/stm32_qspi.c b/drivers/spi/stm32_qspi.c
index 81b8462..3b92254 100644
--- a/drivers/spi/stm32_qspi.c
+++ b/drivers/spi/stm32_qspi.c
@@ -229,21 +229,21 @@
 
 	imode = STM32_QSPI_CCR_IMODE_ONE_LINE;
 	admode = STM32_QSPI_CCR_ADMODE_ONE_LINE;
+	dmode = STM32_QSPI_CCR_DMODE_ONE_LINE;
 
-	if (mode & SPI_RX_QUAD) {
-		dmode = STM32_QSPI_CCR_DMODE_FOUR_LINE;
-		if (mode & SPI_TX_QUAD) {
-			imode = STM32_QSPI_CCR_IMODE_FOUR_LINE;
-			admode = STM32_QSPI_CCR_ADMODE_FOUR_LINE;
-		}
-	} else if (mode & SPI_RX_DUAL) {
-		dmode = STM32_QSPI_CCR_DMODE_TWO_LINE;
-		if (mode & SPI_TX_DUAL) {
-			imode = STM32_QSPI_CCR_IMODE_TWO_LINE;
-			admode = STM32_QSPI_CCR_ADMODE_TWO_LINE;
+	if ((priv->command & CMD_HAS_ADR) && (priv->command & CMD_HAS_DATA)) {
+		if (fmode == STM32_QSPI_CCR_IND_WRITE) {
+			if (mode & SPI_TX_QUAD)
+				dmode = STM32_QSPI_CCR_DMODE_FOUR_LINE;
+			else if (mode & SPI_TX_DUAL)
+				dmode = STM32_QSPI_CCR_DMODE_TWO_LINE;
+		} else if ((fmode == STM32_QSPI_CCR_MEM_MAP) ||
+			 (fmode == STM32_QSPI_CCR_IND_READ)) {
+			if (mode & SPI_RX_QUAD)
+				dmode = STM32_QSPI_CCR_DMODE_FOUR_LINE;
+			else if (mode & SPI_RX_DUAL)
+				dmode = STM32_QSPI_CCR_DMODE_TWO_LINE;
 		}
-	} else {
-		dmode = STM32_QSPI_CCR_DMODE_ONE_LINE;
 	}
 
 	if (priv->command & CMD_HAS_DATA)