am33xx evm: Update secure_emif_sdram_config during ddr init
This patch updates secure_emif_sdram_config with the
same value written to sdram_config during ddr3 initialization.
During suspend/resume, this value is copied into sdram_config.
With this, a write to sdram_config at the end of resume sequence
which triggers an init sequence can be avoided.
Without this register write in place, the DDR_RESET line goes
low for a few cycles during resume which is a violation of the
JEDEC spec.
Signed-off-by: Satyanarayana, Sandhya <sandhya.satyanarayana@ti.com>
diff --git a/arch/arm/cpu/armv7/am33xx/ddr.c b/arch/arm/cpu/armv7/am33xx/ddr.c
index cffd4ab..fd9fc4a 100644
--- a/arch/arm/cpu/armv7/am33xx/ddr.c
+++ b/arch/arm/cpu/armv7/am33xx/ddr.c
@@ -17,6 +17,7 @@
#include <asm/arch/cpu.h>
#include <asm/arch/ddr_defs.h>
+#include <asm/arch/sys_proto.h>
#include <asm/io.h>
#include <asm/emif.h>
@@ -46,8 +47,10 @@
{
writel(regs->ref_ctrl, &emif_reg->emif_sdram_ref_ctrl);
writel(regs->ref_ctrl, &emif_reg->emif_sdram_ref_ctrl_shdw);
- if (regs->zq_config)
+ if (regs->zq_config){
writel(regs->zq_config, &emif_reg->emif_zq_config);
+ writel(regs->sdram_config, &cstat->secure_emif_sdram_config);
+ }
writel(regs->sdram_config, &emif_reg->emif_sdram_config);
}
diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h b/arch/arm/include/asm/arch-am33xx/cpu.h
index de9ee91..6cfbef7 100644
--- a/arch/arm/include/asm/arch-am33xx/cpu.h
+++ b/arch/arm/include/asm/arch-am33xx/cpu.h
@@ -234,6 +234,8 @@
struct ctrl_stat {
unsigned int resv1[16];
unsigned int statusreg; /* ofset 0x40 */
+ unsigned int resv2[51];
+ unsigned int secure_emif_sdram_config; /* offset 0x0110 */
};
/* AM33XX GPIO registers */
diff --git a/arch/arm/include/asm/arch-am33xx/sys_proto.h b/arch/arm/include/asm/arch-am33xx/sys_proto.h
index 8a4b248..819ea65 100644
--- a/arch/arm/include/asm/arch-am33xx/sys_proto.h
+++ b/arch/arm/include/asm/arch-am33xx/sys_proto.h
@@ -46,6 +46,7 @@
int print_cpuinfo(void);
#endif
+extern struct ctrl_stat *cstat;
u32 get_device_type(void);
void setup_clocks_for_console(void);
void ddr_pll_config(unsigned int ddrpll_M);