| commit | 10b13c94b68575523a878edb7ce8567c0dd7ec67 | [log] [tgz] |
|---|---|---|
| author | Mark Marshall <mark.marshall@omicron.at> | Sun Sep 09 23:06:03 2012 +0000 |
| committer | Andy Fleming <afleming@freescale.com> | Mon Oct 22 03:04:27 2012 -0500 |
| tree | 6e49a326f648a59146039ba6b3c111d40a795b8a | |
| parent | 09f4c2cd58dcb34b027370d019cc9e339a220c1d [diff] |
powerpc mpc85xx: Only clear TSR:WIS in watchdog_reset. We should only write TSR_WIS to the SPRN_TSR register in reset_85xx_watchdog. The old code would cause the timer interrupt to be acknowledged when the watchdog was reset, and we would then get no more timer interrupts. This bug would affect all mpc85xx boards that have the watchdog enabled. Signed-off-by: Mark Marshall <Mark.Marshall@omicron.at> Signed-off-by: Andy Fleming <afleming@freescale.com>