commit 0fe61ce6c99d6f3dcad2a0a643d826b73e276d3d
author Matthias Weisser <weisserm@arcor.de> Wed Oct 27 16:34:38 2010 +0200
committer Stefano Babic <sbabic@denx.de> Thu Oct 28 10:32:21 2010 +0200
tree b6c747f51a5ff896e3950d976cd4a0515668c896
parent 4893625266096b7925e4f7ee1d9aad81ea364029

imx25: Fix reset

This patch fixes the reset command on imx25. The watchdog registers are 16
bits in size and not 32. This patch also adds the service register codes as
constants.

Signed-off-by: Matthias Weisser <weisserm@arcor.de>

arch/arm/cpu/arm926ejs/mx25/reset.c

diff --git a/arch/arm/cpu/arm926ejs/mx25/reset.c b/arch/arm/cpu/arm926ejs/mx25/reset.c
index 1e33150..1a43683 100644
--- a/arch/arm/cpu/arm926ejs/mx25/reset.c
+++ b/arch/arm/cpu/arm926ejs/mx25/reset.c
@@ -43,14 +43,14 @@
 {
 	struct wdog_regs *regs = (struct wdog_regs *)IMX_WDT_BASE;
 	/* Disable watchdog and set Time-Out field to 0 */
-	writel (0x00000000, &regs->wcr);
+	writew(0, &regs->wcr);
 
 	/* Write Service Sequence */
-	writel (0x00005555, &regs->wsr);
-	writel (0x0000AAAA, &regs->wsr);
+	writew(WSR_UNLOCK1, &regs->wsr);
+	writew(WSR_UNLOCK2, &regs->wsr);
 
 	/* Enable watchdog */
-	writel (WCR_WDE, &regs->wcr);
+	writew(WCR_WDE, &regs->wcr);
 
 	while (1) ;
 }

arch/arm/include/asm/arch-mx25/imx-regs.h

diff --git a/arch/arm/include/asm/arch-mx25/imx-regs.h b/arch/arm/include/asm/arch-mx25/imx-regs.h
index f709bd8..f5a2929 100644
--- a/arch/arm/include/asm/arch-mx25/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx25/imx-regs.h
@@ -108,11 +108,11 @@
 
 /* Watchdog Timer (WDOG) registers */
 struct wdog_regs {
-	u32 wcr;	/* Control */
-	u32 wsr;	/* Service */
-	u32 wrsr;	/* Reset Status */
-	u32 wicr;	/* Interrupt Control */
-	u32 wmcr;	/* Misc Control */
+	u16 wcr;	/* Control */
+	u16 wsr;	/* Service */
+	u16 wrsr;	/* Reset Status */
+	u16 wicr;	/* Interrupt Control */
+	u16 wmcr;	/* Misc Control */
 };
 
 /* IIM control registers */
@@ -308,7 +308,9 @@
 #define GPT_CTRL_TEN		1		/* Timer enable	*/
 
 /* WDOG enable */
-#define WCR_WDE 0x04
+#define WCR_WDE 		0x04
+#define WSR_UNLOCK1		0x5555
+#define WSR_UNLOCK2		0xAAAA
 
 /* FUSE bank offsets */
 #define IIM0_MAC		0x1a