| commit | 0e860dd86df4d2f208c0726f86170c0b6195ed81 | [log] [tgz] |
|---|---|---|
| author | Tom Rini <trini@ti.com> | Fri Nov 18 12:48:04 2011 +0000 |
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | Tue Dec 06 23:59:38 2011 +0100 |
| tree | 6f21533bfe62196777c60c117daf2dd4ed75f342 | |
| parent | 5b5e5760c7a89a380a651a1b8b215c971a642c95 [diff] |
OMAP3: Add optimal SDRC autorefresh control values This adds the optimal SDRC autorefresh control register values for 100Mhz, 133MHz, 165MHz and 200MHz clocks. We switch to using this to provide the default 165MHz value. Signed-off-by: Tom Rini <trini@ti.com>