Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-tegra
- Add support for Jetson Nano, plus miscellaneous other fixes found
during Nano bringup.
- Add Igor's update_uboot wrapper patches.
diff --git a/Kconfig b/Kconfig
index b4864cd..f698e0a 100644
--- a/Kconfig
+++ b/Kconfig
@@ -299,6 +299,11 @@
pointer values - up to 'MAX_ERRNO' bytes below this value must be
unused/invalid addresses.
+config PLATFORM_ELFENTRY
+ string
+ default "__start" if MIPS
+ default "_start"
+
endmenu # General setup
menu "Boot images"
diff --git a/Makefile b/Makefile
index 7fae3c2..0db44d4 100644
--- a/Makefile
+++ b/Makefile
@@ -1647,18 +1647,17 @@
u-boot-img-spl-at-end.bin: u-boot.img spl/u-boot-spl.bin FORCE
$(call if_changed,pad_cat)
-# Create a new ELF from a raw binary file.
-ifndef PLATFORM_ELFENTRY
- PLATFORM_ELFENTRY = "_start"
-endif
quiet_cmd_u-boot-elf ?= LD $@
cmd_u-boot-elf ?= $(LD) u-boot-elf.o -o $@ \
- --defsym=$(PLATFORM_ELFENTRY)=$(CONFIG_SYS_TEXT_BASE) \
+ -T u-boot-elf.lds --defsym=$(CONFIG_PLATFORM_ELFENTRY)=$(CONFIG_SYS_TEXT_BASE) \
-Ttext=$(CONFIG_SYS_TEXT_BASE)
-u-boot.elf: u-boot.bin
+u-boot.elf: u-boot.bin u-boot-elf.lds
$(Q)$(OBJCOPY) -I binary $(PLATFORM_ELFFLAGS) $< u-boot-elf.o
$(call if_changed,u-boot-elf)
+u-boot-elf.lds: arch/u-boot-elf.lds prepare FORCE
+ $(call if_changed_dep,cpp_lds)
+
# MediaTek's ARM-based u-boot needs a header to contains its load address
# which is parsed by the BootROM.
# If the SPL build is enabled, the header will be added to the spl binary,
diff --git a/arch/arm/include/asm/arch-rockchip/vop_rk3288.h b/arch/arm/include/asm/arch-rockchip/vop_rk3288.h
index 8398249..872a158 100644
--- a/arch/arm/include/asm/arch-rockchip/vop_rk3288.h
+++ b/arch/arm/include/asm/arch-rockchip/vop_rk3288.h
@@ -85,8 +85,18 @@
LB_RGB_1280X8 = 0x5
};
+#if defined(CONFIG_ROCKCHIP_RK3399)
enum vop_modes {
VOP_MODE_EDP = 0,
+ VOP_MODE_MIPI,
+ VOP_MODE_HDMI,
+ VOP_MODE_MIPI1,
+ VOP_MODE_DP,
+ VOP_MODE_NONE,
+};
+#else
+enum vop_modes {
+ VOP_MODE_EDP = 0,
VOP_MODE_HDMI,
VOP_MODE_LVDS,
VOP_MODE_MIPI,
@@ -94,6 +104,7 @@
VOP_MODE_AUTO_DETECT,
VOP_MODE_UNKNOWN,
};
+#endif
/* VOP_VERSION_INFO */
#define M_FPGA_VERSION (0xffff << 16)
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index ed7514a..0cb1f23 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -229,6 +229,7 @@
select DM_PMIC
select DM_REGULATOR_FIXED
select BOARD_LATE_INIT
+ imply PRE_CONSOLE_BUFFER
imply ROCKCHIP_COMMON_BOARD
imply ROCKCHIP_SDRAM_COMMON
imply SPL_ROCKCHIP_COMMON_BOARD
diff --git a/arch/arm/mach-snapdragon/misc.c b/arch/arm/mach-snapdragon/misc.c
index f6c8786..aaa561c 100644
--- a/arch/arm/mach-snapdragon/misc.c
+++ b/arch/arm/mach-snapdragon/misc.c
@@ -41,7 +41,7 @@
int i;
char sn[9];
- snprintf(sn, 8, "%08x", msm_board_serial());
+ snprintf(sn, 9, "%08x", msm_board_serial());
/* fill in the mac with serialno, use locally adminstrated pool */
mac[0] = 0x02;
diff --git a/arch/mips/config.mk b/arch/mips/config.mk
index 9d3a845..527fd6a 100644
--- a/arch/mips/config.mk
+++ b/arch/mips/config.mk
@@ -36,7 +36,6 @@
endif
PLATFORM_CPPFLAGS += -D__MIPS__
-PLATFORM_ELFENTRY = "__start"
PLATFORM_ELFFLAGS += -B mips $(OBJCOPYFLAGS)
#
diff --git a/arch/u-boot-elf.lds b/arch/u-boot-elf.lds
new file mode 100644
index 0000000..1666027
--- /dev/null
+++ b/arch/u-boot-elf.lds
@@ -0,0 +1,9 @@
+ENTRY(CONFIG_PLATFORM_ELFENTRY)
+SECTIONS
+{
+ . = CONFIG_PLATFORM_ELFENTRY;
+
+ .data : {
+ *(.data*)
+ }
+}
diff --git a/common/Kconfig b/common/Kconfig
index 46e4193..bd35de3 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -568,6 +568,7 @@
default 0x2f000000 if ARCH_SUNXI && MACH_SUN9I
default 0x4f000000 if ARCH_SUNXI && !MACH_SUN9I
default 0x0f000000 if ROCKCHIP_RK3288
+ default 0x0f200000 if ROCKCHIP_RK3399
help
This sets the start address of the pre-console buffer. This must
be in available memory and is accessed before relocation and
diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index aef1dbd..69dabd2 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -646,10 +646,6 @@
if (!spl_fit_image_get_os(fit, node, &os_type))
debug("Loadable is %s\n", genimg_get_os_name(os_type));
-#if CONFIG_IS_ENABLED(FIT_IMAGE_TINY)
- else
- os_type = IH_OS_U_BOOT;
-#endif
if (os_type == IH_OS_U_BOOT) {
spl_fit_append_fdt(&image_info, info, sector,
diff --git a/configs/nanopc-t4-rk3399_defconfig b/configs/nanopc-t4-rk3399_defconfig
index 9ea9b11..607a00d 100644
--- a/configs/nanopc-t4-rk3399_defconfig
+++ b/configs/nanopc-t4-rk3399_defconfig
@@ -52,5 +52,12 @@
CONFIG_USB_ETHER_MCS7830=y
CONFIG_USB_ETHER_RTL8152=y
CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_USB_KEYBOARD=y
CONFIG_SPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y
+CONFIG_DM_VIDEO=y
+CONFIG_VIDEO_BPP16=y
+CONFIG_VIDEO_BPP32=y
+CONFIG_DISPLAY=y
+CONFIG_VIDEO_ROCKCHIP=y
+CONFIG_DISPLAY_ROCKCHIP_HDMI=y
diff --git a/configs/nanopi-m4-rk3399_defconfig b/configs/nanopi-m4-rk3399_defconfig
index ad0e808..3fcb7ac 100644
--- a/configs/nanopi-m4-rk3399_defconfig
+++ b/configs/nanopi-m4-rk3399_defconfig
@@ -52,5 +52,12 @@
CONFIG_USB_ETHER_MCS7830=y
CONFIG_USB_ETHER_RTL8152=y
CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_USB_KEYBOARD=y
CONFIG_SPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y
+CONFIG_DM_VIDEO=y
+CONFIG_VIDEO_BPP16=y
+CONFIG_VIDEO_BPP32=y
+CONFIG_DISPLAY=y
+CONFIG_VIDEO_ROCKCHIP=y
+CONFIG_DISPLAY_ROCKCHIP_HDMI=y
diff --git a/configs/nanopi-neo4-rk3399_defconfig b/configs/nanopi-neo4-rk3399_defconfig
index d038a8c..b9ea535 100644
--- a/configs/nanopi-neo4-rk3399_defconfig
+++ b/configs/nanopi-neo4-rk3399_defconfig
@@ -52,5 +52,12 @@
CONFIG_USB_ETHER_MCS7830=y
CONFIG_USB_ETHER_RTL8152=y
CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_USB_KEYBOARD=y
CONFIG_SPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y
+CONFIG_DM_VIDEO=y
+CONFIG_VIDEO_BPP16=y
+CONFIG_VIDEO_BPP32=y
+CONFIG_DISPLAY=y
+CONFIG_VIDEO_ROCKCHIP=y
+CONFIG_DISPLAY_ROCKCHIP_HDMI=y
diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig
index d540a17..be76524 100644
--- a/configs/roc-pc-rk3399_defconfig
+++ b/configs/roc-pc-rk3399_defconfig
@@ -59,3 +59,9 @@
CONFIG_USB_KEYBOARD=y
CONFIG_SPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y
+CONFIG_DM_VIDEO=y
+CONFIG_VIDEO_BPP16=y
+CONFIG_VIDEO_BPP32=y
+CONFIG_DISPLAY=y
+CONFIG_VIDEO_ROCKCHIP=y
+CONFIG_DISPLAY_ROCKCHIP_HDMI=y
diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig
index ba4226e..c4e9547 100644
--- a/configs/rock960-rk3399_defconfig
+++ b/configs/rock960-rk3399_defconfig
@@ -58,5 +58,12 @@
CONFIG_USB_ETHER_MCS7830=y
CONFIG_USB_ETHER_RTL8152=y
CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_USB_KEYBOARD=y
CONFIG_SPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y
+CONFIG_DM_VIDEO=y
+CONFIG_VIDEO_BPP16=y
+CONFIG_VIDEO_BPP32=y
+CONFIG_DISPLAY=y
+CONFIG_VIDEO_ROCKCHIP=y
+CONFIG_DISPLAY_ROCKCHIP_HDMI=y
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 865b80c..1f62376 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -994,6 +994,13 @@
case DCLK_VOP1:
ret = rk3399_vop_set_clk(priv->cru, clk->id, rate);
break;
+ case ACLK_VOP1:
+ case HCLK_VOP1:
+ /**
+ * assigned-clocks handling won't require for vopl, so
+ * return 0 to satisfy clk_set_defaults during device probe.
+ */
+ return 0;
case SCLK_DDRCLK:
ret = rk3399_ddr_set_clk(priv->cru, rate);
break;
diff --git a/drivers/spi/atmel-quadspi.c b/drivers/spi/atmel-quadspi.c
index a09bf88..a6c3939 100644
--- a/drivers/spi/atmel-quadspi.c
+++ b/drivers/spi/atmel-quadspi.c
@@ -146,7 +146,9 @@
struct atmel_qspi {
void __iomem *regs;
void __iomem *mem;
+ resource_size_t mmap_size;
const struct atmel_qspi_caps *caps;
+ struct udevice *dev;
ulong bus_clk_rate;
u32 mr;
};
@@ -168,6 +170,81 @@
{ 4, 4, 4, QSPI_IFR_WIDTH_QUAD_CMD },
};
+#ifdef VERBOSE_DEBUG
+static const char *atmel_qspi_reg_name(u32 offset, char *tmp, size_t sz)
+{
+ switch (offset) {
+ case QSPI_CR:
+ return "CR";
+ case QSPI_MR:
+ return "MR";
+ case QSPI_RD:
+ return "MR";
+ case QSPI_TD:
+ return "TD";
+ case QSPI_SR:
+ return "SR";
+ case QSPI_IER:
+ return "IER";
+ case QSPI_IDR:
+ return "IDR";
+ case QSPI_IMR:
+ return "IMR";
+ case QSPI_SCR:
+ return "SCR";
+ case QSPI_IAR:
+ return "IAR";
+ case QSPI_ICR:
+ return "ICR/WICR";
+ case QSPI_IFR:
+ return "IFR";
+ case QSPI_RICR:
+ return "RICR";
+ case QSPI_SMR:
+ return "SMR";
+ case QSPI_SKR:
+ return "SKR";
+ case QSPI_WPMR:
+ return "WPMR";
+ case QSPI_WPSR:
+ return "WPSR";
+ case QSPI_VERSION:
+ return "VERSION";
+ default:
+ snprintf(tmp, sz, "0x%02x", offset);
+ break;
+ }
+
+ return tmp;
+}
+#endif /* VERBOSE_DEBUG */
+
+static u32 atmel_qspi_read(struct atmel_qspi *aq, u32 offset)
+{
+ u32 value = readl(aq->regs + offset);
+
+#ifdef VERBOSE_DEBUG
+ char tmp[16];
+
+ dev_vdbg(aq->dev, "read 0x%08x from %s\n", value,
+ atmel_qspi_reg_name(offset, tmp, sizeof(tmp)));
+#endif /* VERBOSE_DEBUG */
+
+ return value;
+}
+
+static void atmel_qspi_write(u32 value, struct atmel_qspi *aq, u32 offset)
+{
+#ifdef VERBOSE_DEBUG
+ char tmp[16];
+
+ dev_vdbg(aq->dev, "write 0x%08x into %s\n", value,
+ atmel_qspi_reg_name(offset, tmp, sizeof(tmp)));
+#endif /* VERBOSE_DEBUG */
+
+ writel(value, aq->regs + offset);
+}
+
static inline bool atmel_qspi_is_compatible(const struct spi_mem_op *op,
const struct atmel_qspi_mode *mode)
{
@@ -288,32 +365,32 @@
* Serial Memory Mode (SMM).
*/
if (aq->mr != QSPI_MR_SMM) {
- writel(QSPI_MR_SMM, aq->regs + QSPI_MR);
+ atmel_qspi_write(QSPI_MR_SMM, aq, QSPI_MR);
aq->mr = QSPI_MR_SMM;
}
/* Clear pending interrupts */
- (void)readl(aq->regs + QSPI_SR);
+ (void)atmel_qspi_read(aq, QSPI_SR);
if (aq->caps->has_ricr) {
if (!op->addr.nbytes && op->data.dir == SPI_MEM_DATA_IN)
ifr |= QSPI_IFR_APBTFRTYP_READ;
/* Set QSPI Instruction Frame registers */
- writel(iar, aq->regs + QSPI_IAR);
+ atmel_qspi_write(iar, aq, QSPI_IAR);
if (op->data.dir == SPI_MEM_DATA_IN)
- writel(icr, aq->regs + QSPI_RICR);
+ atmel_qspi_write(icr, aq, QSPI_RICR);
else
- writel(icr, aq->regs + QSPI_WICR);
- writel(ifr, aq->regs + QSPI_IFR);
+ atmel_qspi_write(icr, aq, QSPI_WICR);
+ atmel_qspi_write(ifr, aq, QSPI_IFR);
} else {
if (op->data.dir == SPI_MEM_DATA_OUT)
ifr |= QSPI_IFR_SAMA5D2_WRITE_TRSFR;
/* Set QSPI Instruction Frame registers */
- writel(iar, aq->regs + QSPI_IAR);
- writel(icr, aq->regs + QSPI_ICR);
- writel(ifr, aq->regs + QSPI_IFR);
+ atmel_qspi_write(iar, aq, QSPI_IAR);
+ atmel_qspi_write(icr, aq, QSPI_ICR);
+ atmel_qspi_write(ifr, aq, QSPI_IFR);
}
return 0;
@@ -326,6 +403,14 @@
u32 sr, imr, offset;
int err;
+ /*
+ * Check if the address exceeds the MMIO window size. An improvement
+ * would be to add support for regular SPI mode and fall back to it
+ * when the flash memories overrun the controller's memory space.
+ */
+ if (op->addr.val + op->data.nbytes > aq->mmap_size)
+ return -ENOTSUPP;
+
err = atmel_qspi_set_cfg(aq, op, &offset);
if (err)
return err;
@@ -333,7 +418,7 @@
/* Skip to the final steps if there is no data */
if (op->data.nbytes) {
/* Dummy read of QSPI_IFR to synchronize APB and AHB accesses */
- (void)readl(aq->regs + QSPI_IFR);
+ (void)atmel_qspi_read(aq, QSPI_IFR);
/* Send/Receive data */
if (op->data.dir == SPI_MEM_DATA_IN)
@@ -344,7 +429,7 @@
op->data.nbytes);
/* Release the chip-select */
- writel(QSPI_CR_LASTXFER, aq->regs + QSPI_CR);
+ atmel_qspi_write(QSPI_CR_LASTXFER, aq, QSPI_CR);
}
/* Poll INSTruction End and Chip Select Rise flags. */
@@ -366,12 +451,12 @@
new_value = QSPI_SCR_SCBR(scbr);
mask = QSPI_SCR_SCBR_MASK;
- scr = readl(aq->regs + QSPI_SCR);
+ scr = atmel_qspi_read(aq, QSPI_SCR);
if ((scr & mask) == new_value)
return 0;
scr = (scr & ~mask) | new_value;
- writel(scr, aq->regs + QSPI_SCR);
+ atmel_qspi_write(scr, aq, QSPI_SCR);
return 0;
}
@@ -388,12 +473,12 @@
mask = QSPI_SCR_CPOL | QSPI_SCR_CPHA;
- scr = readl(aq->regs + QSPI_SCR);
+ scr = atmel_qspi_read(aq, QSPI_SCR);
if ((scr & mask) == new_value)
return 0;
scr = (scr & ~mask) | new_value;
- writel(scr, aq->regs + QSPI_SCR);
+ atmel_qspi_write(scr, aq, QSPI_SCR);
return 0;
}
@@ -446,14 +531,14 @@
static void atmel_qspi_init(struct atmel_qspi *aq)
{
/* Reset the QSPI controller */
- writel(QSPI_CR_SWRST, aq->regs + QSPI_CR);
+ atmel_qspi_write(QSPI_CR_SWRST, aq, QSPI_CR);
/* Set the QSPI controller by default in Serial Memory Mode */
- writel(QSPI_MR_SMM, aq->regs + QSPI_MR);
+ atmel_qspi_write(QSPI_MR_SMM, aq, QSPI_MR);
aq->mr = QSPI_MR_SMM;
/* Enable the QSPI controller */
- writel(QSPI_CR_QSPIEN, aq->regs + QSPI_CR);
+ atmel_qspi_write(QSPI_CR_QSPIEN, aq, QSPI_CR);
}
static int atmel_qspi_probe(struct udevice *dev)
@@ -490,10 +575,14 @@
if (IS_ERR(aq->mem))
return PTR_ERR(aq->mem);
+ aq->mmap_size = resource_size(&res);
+
ret = atmel_qspi_enable_clk(dev);
if (ret)
return ret;
+ aq->dev = dev;
+
atmel_qspi_init(aq);
return 0;
diff --git a/drivers/video/rockchip/Kconfig b/drivers/video/rockchip/Kconfig
index 10182d0..cfd774e 100644
--- a/drivers/video/rockchip/Kconfig
+++ b/drivers/video/rockchip/Kconfig
@@ -22,6 +22,7 @@
config VIDEO_ROCKCHIP_MAX_XRES
int "Maximum horizontal resolution (for memory allocation purposes)"
depends on VIDEO_ROCKCHIP
+ default 3480 if ROCKCHIP_RK3399 && DISPLAY_ROCKCHIP_HDMI
default 1920
help
The maximum horizontal resolution to support for the framebuffer.
@@ -31,6 +32,7 @@
config VIDEO_ROCKCHIP_MAX_YRES
int "Maximum vertical resolution (for memory allocation purposes)"
depends on VIDEO_ROCKCHIP
+ default 2160 if ROCKCHIP_RK3399 && DISPLAY_ROCKCHIP_HDMI
default 1080
help
The maximum vertical resolution to support for the framebuffer.
diff --git a/drivers/video/rockchip/rk3399_vop.c b/drivers/video/rockchip/rk3399_vop.c
index 81c122d..1d5b393 100644
--- a/drivers/video/rockchip/rk3399_vop.c
+++ b/drivers/video/rockchip/rk3399_vop.c
@@ -45,8 +45,6 @@
V_RK3399_DSP_MIPI_POL(polarity));
break;
- case VOP_MODE_LVDS:
- /* The RK3399 has neither parallel RGB nor LVDS output. */
default:
debug("%s: unsupported output mode %x\n", __func__, mode);
}
diff --git a/drivers/video/rockchip/rk_vop.c b/drivers/video/rockchip/rk_vop.c
index e91d4df..e1bd656 100644
--- a/drivers/video/rockchip/rk_vop.c
+++ b/drivers/video/rockchip/rk_vop.c
@@ -118,10 +118,12 @@
V_EDP_OUT_EN(1));
break;
+#if defined(CONFIG_ROCKCHIP_RK3288)
case VOP_MODE_LVDS:
clrsetbits_le32(®s->sys_ctrl, M_ALL_OUT_EN,
V_RGB_OUT_EN(1));
break;
+#endif
case VOP_MODE_MIPI:
clrsetbits_le32(®s->sys_ctrl, M_ALL_OUT_EN,
@@ -313,7 +315,9 @@
/* Set bitwidth for vop display according to vop mode */
switch (vop_id) {
case VOP_MODE_EDP:
+#if defined(CONFIG_ROCKCHIP_RK3288)
case VOP_MODE_LVDS:
+#endif
l2bpp = VIDEO_BPP16;
break;
case VOP_MODE_HDMI:
diff --git a/include/configs/evb_rk3399.h b/include/configs/evb_rk3399.h
index c0b0358..2d3db22 100644
--- a/include/configs/evb_rk3399.h
+++ b/include/configs/evb_rk3399.h
@@ -6,6 +6,11 @@
#ifndef __EVB_RK3399_H
#define __EVB_RK3399_H
+#define ROCKCHIP_DEVICE_SETTINGS \
+ "stdin=serial,usbkbd\0" \
+ "stdout=serial,vidconsole\0" \
+ "stderr=serial,vidconsole\0"
+
#include <configs/rk3399_common.h>
#if defined(CONFIG_ENV_IS_IN_MMC)
diff --git a/include/configs/rock960_rk3399.h b/include/configs/rock960_rk3399.h
index 746d24c..304ad2b 100644
--- a/include/configs/rock960_rk3399.h
+++ b/include/configs/rock960_rk3399.h
@@ -6,6 +6,11 @@
#ifndef __ROCK960_RK3399_H
#define __ROCK960_RK3399_H
+#define ROCKCHIP_DEVICE_SETTINGS \
+ "stdin=serial,usbkbd\0" \
+ "stdout=serial,vidconsole\0" \
+ "stderr=serial,vidconsole\0"
+
#include <configs/rk3399_common.h>
#define CONFIG_SYS_MMC_ENV_DEV 1