83xx/85xx/86xx: LBC register cleanup
Currently, 83xx, 86xx, and 85xx have a lot of duplicated code
dedicated to defining and manipulating the LBC registers. Merge
this into a single spot.
To do this, we have to decide on a common name for the data structure
that holds the lbc registers - it will now be known as fsl_lbc_t, and we
adopt a common name for the immap layouts that include the lbc - this was
previously known as either im_lbc or lbus; use the former.
In addition, create accessors for the BR/OR regs that use in/out_be32
and use those instead of the mismash of access methods currently in play.
I have done a successful ppc build all and tested a board or two from
each processor family.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
diff --git a/board/tqc/tqm834x/tqm834x.c b/board/tqc/tqm834x/tqm834x.c
index e564879..8d046f4 100644
--- a/board/tqc/tqm834x/tqm834x.c
+++ b/board/tqc/tqm834x/tqm834x.c
@@ -253,10 +253,10 @@
debug("Number of flash banks detected: %d\n", tqm834x_num_flash_banks);
/* set OR0 and BR0 */
- im->lbus.bank[0].or = CONFIG_SYS_OR_TIMING_FLASH |
- (-(total_size) & OR_GPCM_AM);
- im->lbus.bank[0].br = (CONFIG_SYS_FLASH_BASE & BR_BA) |
- (BR_MS_GPCM | BR_PS_32 | BR_V);
+ set_lbc_or(0, CONFIG_SYS_OR_TIMING_FLASH |
+ (-(total_size) & OR_GPCM_AM));
+ set_lbc_br(0, (CONFIG_SYS_FLASH_BASE & BR_BA) |
+ (BR_MS_GPCM | BR_PS_32 | BR_V));
return (0);
}