commit | 0cb3112526860f97990b0e0901f83e352f1112db | [log] [tgz] |
---|---|---|
author | Jagan Teki <jagan@amarulasolutions.com> | Tue Jul 16 17:27:24 2019 +0530 |
committer | Kever Yang <kever.yang@rock-chips.com> | Sat Jul 20 23:59:44 2019 +0800 |
tree | 45e1bf51b45e76cb67291b25057d41ae920f4188 | |
parent | c7ffdb749548e4b4c7f4c866599dedce40e0eb85 [diff] |
ram: rk3399: Configure soc odt support CTL 145, 146, 159, 160 registers are used to configure soc odt on rk3399. These soc odt values are updated from CS0_MR22_VAL and CS1_MR22_VAL and for lpddr4 these values ORed with tsel_rd_select_n. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: YouMin Chen <cym@rock-chips.com>