x86: irq: Remove chipset specific irq router drivers

At present there are 3 irq router drivers. One is the common one
and the other two are chipset specific for queensbay and quark.
However these are really the same drivers as the core logic is
the same. The two chipset specific drivers configure some registers
that are outside the irq router block which should really be part
of the chipset initialization.

Now we remove these specific drivers and make all x86 boards use
the common one.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
diff --git a/arch/x86/cpu/quark/Makefile b/arch/x86/cpu/quark/Makefile
index 476e37c..7039f8b 100644
--- a/arch/x86/cpu/quark/Makefile
+++ b/arch/x86/cpu/quark/Makefile
@@ -2,6 +2,6 @@
 #
 # Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
 
-obj-y += car.o dram.o irq.o msg_port.o quark.o
+obj-y += car.o dram.o msg_port.o quark.o
 obj-y += mrc.o mrc_util.o hte.o smc.o
 obj-$(CONFIG_GENERATE_ACPI_TABLE) += acpi.o
diff --git a/arch/x86/cpu/quark/irq.c b/arch/x86/cpu/quark/irq.c
deleted file mode 100644
index 6928c33..0000000
--- a/arch/x86/cpu/quark/irq.c
+++ /dev/null
@@ -1,48 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
- * Copyright (C) 2015 Google, Inc
- */
-
-#include <common.h>
-#include <dm.h>
-#include <asm/irq.h>
-#include <asm/arch/device.h>
-#include <asm/arch/quark.h>
-
-int quark_irq_router_probe(struct udevice *dev)
-{
-	struct quark_rcba *rcba;
-	u32 base;
-
-	qrk_pci_read_config_dword(QUARK_LEGACY_BRIDGE, LB_RCBA, &base);
-	base &= ~MEM_BAR_EN;
-	rcba = (struct quark_rcba *)base;
-
-	/*
-	 * Route Quark PCI device interrupt pin to PIRQ
-	 *
-	 * Route device#23's INTA/B/C/D to PIRQA/B/C/D
-	 * Route device#20,21's INTA/B/C/D to PIRQE/F/G/H
-	 */
-	writew(PIRQC, &rcba->rmu_ir);
-	writew(PIRQA | (PIRQB << 4) | (PIRQC << 8) | (PIRQD << 12),
-	       &rcba->d23_ir);
-	writew(PIRQD, &rcba->core_ir);
-	writew(PIRQE | (PIRQF << 4) | (PIRQG << 8) | (PIRQH << 12),
-	       &rcba->d20d21_ir);
-
-	return irq_router_common_init(dev);
-}
-
-static const struct udevice_id quark_irq_router_ids[] = {
-	{ .compatible = "intel,quark-irq-router" },
-	{ }
-};
-
-U_BOOT_DRIVER(quark_irq_router_drv) = {
-	.name		= "quark_intel_irq",
-	.id		= UCLASS_IRQ,
-	.of_match	= quark_irq_router_ids,
-	.probe		= quark_irq_router_probe,
-};
diff --git a/arch/x86/cpu/quark/quark.c b/arch/x86/cpu/quark/quark.c
index 46141c4..4fd6864 100644
--- a/arch/x86/cpu/quark/quark.c
+++ b/arch/x86/cpu/quark/quark.c
@@ -7,6 +7,7 @@
 #include <mmc.h>
 #include <asm/io.h>
 #include <asm/ioapic.h>
+#include <asm/irq.h>
 #include <asm/mrccache.h>
 #include <asm/mtrr.h>
 #include <asm/pci.h>
@@ -313,12 +314,37 @@
 	writel((0xf << 16) | 0xf, bar + USBD_EP_INT_STS);
 }
 
+static void quark_irq_init(void)
+{
+	struct quark_rcba *rcba;
+	u32 base;
+
+	qrk_pci_read_config_dword(QUARK_LEGACY_BRIDGE, LB_RCBA, &base);
+	base &= ~MEM_BAR_EN;
+	rcba = (struct quark_rcba *)base;
+
+	/*
+	 * Route Quark PCI device interrupt pin to PIRQ
+	 *
+	 * Route device#23's INTA/B/C/D to PIRQA/B/C/D
+	 * Route device#20,21's INTA/B/C/D to PIRQE/F/G/H
+	 */
+	writew(PIRQC, &rcba->rmu_ir);
+	writew(PIRQA | (PIRQB << 4) | (PIRQC << 8) | (PIRQD << 12),
+	       &rcba->d23_ir);
+	writew(PIRQD, &rcba->core_ir);
+	writew(PIRQE | (PIRQF << 4) | (PIRQG << 8) | (PIRQH << 12),
+	       &rcba->d20d21_ir);
+}
+
 int arch_early_init_r(void)
 {
 	quark_pcie_init();
 
 	quark_usb_init();
 
+	quark_irq_init();
+
 	return 0;
 }