| commit | 0c8fcb6ef5f55beb1a714da2ca2e1a510ab1dcff | [log] [tgz] |
|---|---|---|
| author | Hou Zhiqiang <Zhiqiang.Hou@nxp.com> | Mon Jul 03 18:37:11 2017 +0800 |
| committer | York Sun <york.sun@nxp.com> | Wed Aug 09 09:57:32 2017 -0700 |
| tree | a695a2c27318a57c342f3683b92e4fbdf01854db | |
| parent | 0ce3f40897d33464ea3f6ac776497f302a1c0faf [diff] |
armv8/fsl-lsch2: correct the config description of DSPI clock divider It is derived from Platform clock instead of Platform PLL frequency. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>