commit 0b3327fc1eca554fbd8bde1c5eef9d9be9305e64
author Emanuele Ghidoli <emanuele.ghidoli@toradex.com> Wed May 15 10:00:58 2024 +0200
committer Tom Rini <trini@konsulko.com> Fri Jun 07 13:58:21 2024 -0600
tree c3c6bc1a72129cf965865389c3b926aa7f6a26ac
parent 4be6151805e4eeb77fae1225d5b3a1ed166f974d

arm: dts: k3-am625-verdin: Enable LPDDR4 WDQS control

Manually, since SysConfig tool do not have the relevant option,
set PHY_LP4_WDQS_OE_EXTEND to 1.
Since WDQS control mode is required on our modules LPDDR4,
this enables WDQS control mode 1.

Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>

arch/arm/dts/k3-am625-verdin-lpddr4-1600MTs.dtsi

diff --git a/arch/arm/dts/k3-am625-verdin-lpddr4-1600MTs.dtsi b/arch/arm/dts/k3-am625-verdin-lpddr4-1600MTs.dtsi
index ca883ae..5062447 100644
--- a/arch/arm/dts/k3-am625-verdin-lpddr4-1600MTs.dtsi
+++ b/arch/arm/dts/k3-am625-verdin-lpddr4-1600MTs.dtsi
@@ -850,7 +850,7 @@
 #define DDRSS_PHY_62_DATA 0x00000000
 #define DDRSS_PHY_63_DATA 0x00000000
 #define DDRSS_PHY_64_DATA 0x00000000
-#define DDRSS_PHY_65_DATA 0x00000004
+#define DDRSS_PHY_65_DATA 0x00000104
 #define DDRSS_PHY_66_DATA 0x00000000
 #define DDRSS_PHY_67_DATA 0x00000000
 #define DDRSS_PHY_68_DATA 0x00000000
@@ -1106,7 +1106,7 @@
 #define DDRSS_PHY_318_DATA 0x00000000
 #define DDRSS_PHY_319_DATA 0x00000000
 #define DDRSS_PHY_320_DATA 0x00000000
-#define DDRSS_PHY_321_DATA 0x00000004
+#define DDRSS_PHY_321_DATA 0x00000104
 #define DDRSS_PHY_322_DATA 0x00000000
 #define DDRSS_PHY_323_DATA 0x00000000
 #define DDRSS_PHY_324_DATA 0x00000000