doc: board: ti: j721e: Update with boot flow diagram

Update the bootflow svg diagram instead of the ascii version

Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
diff --git a/doc/board/ti/j721e_evm.rst b/doc/board/ti/j721e_evm.rst
index 637b42d..16091ac 100644
--- a/doc/board/ti/j721e_evm.rst
+++ b/doc/board/ti/j721e_evm.rst
@@ -34,96 +34,7 @@
 Boot flow is similar to that of AM65x SoC and extending it with remoteproc
 support. Below is the pictorial representation of boot flow:
 
-.. code-block:: text
-
- +------------------------------------------------------------------------+-----------------------+
- |        DMSC            |      MCU R5           |        A72            |  MAIN R5/C66x/C7x     |
- +------------------------------------------------------------------------+-----------------------+
- |    +--------+          |                       |                       |                       |
- |    |  Reset |          |                       |                       |                       |
- |    +--------+          |                       |                       |                       |
- |         :              |                       |                       |                       |
- |    +--------+          |   +-----------+       |                       |                       |
- |    | *ROM*  |----------|-->| Reset rls |       |                       |                       |
- |    +--------+          |   +-----------+       |                       |                       |
- |    |        |          |         :             |                       |                       |
- |    |  ROM   |          |         :             |                       |                       |
- |    |services|          |         :             |                       |                       |
- |    |        |          |   +-------------+     |                       |                       |
- |    |        |          |   |  *R5 ROM*   |     |                       |                       |
- |    |        |          |   +-------------+     |                       |                       |
- |    |        |<---------|---|Load and auth|     |                       |                       |
- |    |        |          |   | tiboot3.bin |     |                       |                       |
- |    |        |          |   +-------------+     |                       |                       |
- |    |        |          |         :             |                       |                       |
- |    |        |          |         :             |                       |                       |
- |    |        |          |         :             |                       |                       |
- |    |        |          |   +-------------+     |                       |                       |
- |    |        |          |   |  *R5 SPL*   |     |                       |                       |
- |    |        |          |   +-------------+     |                       |                       |
- |    |        |          |   |    Load     |     |                       |                       |
- |    |        |          |   |  sysfw.itb  |     |                       |                       |
- |    | Start  |          |   +-------------+     |                       |                       |
- |    | System |<---------|---|    Start    |     |                       |                       |
- |    |Firmware|          |   |    SYSFW    |     |                       |                       |
- |    +--------+          |   +-------------+     |                       |                       |
- |        :               |   |             |     |                       |                       |
- |    +---------+         |   |   Load      |     |                       |                       |
- |    | *SYSFW* |         |   |   system    |     |                       |                       |
- |    +---------+         |   | Config data |     |                       |                       |
- |    |         |<--------|---|             |     |                       |                       |
- |    |         |         |   +-------------+     |                       |                       |
- |    |         |         |   |    DDR      |     |                       |                       |
- |    |         |         |   |   config    |     |                       |                       |
- |    |         |         |   +-------------+     |                       |                       |
- |    |         |         |   |    Load     |     |                       |                       |
- |    |         |         |   |  tispl.bin  |     |                       |                       |
- |    |         |         |   +-------------+     |                       |                       |
- |    |         |         |   |   Load R5   |     |                       |                       |
- |    |         |         |   |   firmware  |     |                       |                       |
- |    |         |         |   +-------------+     |                       |                       |
- |    |         |<--------|---| Start A72   |     |                       |                       |
- |    |         |         |   | and jump to |     |                       |                       |
- |    |         |         |   | DM fw image |     |                       |                       |
- |    |         |         |   +-------------+     |                       |                       |
- |    |         |         |                       |     +-----------+     |                       |
- |    |         |---------|-----------------------|---->| Reset rls |     |                       |
- |    |         |         |                       |     +-----------+     |                       |
- |    |  TIFS   |         |                       |          :            |                       |
- |    |Services |         |                       |     +-------------+   |                       |
- |    |         |<--------|-----------------------|---->|*TF-A/OP-TEE*|   |                       |
- |    |         |         |                       |     +-------------+   |                       |
- |    |         |         |                       |          :            |                       |
- |    |         |         |                       |     +-----------+     |                       |
- |    |         |<--------|-----------------------|---->| *A72 SPL* |     |                       |
- |    |         |         |                       |     +-----------+     |                       |
- |    |         |         |                       |     |   Load    |     |                       |
- |    |         |         |                       |     | u-boot.img|     |                       |
- |    |         |         |                       |     +-----------+     |                       |
- |    |         |         |                       |          :            |                       |
- |    |         |         |                       |     +-----------+     |                       |
- |    |         |<--------|-----------------------|---->| *U-Boot*  |     |                       |
- |    |         |         |                       |     +-----------+     |                       |
- |    |         |         |                       |     |  prompt   |     |                       |
- |    |         |         |                       |     +-----------+     |                       |
- |    |         |         |                       |     |  Load R5  |     |                       |
- |    |         |         |                       |     |  Firmware |     |                       |
- |    |         |         |                       |     +-----------+     |                       |
- |    |         |<--------|-----------------------|-----|  Start R5 |     |      +-----------+    |
- |    |         |---------|-----------------------|-----+-----------+-----|----->| R5 starts |    |
- |    |         |         |                       |     |  Load C6  |     |      +-----------+    |
- |    |         |         |                       |     |  Firmware |     |                       |
- |    |         |         |                       |     +-----------+     |                       |
- |    |         |<--------|-----------------------|-----|  Start C6 |     |      +-----------+    |
- |    |         |---------|-----------------------|-----+-----------+-----|----->| C6 starts |    |
- |    |         |         |                       |     |  Load C7  |     |      +-----------+    |
- |    |         |         |                       |     |  Firmware |     |                       |
- |    |         |         |                       |     +-----------+     |                       |
- |    |         |<--------|-----------------------|-----|  Start C7 |     |      +-----------+    |
- |    |         |---------|-----------------------|-----+-----------+-----|----->| C7 starts |    |
- |    +---------+         |                       |                       |      +-----------+    |
- |                        |                       |                       |                       |
- +------------------------------------------------------------------------+-----------------------+
+.. image:: img/boot_diagram_j721e.svg
 
 - Here DMSC acts as master and provides all the critical services. R5/A72
   requests DMSC to get these services done as shown in the above diagram.