| commit | 09456d9da355b09fef7deece0d01626bae06c2cf | [log] [tgz] |
|---|---|---|
| author | Wenyou Yang <wenyou.yang@atmel.com> | Tue Sep 22 14:59:25 2015 +0800 |
| committer | Andreas Bießmann <andreas.devel@googlemail.com> | Tue Nov 03 14:21:30 2015 +0100 |
| tree | e28a44fc5b06321e1007254de3eee7f0fa6ee7ab | |
| parent | 0a248bc7f9c38be56544b8a196283f11991b0150 [diff] |
mmc: sdhci: Fix the SD clock stop sequence According to the SDHC specification, stopping the SD Clock is by setting the SD Clock Enable bit in the Clock Control register at 0, instead of setting all bits at 0. Before stopping the SD clock, we need to make sure all SD transactions to complete, so add checking the CMD and DAT bits in the Presen State register, before stopping the SD clock. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>