Merge https://source.denx.de/u-boot/custodians/u-boot-riscv
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 32a90b8..8f95781 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -152,6 +152,21 @@
when building U-Boot, which results in compressed instructions in the
U-Boot binary.
+config RISCV_ISA_F
+ bool "Standard extension for Single-Precision Floating Point"
+ default y
+ help
+ Adds "F" to the ISA string passed to the compiler.
+
+config RISCV_ISA_D
+ bool "Standard extension for Double-Precision Floating Point"
+ depends on RISCV_ISA_F
+ default y
+ help
+ Adds "D" to the ISA string passed to the compiler and changes the
+ riscv32 ABI from ilp32 to ilp32d and the riscv64 ABI from lp64 to
+ lp64d.
+
config RISCV_ISA_A
def_bool y
diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile
index 53d1194..4963b51 100644
--- a/arch/riscv/Makefile
+++ b/arch/riscv/Makefile
@@ -5,15 +5,22 @@
ifeq ($(CONFIG_ARCH_RV64I),y)
ARCH_BASE = rv64im
- ABI = lp64
+ ABI_BASE = lp64
endif
ifeq ($(CONFIG_ARCH_RV32I),y)
ARCH_BASE = rv32im
- ABI = ilp32
+ ABI_BASE = ilp32
endif
ifeq ($(CONFIG_RISCV_ISA_A),y)
ARCH_A = a
endif
+ifeq ($(CONFIG_RISCV_ISA_F),y)
+ ARCH_F = f
+endif
+ifeq ($(CONFIG_RISCV_ISA_D),y)
+ ARCH_D = d
+ ABI_D = d
+endif
ifeq ($(CONFIG_RISCV_ISA_C),y)
ARCH_C = c
endif
@@ -24,7 +31,9 @@
CMODEL = medany
endif
-RISCV_MARCH = $(ARCH_BASE)$(ARCH_A)$(ARCH_C)
+
+RISCV_MARCH = $(ARCH_BASE)$(ARCH_A)$(ARCH_F)$(ARCH_D)$(ARCH_C)
+ABI = $(ABI_BASE)$(ABI_D)
# Newer binutils versions default to ISA spec version 20191213 which moves some
# instructions from the I extension to the Zicsr and Zifencei extensions.
diff --git a/arch/riscv/lib/andes_plic.c b/arch/riscv/lib/andes_plic.c
index 6851475..1eabcac 100644
--- a/arch/riscv/lib/andes_plic.c
+++ b/arch/riscv/lib/andes_plic.c
@@ -27,8 +27,8 @@
/* claim register */
#define CLAIM_REG(base, hart) ((ulong)(base) + 0x200004 + (hart) * 0x1000)
-#define ENABLE_HART_IPI (0x80808080)
-#define SEND_IPI_TO_HART(hart) (0x80 >> (hart))
+#define ENABLE_HART_IPI (0x01010101)
+#define SEND_IPI_TO_HART(hart) (0x1 << (hart))
DECLARE_GLOBAL_DATA_PTR;
@@ -36,8 +36,9 @@
{
unsigned int en;
- en = ENABLE_HART_IPI >> hart;
+ en = ENABLE_HART_IPI << hart;
writel(en, (void __iomem *)ENABLE_REG(gd->arch.plic, hart));
+ writel(en, (void __iomem *)ENABLE_REG(gd->arch.plic + 0x4, hart));
return 0;
}
diff --git a/board/AndesTech/ax25-ae350/ax25-ae350.c b/board/AndesTech/ax25-ae350/ax25-ae350.c
index 36f0dd4..63a966e 100644
--- a/board/AndesTech/ax25-ae350/ax25-ae350.c
+++ b/board/AndesTech/ax25-ae350/ax25-ae350.c
@@ -60,7 +60,7 @@
*err = 0;
if (IS_ENABLED(CONFIG_OF_SEPARATE) || IS_ENABLED(CONFIG_OF_BOARD)) {
- if (gd->arch.firmware_fdt_addr)
+ if (fdt_magic((uintptr_t)gd->arch.firmware_fdt_addr) == FDT_MAGIC)
return (void *)(ulong)gd->arch.firmware_fdt_addr;
}
diff --git a/board/emulation/qemu-riscv/Kconfig b/board/emulation/qemu-riscv/Kconfig
index d8c57e6..f9883f1 100644
--- a/board/emulation/qemu-riscv/Kconfig
+++ b/board/emulation/qemu-riscv/Kconfig
@@ -23,7 +23,7 @@
config SPL_OPENSBI_LOAD_ADDR
hex
- default 0x81000000
+ default 0x80100000
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
diff --git a/cmd/riscv/sbi.c b/cmd/riscv/sbi.c
index 522f502..6f2cad4 100644
--- a/cmd/riscv/sbi.c
+++ b/cmd/riscv/sbi.c
@@ -30,15 +30,15 @@
};
static struct sbi_ext extensions[] = {
- { SBI_EXT_0_1_SET_TIMER, "sbi_set_timer" },
- { SBI_EXT_0_1_CONSOLE_PUTCHAR, "sbi_console_putchar" },
- { SBI_EXT_0_1_CONSOLE_GETCHAR, "sbi_console_getchar" },
- { SBI_EXT_0_1_CLEAR_IPI, "sbi_clear_ipi" },
- { SBI_EXT_0_1_SEND_IPI, "sbi_send_ipi" },
- { SBI_EXT_0_1_REMOTE_FENCE_I, "sbi_remote_fence_i" },
- { SBI_EXT_0_1_REMOTE_SFENCE_VMA, "sbi_remote_sfence_vma" },
- { SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID, "sbi_remote_sfence_vma_asid" },
- { SBI_EXT_0_1_SHUTDOWN, "sbi_shutdown" },
+ { SBI_EXT_0_1_SET_TIMER, "Set Timer" },
+ { SBI_EXT_0_1_CONSOLE_PUTCHAR, "Console Putchar" },
+ { SBI_EXT_0_1_CONSOLE_GETCHAR, "Console Getchar" },
+ { SBI_EXT_0_1_CLEAR_IPI, "Clear IPI" },
+ { SBI_EXT_0_1_SEND_IPI, "Send IPI" },
+ { SBI_EXT_0_1_REMOTE_FENCE_I, "Remote FENCE.I" },
+ { SBI_EXT_0_1_REMOTE_SFENCE_VMA, "Remote SFENCE.VMA" },
+ { SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID, "Remote SFENCE.VMA with ASID" },
+ { SBI_EXT_0_1_SHUTDOWN, "System Shutdown" },
{ SBI_EXT_BASE, "SBI Base Functionality" },
{ SBI_EXT_TIME, "Timer Extension" },
{ SBI_EXT_IPI, "IPI Extension" },
@@ -56,8 +56,11 @@
long mvendorid, marchid, mimpid;
ret = sbi_get_spec_version();
- if (ret >= 0)
- printf("SBI %ld.%ld", ret >> 24, ret & 0xffffff);
+ if (ret < 0) {
+ printf("No SBI 0.2+\n");
+ return CMD_RET_FAILURE;
+ }
+ printf("SBI %ld.%ld", ret >> 24, ret & 0xffffff);
impl_id = sbi_get_impl_id();
if (impl_id >= 0) {
for (i = 0; i < ARRAY_SIZE(implementations); ++i) {
@@ -74,6 +77,7 @@
vers >> 16, vers & 0xffff);
break;
case 3: /* KVM */
+ case 4: /* RustSBI */
printf("%ld.%ld.%ld",
vers >> 16,
(vers >> 8) & 0xff,
diff --git a/drivers/clk/clk_k210.c b/drivers/clk/clk_k210.c
index 1961efa..f7d3696 100644
--- a/drivers/clk/clk_k210.c
+++ b/drivers/clk/clk_k210.c
@@ -846,7 +846,7 @@
error = DIV_ROUND_CLOSEST_ULL(f * inv_ratio, r * od);
/* The lower 16 bits are spurious */
- error = abs((error - BIT(32))) >> 16;
+ error = abs64((error - BIT_ULL(32))) >> 16;
if (error < best_error) {
best->r = r;
diff --git a/test/dm/k210_pll.c b/test/dm/k210_pll.c
index a0cc84c..354720f 100644
--- a/test/dm/k210_pll.c
+++ b/test/dm/k210_pll.c
@@ -33,7 +33,7 @@
error = DIV_ROUND_CLOSEST_ULL(f * inv_ratio,
r * od);
/* The lower 16 bits are spurious */
- error = abs((error - BIT(32))) >> 16;
+ error = abs64((error - BIT_ULL(32))) >> 16;
if (error < best_error) {
best->r = r;
best->f = f;