tree 4e8f3d994677a356141774cf292cce01a993c304
parent c9e70e200e5de5f17789f6e08cb0ee0d356098ba
author Jimmy Zhang <jimmzhang@nvidia.com> 1379966869 +0200
committer Tom Warren <twarren@nvidia.com> 1387387188 -0700

Tegra114: Fix PLLX M, N, P init settings

The M, N and P width have been changed from Tegra30. The maximum value
for N is limited to 255. So, the tegra_pll_x_table for Tegra114 should
be set accordingly.

Signed-off-by: Jimmy Zhang <jimmzhang@nvidia.com>
Reviewed-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>