| commit | 087cdb3240f7edcf4428ad1276fd6231617fbee6 | [log] [tgz] |
|---|---|---|
| author | Lokesh Vutla <lokeshvutla@ti.com> | Mon Jul 25 15:45:44 2016 +0530 |
| committer | Jagan Teki <jteki@openedev.com> | Sat Jul 30 00:15:00 2016 +0530 |
| tree | 4040e058ed8f74844c18e934a26bd62ac80be3ef | |
| parent | 391b12cd2948aee0e3d4152eaf8cf60d9f09a605 [diff] |
ARM: dra7xx: Change DPLL_PER_HS13 divider value According to AM572x DM SPRS953A, QSPI bus speed can be 76.8MHz, hence update QSPI input clock divider value (DPLL_PER_HS13) to provide 76.8MHz clock, so that driver can use the same. Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Jagan Teki <jteki@openedev.com>