rockchip: Migrate to use DM_USB_GADGET on RK3328
USB gadget is not working fully as expected on RK3328, it uses a
board_usb_init() function to initialize the DWC2 OTG port.
The board_usb_init() function does not intgrate with the generic phy
framework and as a result the USB phy is not properly configured before
or after USB gadget use.
Having both USB_DWC2 and DWC2_OTG enabled for the same board is also
causing some issues.
Trying to use rockusb or ums command after usb stop result in a freeze
due to usb stop is putting the phy in a suspended state.
=> usb start
=> usb stop
=> ums 0 mmc 0
--> freeze due to usb phy is suspended <--
Fix this by only using one of USB_DWC2 (host) or DWC2_OTG (peripheral)
depending on the most likely usage of the otg port and by migrating to
use DM_USB_GADGET instead of a board_usb_init() function.
The nanopi-r2 and orangepi-r1-plus variants share OTG and power using a
Type-C connector, mark these boards dr_mode as peripheral, the most
likely usage is for recovery and image download.
The rock64 and roc-cc currently use dr_mode as host, remove the DWC2_OTG
driver from these boards to ensure that the USB_DWC2 driver is used.
The rock-pi-e board does not enable the usb20_otg node so both USB_DWC2
and DWC2_OTG is removed from this board.
Enable RockUSB and UMS on all boards with a otg port in peripheral mode.
Also with the migration to DM_USB_GADGET completed the U-Boot specific
change to reorder usb nodes in the soc device tree can be reverted.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
diff --git a/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi b/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
index cca4f06..4fa170e 100644
--- a/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
@@ -15,6 +15,10 @@
bootph-all;
};
+&usb20_otg {
+ dr_mode = "peripheral";
+};
+
&vcc_io_sdio {
bootph-pre-ram;
};
diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi b/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
index 0dbe5a0..0a9423c 100644
--- a/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
@@ -33,6 +33,10 @@
bootph-pre-ram;
};
+&usb20_otg {
+ dr_mode = "peripheral";
+};
+
&vcc_sd {
bootph-pre-ram;
};
diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi b/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
index 1af75ad..1096821 100644
--- a/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
@@ -33,6 +33,10 @@
bootph-pre-ram;
};
+&usb20_otg {
+ dr_mode = "peripheral";
+};
+
&vcc_sd {
bootph-pre-ram;
};
diff --git a/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi b/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
index 47d7496..582d6ba 100644
--- a/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
@@ -29,6 +29,10 @@
};
};
+&usb20_otg {
+ hnp-srp-disable;
+};
+
&vcc_sd {
bootph-pre-ram;
};
diff --git a/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi b/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi
index 9ed0aef..d314bfa 100644
--- a/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi
@@ -29,6 +29,15 @@
};
};
+&u2phy_host {
+ phy-supply = <&vcc_host_5v>;
+};
+
+&vcc_host_5v {
+ /delete-property/ regulator-always-on;
+ /delete-property/ regulator-boot-on;
+};
+
&vcc_sd {
bootph-pre-ram;
};
diff --git a/arch/arm/dts/rk3328-rock64-u-boot.dtsi b/arch/arm/dts/rk3328-rock64-u-boot.dtsi
index 8542649..551cff6 100644
--- a/arch/arm/dts/rk3328-rock64-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-rock64-u-boot.dtsi
@@ -55,6 +55,10 @@
bootph-pre-ram;
};
+&usb20_otg {
+ hnp-srp-disable;
+};
+
&vcc_sd {
bootph-pre-ram;
};
diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi
index 4d43fe2..e0c6aee 100644
--- a/arch/arm/dts/rk3328-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-u-boot.dtsi
@@ -130,10 +130,6 @@
bootph-all;
};
-&usb20_otg {
- hnp-srp-disable;
-};
-
#ifdef CONFIG_ROCKCHIP_SPI_IMAGE
&binman {
simple-bin-spi {
diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi
index fe81b97..fb5dcf6 100644
--- a/arch/arm/dts/rk3328.dtsi
+++ b/arch/arm/dts/rk3328.dtsi
@@ -965,6 +965,22 @@
};
};
+ usb20_otg: usb@ff580000 {
+ compatible = "rockchip,rk3328-usb", "rockchip,rk3066-usb",
+ "snps,dwc2";
+ reg = <0x0 0xff580000 0x0 0x40000>;
+ interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru HCLK_OTG>;
+ clock-names = "otg";
+ dr_mode = "otg";
+ g-np-tx-fifo-size = <16>;
+ g-rx-fifo-size = <280>;
+ g-tx-fifo-size = <256 128 128 64 32 16>;
+ phys = <&u2phy_otg>;
+ phy-names = "usb2-phy";
+ status = "disabled";
+ };
+
usb_host0_ehci: usb@ff5c0000 {
compatible = "generic-ehci";
reg = <0x0 0xff5c0000 0x0 0x10000>;
@@ -1004,31 +1020,6 @@
status = "disabled";
};
- /*
- * U-Boot Specific Change
- *
- * The OTG controller must come after the USB host pair for it
- * to work. This is likely due to lack of support for the USB
- * PHYs. This must be manually changed after each device tree
- * sync. There is no clean way to handle this in -u-boot.dtsi
- * files.
- */
- usb20_otg: usb@ff580000 {
- compatible = "rockchip,rk3328-usb", "rockchip,rk3066-usb",
- "snps,dwc2";
- reg = <0x0 0xff580000 0x0 0x40000>;
- interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru HCLK_OTG>;
- clock-names = "otg";
- dr_mode = "otg";
- g-np-tx-fifo-size = <16>;
- g-rx-fifo-size = <280>;
- g-tx-fifo-size = <256 128 128 64 32 16>;
- phys = <&u2phy_otg>;
- phy-names = "usb2-phy";
- status = "disabled";
- };
-
gic: interrupt-controller@ff811000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;