Add "cls" function to MPC823 LCD driver so we can reinitialize the
display even after showing a bitmap
diff --git a/CHANGELOG b/CHANGELOG
index de10941..aaaf9a4 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -2,6 +2,9 @@
Changes since U-Boot 1.1.1:
======================================================================
+* Add "cls" function to MPC823 LCD driver so we can reinitialize the
+ display even after showing a bitmap
+
* Patch by Josef Wagner, 04 Jun 2004:
- DDR Ram support for PM520 (MPC5200)
- support for different flash types (PM520)
diff --git a/cpu/mpc8xx/lcd.c b/cpu/mpc8xx/lcd.c
index 1dc5f4e..794ca02 100644
--- a/cpu/mpc8xx/lcd.c
+++ b/cpu/mpc8xx/lcd.c
@@ -29,6 +29,7 @@
#include <config.h>
#include <common.h>
+#include <command.h>
#include <watchdog.h>
#include <version.h>
#include <stdarg.h>
@@ -434,8 +435,9 @@
static inline void lcd_puts_xy (ushort x, ushort y, uchar *s);
static inline void lcd_putc_xy (ushort x, ushort y, uchar c);
-int lcd_init (void *lcdbase);
+static int lcd_init (void *lcdbase);
+static int lcd_clear (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]);
static void lcd_ctrl_init (void *lcdbase);
static void lcd_enable (void);
static void *lcd_logo (void);
@@ -718,13 +720,8 @@
/*----------------------------------------------------------------------*/
-int lcd_init (void *lcdbase)
+static int lcd_clear (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
{
- /* Initialize the lcd controller */
- debug ("[LCD] Initializing LCD frambuffer at %p\n", lcdbase);
-
- lcd_ctrl_init (lcdbase);
-
#if LCD_BPP == LCD_MONOCHROME
/* Setting the palette */
lcd_initcolregs();
@@ -758,13 +755,33 @@
COLOR_MASK(lcd_getbgcolor()),
lcd_line_length*panel_info.vl_row);
#endif
-
- lcd_enable ();
-
/* Paint the logo and retrieve LCD base address */
debug ("[LCD] Drawing the logo...\n");
lcd_console_address = lcd_logo ();
+ console_col = 0;
+ console_row = 0;
+
+ return (0);
+}
+
+U_BOOT_CMD(
+ cls, 1, 1, lcd_clear,
+ "cls - clear screen\n",
+ NULL
+);
+
+/*----------------------------------------------------------------------*/
+
+static int lcd_init (void *lcdbase)
+{
+ /* Initialize the lcd controller */
+ debug ("[LCD] Initializing LCD frambuffer at %p\n", lcdbase);
+
+ lcd_ctrl_init (lcdbase);
+ lcd_clear (NULL, 1, 1, NULL); /* dummy args */
+ lcd_enable ();
+
/* Initialize the console */
console_col = 0;
#ifdef LCD_INFO_BELOW_LOGO
diff --git a/include/configs/HMI10.h b/include/configs/HMI10.h
index 8acea1c..62ca616 100644
--- a/include/configs/HMI10.h
+++ b/include/configs/HMI10.h
@@ -297,12 +297,7 @@
*
* If this is a 80 MHz CPU, set PLL multiplication factor to 5 (5*16=80)!
*/
-#ifdef CONFIG_80MHz /* for 80 MHz, we use a 16 MHz clock * 5 */
-#define CFG_PLPRCR \
- ( (5-1)<<PLPRCR_MF_SHIFT | PLPRCR_TEXPS | PLPRCR_TMIST )
-#else /* up to 66 MHz we use a 1:1 clock */
#define CFG_PLPRCR (PLPRCR_SPLSS | PLPRCR_TEXPS | PLPRCR_TMIST)
-#endif /* CONFIG_80MHz */
/*-----------------------------------------------------------------------
* SCCR - System Clock and reset Control Register 15-27
@@ -311,33 +306,15 @@
* power management and some other internal clocks
*/
#define SCCR_MASK SCCR_EBDF11
-#ifdef CONFIG_80MHz /* for 80 MHz, we use a 16 MHz clock * 5 */
-#define CFG_SCCR (/* SCCR_TBS | */ \
- SCCR_COM00 | SCCR_DFSYNC00 | SCCR_DFBRG00 | \
+#define CFG_SCCR (SCCR_COM00 | SCCR_DFSYNC00 | SCCR_DFBRG00 | \
SCCR_DFNL000 | SCCR_DFNH000 | SCCR_DFLCD000 | \
SCCR_DFALCD00)
-#else /* up to 66 MHz we use a 1:1 clock */
-#define CFG_SCCR (SCCR_TBS | \
- SCCR_COM00 | SCCR_DFSYNC00 | SCCR_DFBRG00 | \
- SCCR_DFNL000 | SCCR_DFNH000 | SCCR_DFLCD000 | \
- SCCR_DFALCD00)
-#endif /* CONFIG_80MHz */
/*-----------------------------------------------------------------------
* PCMCIA stuff
*-----------------------------------------------------------------------
*
*/
-#ifndef CONFIG_HMI10
-#define CFG_PCMCIA_MEM_ADDR (0xE0000000)
-#define CFG_PCMCIA_MEM_SIZE ( 64 << 20 )
-#define CFG_PCMCIA_DMA_ADDR (0xE4000000)
-#define CFG_PCMCIA_DMA_SIZE ( 64 << 20 )
-#define CFG_PCMCIA_ATTRB_ADDR (0xE8000000)
-#define CFG_PCMCIA_ATTRB_SIZE ( 64 << 20 )
-#define CFG_PCMCIA_IO_ADDR (0xEC000000)
-#define CFG_PCMCIA_IO_SIZE ( 64 << 20 )
-#else /* CONFIG_HMI10 */
#define CFG_PCMCIA_MEM_ADDR (0xE0100000)
#define CFG_PCMCIA_MEM_SIZE ( 64 << 20 )
#define CFG_PCMCIA_DMA_ADDR (0xE4100000)
@@ -348,7 +325,6 @@
#define CFG_PCMCIA_IO_SIZE ( 64 << 20 )
#define PCMCIA_MEM_WIN_NO 5
#define NSCU_OE_INV 1 /* PCMCIA_GCRX_CXOE is inverted */
-#endif
/*-----------------------------------------------------------------------
* IDE/ATA stuff (Supports IDE harddisk on PCMCIA Adapter)
@@ -405,19 +381,8 @@
/*
* FLASH timing:
*/
-#if defined(CONFIG_80MHz)
-/* 80 MHz CPU - 40 MHz bus: ACS = 00, TRLX = 0, CSNT = 1, SCY = 3, EHTR = 1 */
-#define CFG_OR_TIMING_FLASH (OR_ACS_DIV1 | 0 | OR_CSNT_SAM | \
- OR_SCY_3_CLK | OR_EHTR | OR_BI)
-#elif defined(CONFIG_66MHz)
-/* 66 MHz CPU - 66 MHz bus: ACS = 00, TRLX = 1, CSNT = 1, SCY = 3, EHTR = 1 */
#define CFG_OR_TIMING_FLASH (OR_ACS_DIV1 | OR_TRLX | OR_CSNT_SAM | \
OR_SCY_3_CLK | OR_EHTR | OR_BI)
-#else /* 50 MHz */
-/* 50 MHz CPU - 50 MHz bus: ACS = 00, TRLX = 1, CSNT = 1, SCY = 2, EHTR = 1 */
-#define CFG_OR_TIMING_FLASH (OR_ACS_DIV1 | OR_TRLX | OR_CSNT_SAM | \
- OR_SCY_2_CLK | OR_EHTR | OR_BI)
-#endif /*CONFIG_??MHz */
#define CFG_OR0_REMAP (CFG_REMAP_OR_AM | CFG_OR_TIMING_FLASH)
#define CFG_OR0_PRELIM (CFG_PRELIM_OR_AM | CFG_OR_TIMING_FLASH)
@@ -478,13 +443,9 @@
* 66 Mhz => 66.000.000 / Divider = 129
* 80 Mhz => 80.000.000 / Divider = 156
*/
-#if defined(CONFIG_80MHz)
-#define CFG_MAMR_PTA 156
-#elif defined(CONFIG_66MHz)
-#define CFG_MAMR_PTA 129
-#else /* 50 MHz */
-#define CFG_MAMR_PTA 98
-#endif /*CONFIG_??MHz */
+
+#define CFG_PTA_PER_CLK ((4096 * 32 * 1000) / (4 * 64))
+#define CFG_MAMR_PTA 98
/*
* For 16 MBit, refresh rates could be 31.3 us
diff --git a/include/lcd.h b/include/lcd.h
index e52a625..e0e2184 100644
--- a/include/lcd.h
+++ b/include/lcd.h
@@ -37,7 +37,7 @@
/* Video functions */
-int lcd_init (void *lcdbase);
+/* int lcd_init (void *lcdbase); */
void lcd_putc (const char c);
void lcd_puts (const char *s);
void lcd_printf (const char *fmt, ...);