| commit | 069784eec462955fa1ab04aa3dc3905aaebe03bd | [log] [tgz] |
|---|---|---|
| author | Simon Glass <sjg@chromium.org> | Wed Sep 21 12:40:02 2011 +0000 |
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | Thu Oct 27 21:56:29 2011 +0200 |
| tree | aa4e9f2bb9ac562ace58b5891d7001704ef8d812 | |
| parent | 8f81400c45325e2379fc4c58633cd5c71351a7a0 [diff] |
tegra2: Rename CLOCK_PLL_ID to CLOCK_ID Rename CLOCK_PLL_ID to CLOCK_ID which takes account of the fact that the code now deals with both PLL clocks and source clocks. This also tidied up the assert() to match the one sent upstream, and fixes an error in the PWM id. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Tom Warren <twarren@nvidia.com>