Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sh
- r2dplus updates
diff --git a/Kconfig b/Kconfig
index 4462432..1c408b6 100644
--- a/Kconfig
+++ b/Kconfig
@@ -369,6 +369,16 @@
default "__start" if MIPS
default "_start"
+config STACK_SIZE
+ hex "Define max stack size that can be used by U-Boot"
+ default 0x4000000 if ARCH_VERSAL || ARCH_ZYNQMP
+ default 0x200000 if MICROBLAZE
+ default 0x1000000
+ help
+ Define Max stack size that can be used by U-Boot. This value is used
+ by the UEFI sub-system. On some boards initrd_high is calculated as
+ base stack pointer minus this stack size.
+
endmenu # General setup
menu "Boot images"
diff --git a/README b/README
index d4bf74c..121dc49 100644
--- a/README
+++ b/README
@@ -3444,6 +3444,11 @@
downloads succeed with high packet loss rates, or with
unreliable TFTP servers or client hardware.
+ tftpwindowsize - if this is set, the value is used for TFTP's
+ window size as described by RFC 7440.
+ This means the count of blocks we can receive before
+ sending ack to server.
+
vlan - When set to a value < 4095 the traffic over
Ethernet is encapsulated/received over 802.1q
VLAN tagged frames.
diff --git a/arch/Kconfig b/arch/Kconfig
index 7f3cbe2..2174336 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -139,6 +139,7 @@
imply ACPI_PMC
imply ACPI_PMC_SANDBOX
imply CMD_PMC
+ imply CMD_CLONE
config SH
bool "SuperH architecture"
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 3e11ddf..6b8a32c 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -503,23 +503,6 @@
Such an implementation may be faster under some conditions
but may increase the binary size.
-config SET_STACK_SIZE
- bool "Enable an option to set max stack size that can be used"
- default y if ARCH_VERSAL || ARCH_ZYNQMP || ARCH_ZYNQ
- help
- This will enable an option to set max stack size that can be
- used by U-Boot.
-
-config STACK_SIZE
- hex "Define max stack size that can be used by U-Boot"
- depends on SET_STACK_SIZE
- default 0x4000000 if ARCH_VERSAL || ARCH_ZYNQMP
- default 0x1000000 if ARCH_ZYNQ
- help
- Define Max stack size that can be used by U-Boot so that the
- initrd_high will be calculated as base stack pointer minus this
- stack size.
-
config ARM64_SUPPORT_AARCH32
bool "ARM64 system support AArch32 execution state"
depends on ARM64
@@ -1957,6 +1940,7 @@
source "board/hisilicon/hikey960/Kconfig"
source "board/hisilicon/poplar/Kconfig"
source "board/isee/igep003x/Kconfig"
+source "board/myir/mys_6ulx/Kconfig"
source "board/spear/spear300/Kconfig"
source "board/spear/spear310/Kconfig"
source "board/spear/spear320/Kconfig"
diff --git a/arch/arm/cpu/armv7/Kconfig b/arch/arm/cpu/armv7/Kconfig
index 8eee801..60bb0a9 100644
--- a/arch/arm/cpu/armv7/Kconfig
+++ b/arch/arm/cpu/armv7/Kconfig
@@ -44,6 +44,7 @@
choice
prompt "Supported PSCI version"
depends on ARMV7_PSCI
+ default ARMV7_PSCI_0_1 if ARCH_SUNXI
default ARMV7_PSCI_1_0
help
Select the supported PSCI version.
@@ -53,6 +54,9 @@
config ARMV7_PSCI_0_2
bool "PSCI V0.2"
+
+config ARMV7_PSCI_0_1
+ bool "PSCI V0.1"
endchoice
config ARMV7_PSCI_NR_CPUS
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index abf9a02..43a2ee1 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -721,6 +721,7 @@
dtb-$(CONFIG_MX6ULL) += \
imx6ull-14x14-evk.dtb \
imx6ull-colibri.dtb \
+ imx6ull-myir-mys-6ulx-eval.dtb \
imx6ull-phytec-segin-ff-rdk-emmc.dtb \
imx6ull-dart-6ul.dtb \
imx6ull-somlabs-visionsom.dtb \
diff --git a/arch/arm/dts/imx6ull-colibri-u-boot.dtsi b/arch/arm/dts/imx6ull-colibri-u-boot.dtsi
index 531cdcc..afdb0f4 100644
--- a/arch/arm/dts/imx6ull-colibri-u-boot.dtsi
+++ b/arch/arm/dts/imx6ull-colibri-u-boot.dtsi
@@ -3,10 +3,55 @@
* Copyright 2019 Toradex AG
*/
+/ {
+ aliases {
+ u-boot,dm-pre-reloc;
+ mmc0 = &usdhc1;
+ usb0 = &usbotg1; /* required for ums */
+ display0 = &lcdif;
+ };
+};
+
&pinctrl_uart1 {
u-boot,dm-pre-reloc;
};
&pinctrl_uart1_ctrl1 {
u-boot,dm-pre-reloc;
+};
+
+&lcdif {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_lcdif_dat
+ &pinctrl_lcdif_ctrl>;
+ status = "okay";
+ display = <&display0>;
+ u-boot,dm-pre-reloc;
+
+ display0: display0 {
+ bits-per-pixel = <18>;
+ bus-width = <24>;
+ status = "okay";
+
+ display-timings {
+ native-mode = <&timing_vga>;
+ timing_vga: 640x480 {
+ u-boot,dm-pre-reloc;
+ clock-frequency = <25175000>;
+ hactive = <640>;
+ vactive = <480>;
+ hback-porch = <40>;
+ hfront-porch = <24>;
+ vback-porch = <32>;
+ vfront-porch = <11>;
+ hsync-len = <96>;
+ vsync-len = <2>;
+
+ de-active = <1>;
+ hsync-active = <0>;
+ vsync-active = <0>;
+ pixelclk-active = <0>;
+ };
+ };
+ };
};
diff --git a/arch/arm/dts/imx6ull-colibri.dtsi b/arch/arm/dts/imx6ull-colibri.dtsi
index fca5311..b7bf79f 100644
--- a/arch/arm/dts/imx6ull-colibri.dtsi
+++ b/arch/arm/dts/imx6ull-colibri.dtsi
@@ -8,13 +8,6 @@
#include "imx6ull.dtsi"
/ {
- aliases {
- u-boot,dm-pre-reloc;
- mmc0 = &usdhc1;
- usb0 = &usbotg1; /* required for ums */
- display0 = &lcdif;
- };
-
chosen {
stdout-path = &uart1;
};
@@ -151,42 +144,6 @@
};
};
-&lcdif {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_lcdif_dat
- &pinctrl_lcdif_ctrl>;
- status = "okay";
- display = <&display0>;
- u-boot,dm-pre-reloc;
-
- display0: display0 {
- bits-per-pixel = <18>;
- bus-width = <24>;
- status = "okay";
-
- display-timings {
- native-mode = <&timing_vga>;
- timing_vga: 640x480 {
- u-boot,dm-pre-reloc;
- clock-frequency = <25175000>;
- hactive = <640>;
- vactive = <480>;
- hback-porch = <48>;
- hfront-porch = <16>;
- vback-porch = <33>;
- vfront-porch = <10>;
- hsync-len = <96>;
- vsync-len = <2>;
-
- de-active = <1>;
- hsync-active = <0>;
- vsync-active = <0>;
- pixelclk-active = <0>;
- };
- };
- };
-};
-
/* PWM <A> */
&pwm4 {
pinctrl-names = "default";
diff --git a/arch/arm/dts/imx6ull-myir-mys-6ulx-eval.dts b/arch/arm/dts/imx6ull-myir-mys-6ulx-eval.dts
new file mode 100644
index 0000000..2fd69da
--- /dev/null
+++ b/arch/arm/dts/imx6ull-myir-mys-6ulx-eval.dts
@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2020 Linumiz
+ * Author: Parthiban Nallathambi <parthiban@linumiz.com>
+ */
+
+/dts-v1/;
+#include "imx6ull.dtsi"
+#include "imx6ull-myir-mys-6ulx.dtsi"
+#include "imx6ull-mys-6ulx-u-boot.dtsi"
+
+/ {
+ model = "MYiR i.MX6ULL MYS-6ULX Single Board Computer with NAND";
+ compatible = "myir,imx6ull-mys-6ulx-eval", "fsl,imx6ull";
+};
+
+&gpmi {
+ status = "okay";
+};
diff --git a/arch/arm/dts/imx6ull-myir-mys-6ulx.dtsi b/arch/arm/dts/imx6ull-myir-mys-6ulx.dtsi
new file mode 100644
index 0000000..d03694f
--- /dev/null
+++ b/arch/arm/dts/imx6ull-myir-mys-6ulx.dtsi
@@ -0,0 +1,238 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2020 Linumiz
+ * Author: Parthiban Nallathambi <parthiban@linumiz.com>
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/pwm/pwm.h>
+
+/ {
+ model = "MYiR MYS-6ULX Single Board Computer";
+ compatible = "fsl,imx6ull";
+
+ chosen {
+ stdout-path = &uart1;
+ };
+
+ reg_vdd_5v: regulator-vdd-5v {
+ compatible = "regulator-fixed";
+ regulator-name = "VDD_5V";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ reg_vdd_3v3: regulator-vdd-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "VDD_3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ vin-supply = <®_vdd_5v>;
+ };
+};
+
+&fec1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enet1>;
+ phy-mode = "rmii";
+ phy-handle = <ðphy0>;
+ phy-supply = <®_vdd_3v3>;
+ status = "okay";
+
+ mdio: mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethphy0: ethernet-phy@0 {
+ reg = <0>;
+ interrupt-parent = <&gpio5>;
+ interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&clks IMX6UL_CLK_ENET_REF>;
+ clock-names = "rmii-ref";
+ };
+ };
+};
+
+&gpmi {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpmi_nand>;
+ nand-on-flash-bbt;
+ status = "disabled";
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1>;
+ status = "okay";
+};
+
+&usbotg1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb_otg1_id>;
+ dr_mode = "otg";
+ status = "okay";
+};
+
+&usbotg2 {
+ dr_mode = "host";
+ disable-over-current;
+ status = "okay";
+};
+
+&usdhc1 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc1>;
+ pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
+ cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
+ no-1-8-v;
+ keep-power-in-suspend;
+ wakeup-source;
+ vmmc-supply = <®_vdd_3v3>;
+ status = "okay";
+};
+
+&usdhc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc2>;
+ pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
+ bus-width = <8>;
+ non-removable;
+ keep-power-in-suspend;
+ vmmc-supply = <®_vdd_3v3>;
+};
+
+&iomuxc {
+ pinctrl_enet1: enet1grp {
+ fsl,pins = <
+ MX6UL_PAD_GPIO1_IO06__ENET1_MDIO 0x1b0b0
+ MX6UL_PAD_GPIO1_IO07__ENET1_MDC 0x1b0b0
+ MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0
+ MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0
+ MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0
+ MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0
+ MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0
+ MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
+ MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
+ MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031
+ MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x1b0b0
+ >;
+ };
+
+ pinctrl_gpmi_nand: gpminandgrp {
+ fsl,pins = <
+ MX6UL_PAD_NAND_CLE__RAWNAND_CLE 0x0b0b1
+ MX6UL_PAD_NAND_ALE__RAWNAND_ALE 0x0b0b1
+ MX6UL_PAD_NAND_WP_B__RAWNAND_WP_B 0x0b0b1
+ MX6UL_PAD_NAND_READY_B__RAWNAND_READY_B 0x0b000
+ MX6UL_PAD_NAND_CE0_B__RAWNAND_CE0_B 0x0b0b1
+ MX6UL_PAD_NAND_RE_B__RAWNAND_RE_B 0x0b0b1
+ MX6UL_PAD_NAND_WE_B__RAWNAND_WE_B 0x0b0b1
+ MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00 0x0b0b1
+ MX6UL_PAD_NAND_DATA01__RAWNAND_DATA01 0x0b0b1
+ MX6UL_PAD_NAND_DATA02__RAWNAND_DATA02 0x0b0b1
+ MX6UL_PAD_NAND_DATA03__RAWNAND_DATA03 0x0b0b1
+ MX6UL_PAD_NAND_DATA04__RAWNAND_DATA04 0x0b0b1
+ MX6UL_PAD_NAND_DATA05__RAWNAND_DATA05 0x0b0b1
+ MX6UL_PAD_NAND_DATA06__RAWNAND_DATA06 0x0b0b1
+ MX6UL_PAD_NAND_DATA07__RAWNAND_DATA07 0x0b0b1
+ >;
+ };
+
+ pinctrl_uart1: uart1grp {
+ fsl,pins = <
+ MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
+ MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
+ >;
+ };
+
+ pinctrl_usb_otg1_id: usbotg1idgrp {
+ fsl,pins = <
+ MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID 0x17059
+ >;
+ };
+
+ pinctrl_usdhc1: usdhc1grp {
+ fsl,pins = <
+ MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059
+ MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059
+ MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
+ MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
+ MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
+ MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
+ MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x17059
+ >;
+ };
+
+ pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
+ fsl,pins = <
+ MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9
+ MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9
+ MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9
+ MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9
+ MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9
+ MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9
+ >;
+ };
+
+ pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
+ fsl,pins = <
+ MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9
+ MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9
+ MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9
+ MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9
+ MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9
+ MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9
+ >;
+ };
+
+ pinctrl_usdhc2: usdhc2grp {
+ fsl,pins = <
+ MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10069
+ MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059
+ MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059
+ MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059
+ MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059
+ MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
+ MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17059
+ MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17059
+ MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17059
+ MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17059
+ >;
+ };
+
+ pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
+ fsl,pins = <
+ MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x100b9
+ MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x170b9
+ MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170b9
+ MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170b9
+ MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170b9
+ MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170b9
+ MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x170b9
+ MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x170b9
+ MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x170b9
+ MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x170b9
+ >;
+ };
+
+ pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
+ fsl,pins = <
+ MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x100f9
+ MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x170f9
+ MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170f9
+ MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170f9
+ MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170f9
+ MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170f9
+ MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x170f9
+ MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x170f9
+ MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x170f9
+ MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x170f9
+ >;
+ };
+};
diff --git a/arch/arm/dts/imx6ull-mys-6ulx-u-boot.dtsi b/arch/arm/dts/imx6ull-mys-6ulx-u-boot.dtsi
new file mode 100644
index 0000000..cd15d9b
--- /dev/null
+++ b/arch/arm/dts/imx6ull-mys-6ulx-u-boot.dtsi
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2020 Linumiz
+ * Author: Parthiban Nallathambi <parthiban@linumiz.com>
+ */
+
+&pinctrl_uart1 {
+ u-boot,dm-pre-reloc;
+};
+
+&gpmi {
+ u-boot,dm-spl;
+ u-boot,dm-pre-reloc;
+};
+
+&usdhc1 {
+ u-boot,dm-spl;
+ u-boot,dm-pre-reloc;
+};
+
+&usdhc2 {
+ u-boot,dm-spl;
+ u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/imx7-colibri-emmc.dts b/arch/arm/dts/imx7-colibri-emmc.dts
index bc0d10c..8545498 100644
--- a/arch/arm/dts/imx7-colibri-emmc.dts
+++ b/arch/arm/dts/imx7-colibri-emmc.dts
@@ -5,13 +5,13 @@
/dts-v1/;
#include "imx7-colibri.dtsi"
+#include "imx7-colibri-u-boot.dtsi"
/ {
model = "Toradex Colibri iMX7D 1GB (eMMC)";
compatible = "toradex,imx7d-colibri-emmc", "fsl,imx7d";
aliases {
- u-boot,dm-pre-reloc;
mmc0 = &usdhc3;
mmc1 = &usdhc1;
display1 = &lcdif;
diff --git a/arch/arm/dts/imx7-colibri-rawnand.dts b/arch/arm/dts/imx7-colibri-rawnand.dts
index 5f12a2a..5211fb1 100644
--- a/arch/arm/dts/imx7-colibri-rawnand.dts
+++ b/arch/arm/dts/imx7-colibri-rawnand.dts
@@ -5,19 +5,21 @@
/dts-v1/;
#include "imx7-colibri.dtsi"
+#include "imx7-colibri-u-boot.dtsi"
/ {
model = "Toradex Colibri iMX7S/D";
compatible = "toradex,imx7-colibri", "fsl,imx7";
- chosen {
- stdout-path = &uart1;
- };
-
aliases {
+ display1 = &lcdif;
usb0 = &usbotg1; /* required for ums */
};
+ chosen {
+ stdout-path = &uart1;
+ };
+
reg_5v0: regulator-5v0 {
compatible = "regulator-fixed";
regulator-name = "5V";
diff --git a/arch/arm/dts/imx7-colibri-u-boot.dtsi b/arch/arm/dts/imx7-colibri-u-boot.dtsi
new file mode 100644
index 0000000..9138647
--- /dev/null
+++ b/arch/arm/dts/imx7-colibri-u-boot.dtsi
@@ -0,0 +1,39 @@
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+/*
+ * Copyright 2020 Toradex
+ */
+
+&lcdif {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_lcdif_dat
+ &pinctrl_lcdif_ctrl>;
+ display = <&display0>;
+ u-boot,dm-pre-reloc;
+
+ display0: display0 {
+ bits-per-pixel = <18>;
+ bus-width = <18>;
+ status = "okay";
+
+ display-timings {
+ native-mode = <&timing_vga>;
+ timing_vga: 640x480 {
+ clock-frequency = <25175000>;
+ hactive = <640>;
+ vactive = <480>;
+ hback-porch = <40>;
+ hfront-porch = <24>;
+ vback-porch = <32>;
+ vfront-porch = <11>;
+ hsync-len = <96>;
+ vsync-len = <2>;
+
+ de-active = <1>;
+ hsync-active = <0>;
+ vsync-active = <0>;
+ pixelclk-active = <0>;
+ };
+ };
+ };
+};
diff --git a/arch/arm/dts/imx7-colibri.dtsi b/arch/arm/dts/imx7-colibri.dtsi
index ec95f22..b352036 100644
--- a/arch/arm/dts/imx7-colibri.dtsi
+++ b/arch/arm/dts/imx7-colibri.dtsi
@@ -172,6 +172,38 @@
>;
};
+ pinctrl_lcdif_dat: lcdif-dat-grp {
+ fsl,pins = <
+ MX7D_PAD_LCD_DATA00__LCD_DATA0 0x79
+ MX7D_PAD_LCD_DATA01__LCD_DATA1 0x79
+ MX7D_PAD_LCD_DATA02__LCD_DATA2 0x79
+ MX7D_PAD_LCD_DATA03__LCD_DATA3 0x79
+ MX7D_PAD_LCD_DATA04__LCD_DATA4 0x79
+ MX7D_PAD_LCD_DATA05__LCD_DATA5 0x79
+ MX7D_PAD_LCD_DATA06__LCD_DATA6 0x79
+ MX7D_PAD_LCD_DATA07__LCD_DATA7 0x79
+ MX7D_PAD_LCD_DATA08__LCD_DATA8 0x79
+ MX7D_PAD_LCD_DATA09__LCD_DATA9 0x79
+ MX7D_PAD_LCD_DATA10__LCD_DATA10 0x79
+ MX7D_PAD_LCD_DATA11__LCD_DATA11 0x79
+ MX7D_PAD_LCD_DATA12__LCD_DATA12 0x79
+ MX7D_PAD_LCD_DATA13__LCD_DATA13 0x79
+ MX7D_PAD_LCD_DATA14__LCD_DATA14 0x79
+ MX7D_PAD_LCD_DATA15__LCD_DATA15 0x79
+ MX7D_PAD_LCD_DATA16__LCD_DATA16 0x79
+ MX7D_PAD_LCD_DATA17__LCD_DATA17 0x79
+ >;
+ };
+
+ pinctrl_lcdif_ctrl: lcdif-ctrl-grp {
+ fsl,pins = <
+ MX7D_PAD_LCD_CLK__LCD_CLK 0x79
+ MX7D_PAD_LCD_ENABLE__LCD_ENABLE 0x79
+ MX7D_PAD_LCD_VSYNC__LCD_VSYNC 0x79
+ MX7D_PAD_LCD_HSYNC__LCD_HSYNC 0x79
+ >;
+ };
+
pinctrl_enet1: enet1grp {
fsl,pins = <
MX7D_PAD_ENET1_CRS__GPIO7_IO14 0x14
@@ -227,36 +259,3 @@
>;
};
};
-
-&lcdif {
- status = "okay";
- display = <&display0>;
- u-boot,dm-pre-reloc;
-
- display0: display0 {
- bits-per-pixel = <18>;
- bus-width = <24>;
- status = "okay";
-
- display-timings {
- native-mode = <&timing_vga>;
- timing_vga: 640x480 {
- u-boot,dm-pre-reloc;
- clock-frequency = <25175000>;
- hactive = <640>;
- vactive = <480>;
- hback-porch = <48>;
- hfront-porch = <16>;
- vback-porch = <33>;
- vfront-porch = <10>;
- hsync-len = <96>;
- vsync-len = <2>;
-
- de-active = <1>;
- hsync-active = <0>;
- vsync-active = <0>;
- pixelclk-active = <0>;
- };
- };
- };
-};
diff --git a/arch/arm/dts/imx8mm-verdin.dts b/arch/arm/dts/imx8mm-verdin.dts
index b86f46e..1c67c08 100644
--- a/arch/arm/dts/imx8mm-verdin.dts
+++ b/arch/arm/dts/imx8mm-verdin.dts
@@ -16,6 +16,12 @@
stdout-path = &uart1;
};
+ aliases {
+ eeprom0 = &eeprom_module;
+ eeprom1 = &eeprom_carrier_board;
+ eeprom2 = &eeprom_display_adapter;
+ };
+
/* fixed clock dedicated to SPI CAN controller */
clk20m: oscillator {
compatible = "fixed-clock";
@@ -321,8 +327,8 @@
vcc-supply = <&ldo5_reg>;
};
- eeprom@50 {
- compatible = "st,24c02";
+ eeprom_module: eeprom@50 {
+ compatible = "st,24c02", "atmel,24c02", "i2c-eeprom";
pagesize = <16>;
reg = <0x50>;
};
@@ -377,16 +383,16 @@
status = "okay";
};
- /* EEPROM on MIPI-DSI to HDMI adapter */
- eeprom_50: eeprom@50 {
- compatible = "st,24c02";
+ /* EEPROM on display adapter (MIPI DSI Display Adapter) */
+ eeprom_display_adapter: eeprom@50 {
+ compatible = "st,24c02", "atmel,24c02", "i2c-eeprom";
pagesize = <16>;
reg = <0x50>;
};
- /* EEPROM on Verdin Development board */
- eeprom_57: eeprom@57 {
- compatible = "st,24c02";
+ /* EEPROM on carrier board */
+ eeprom_carrier_board: eeprom@57 {
+ compatible = "st,24c02", "atmel,24c02", "i2c-eeprom";
pagesize = <16>;
reg = <0x57>;
};
diff --git a/arch/arm/include/asm/arch-mediatek/reset.h b/arch/arm/include/asm/arch-mediatek/reset.h
index 9704666..4ba0bad 100644
--- a/arch/arm/include/asm/arch-mediatek/reset.h
+++ b/arch/arm/include/asm/arch-mediatek/reset.h
@@ -6,7 +6,7 @@
#ifndef __MEDIATEK_RESET_H
#define __MEDIATEK_RESET_H
-#include <dm.h>
+struct udevice;
int mediatek_reset_bind(struct udevice *pdev, u32 regofs, u32 num_regs);
diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S
index df9dd83..46b6be2 100644
--- a/arch/arm/lib/crt0.S
+++ b/arch/arm/lib/crt0.S
@@ -64,7 +64,7 @@
* can afford it due to sufficient memory being available early.
*/
-.macro SPL_CLEAR_BSS
+.macro CLEAR_BSS
ldr r0, =__bss_start /* this is auto-relocated! */
#ifdef CONFIG_USE_ARCH_MEMSET
@@ -109,8 +109,8 @@
mov r9, r0
bl board_init_f_init_reserve
-#if defined(CONFIG_SPL_EARLY_BSS)
- SPL_CLEAR_BSS
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_EARLY_BSS)
+ CLEAR_BSS
#endif
mov r0, #0
@@ -150,8 +150,8 @@
#endif
#if !defined(CONFIG_SPL_BUILD) || CONFIG_IS_ENABLED(FRAMEWORK)
-#if !defined(CONFIG_SPL_EARLY_BSS)
- SPL_CLEAR_BSS
+#if !defined(CONFIG_SPL_BUILD) || !defined(CONFIG_SPL_EARLY_BSS)
+ CLEAR_BSS
#endif
# ifdef CONFIG_SPL_BUILD
diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c
index 694c26d..fe8d594 100644
--- a/arch/arm/mach-imx/cpu.c
+++ b/arch/arm/mach-imx/cpu.c
@@ -8,6 +8,7 @@
#include <bootm.h>
#include <common.h>
+#include <dm.h>
#include <init.h>
#include <log.h>
#include <net.h>
diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
index 8ee024f..8dfc864 100644
--- a/arch/arm/mach-imx/imx8m/soc.c
+++ b/arch/arm/mach-imx/imx8m/soc.c
@@ -933,7 +933,7 @@
/* Get ARM Trusted Firmware commit id */
arm_smccc_smc(IMX_SIP_BUILDINFO, IMX_SIP_BUILDINFO_GET_COMMITHASH,
- 0, 0 , 0, 0, 0, 0, &res);
+ 0, 0, 0, 0, 0, 0, &res);
atf_commit = res.a0;
if (atf_commit == 0xffffffff) {
debug("ATF does not support build info\n");
diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig
index fdee0d4..17173f9 100644
--- a/arch/arm/mach-imx/mx6/Kconfig
+++ b/arch/arm/mach-imx/mx6/Kconfig
@@ -460,6 +460,18 @@
select MX6ULL
imply CMD_DM
+config TARGET_MYS_6ULX
+ bool "MYiR MYS-6ULX"
+ select MX6ULL
+ select DM
+ select DM_ETH
+ select DM_GPIO
+ select DM_I2C
+ select DM_MMC
+ select DM_SERIAL
+ select DM_THERMAL
+ select SUPPORT_SPL
+
config TARGET_NITROGEN6X
bool "nitrogen6x"
imply USB_ETHER_ASIX
diff --git a/arch/arm/mach-imx/mx7/soc.c b/arch/arm/mach-imx/mx7/soc.c
index 798fe74..9cb61f5 100644
--- a/arch/arm/mach-imx/mx7/soc.c
+++ b/arch/arm/mach-imx/mx7/soc.c
@@ -218,7 +218,7 @@
{ 0x00940000, 0x00940000, 0x20000 }, /* OCRAM_PXP */
{ 0x20240000, 0x00940000, 0x20000 }, /* OCRAM_PXP */
{ 0x10000000, 0x80000000, 0x0fff0000 }, /* DDR Code alias */
- { 0x80000000, 0x80000000, 0xe0000000 }, /* DDRC */
+ { 0x80000000, 0x80000000, 0x60000000 }, /* DDRC */
{ /* sentinel */ }
};
#endif
diff --git a/arch/arm/mach-imx/spl.c b/arch/arm/mach-imx/spl.c
index 1a231c6..76a5f7a 100644
--- a/arch/arm/mach-imx/spl.c
+++ b/arch/arm/mach-imx/spl.c
@@ -293,8 +293,7 @@
CSF_PAD_SIZE, offset)) {
image_entry();
} else {
- puts("spl: ERROR: image authentication fail\n");
- hang();
+ panic("spl: ERROR: image authentication fail\n");
}
}
}
@@ -320,8 +319,7 @@
if (imx_hab_authenticate_image(load_addr,
offset + IVT_SIZE + CSF_PAD_SIZE,
offset)) {
- puts("spl: ERROR: image authentication unsuccessful\n");
- hang();
+ panic("spl: ERROR: image authentication unsuccessful\n");
}
}
#endif
diff --git a/arch/arm/mach-k3/sysfw-loader.c b/arch/arm/mach-k3/sysfw-loader.c
index 513be09..96be069 100644
--- a/arch/arm/mach-k3/sysfw-loader.c
+++ b/arch/arm/mach-k3/sysfw-loader.c
@@ -7,6 +7,7 @@
*/
#include <common.h>
+#include <dm.h>
#include <image.h>
#include <log.h>
#include <spl.h>
diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_serial.c b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_serial.c
index 70940f0..8aad4be 100644
--- a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_serial.c
+++ b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_serial.c
@@ -5,6 +5,7 @@
#include <common.h>
#include <console.h>
+#include <dm.h>
#include <dfu.h>
#include <malloc.h>
#include <serial.h>
diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig
index 2bd260e..ff6b3c7 100644
--- a/arch/microblaze/Kconfig
+++ b/arch/microblaze/Kconfig
@@ -20,14 +20,6 @@
endchoice
-config STACK_SIZE
- hex "Define max stack size that can be used by u-boot"
- default 0x200000
- help
- Defines Max stack size that can be used by u-boot so that the
- initrd_high will be calculated as base stack pointer minus this
- stack size.
-
source "board/xilinx/microblaze-generic/Kconfig"
endmenu
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 997e145..e0f6b6c 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -112,9 +112,11 @@
select DISPLAY_CPUINFO
select DMA_ADDR_T_64BIT
select DM
- select DM_SERIAL
- select DM_GPIO
select DM_ETH
+ select DM_GPIO
+ select DM_I2C
+ select DM_SERIAL
+ select DM_SPI
select MIPS_L2_CACHE
select MIPS_MACH_EARLY_INIT
select MIPS_TUNE_OCTEON3
diff --git a/arch/mips/dts/mrvl,cn73xx.dtsi b/arch/mips/dts/mrvl,cn73xx.dtsi
index a7bd55f..f5ad4a6 100644
--- a/arch/mips/dts/mrvl,cn73xx.dtsi
+++ b/arch/mips/dts/mrvl,cn73xx.dtsi
@@ -5,6 +5,8 @@
/dts-v1/;
+#include <dt-bindings/clock/octeon-clock.h>
+
/ {
#address-cells = <2>;
#size-cells = <2>;
@@ -38,6 +40,38 @@
#size-cells = <1>;
};
+ clk: clock {
+ compatible = "mrvl,octeon-clk";
+ #clock-cells = <1>;
+ u-boot,dm-pre-reloc;
+ };
+
+ gpio: gpio-controller@1070000000800 {
+ #gpio-cells = <2>;
+ compatible = "cavium,octeon-7890-gpio";
+ reg = <0x10700 0x00000800 0x0 0x100>;
+ gpio-controller;
+ nr-gpios = <32>;
+ /* Interrupts are specified by two parts:
+ * 1) GPIO pin number (0..15)
+ * 2) Triggering (1 - edge rising
+ * 2 - edge falling
+ * 4 - level active high
+ * 8 - level active low)
+ */
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ /* The GPIO pins connect to 16 consecutive CUI bits */
+ interrupts = <0x03000 4>, <0x03001 4>,
+ <0x03002 4>, <0x03003 4>,
+ <0x03004 4>, <0x03005 4>,
+ <0x03006 4>, <0x03007 4>,
+ <0x03008 4>, <0x03009 4>,
+ <0x0300a 4>, <0x0300b 4>,
+ <0x0300c 4>, <0x0300d 4>,
+ <0x0300e 4>, <0x0300f 4>;
+ };
+
reset: reset@1180006001600 {
compatible = "mrvl,cn7xxx-rst";
reg = <0x11800 0x06001600 0x0 0x200>;
@@ -60,5 +94,37 @@
reg-shift = <3>;
interrupts = <0x08040 4>;
};
+
+ i2c0: i2c@1180000001000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "cavium,octeon-7890-twsi";
+ reg = <0x11800 0x00001000 0x0 0x200>;
+ /* INT_ST, INT_TS, INT_CORE */
+ interrupts = <0x0b000 1>, <0x0b001 1>, <0x0b002 1>;
+ clock-frequency = <100000>;
+ clocks = <&clk OCTEON_CLK_IO>;
+ };
+
+ i2c1: i2c@1180000001200 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "cavium,octeon-7890-twsi";
+ reg = <0x11800 0x00001200 0x0 0x200>;
+ /* INT_ST, INT_TS, INT_CORE */
+ interrupts = <0x0b100 1>, <0x0b101 1>, <0x0b102 1>;
+ clock-frequency = <100000>;
+ clocks = <&clk OCTEON_CLK_IO>;
+ };
+
+ spi: spi@1070000001000 {
+ compatible = "cavium,octeon-3010-spi";
+ reg = <0x10700 0x00001000 0x0 0x100>;
+ interrupts = <0x05001 1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ spi-max-frequency = <25000000>;
+ clocks = <&clk OCTEON_CLK_IO>;
+ };
};
};
diff --git a/arch/mips/dts/mrvl,octeon-ebb7304.dts b/arch/mips/dts/mrvl,octeon-ebb7304.dts
index 4e9c2de..6b2e5e8 100644
--- a/arch/mips/dts/mrvl,octeon-ebb7304.dts
+++ b/arch/mips/dts/mrvl,octeon-ebb7304.dts
@@ -5,7 +5,7 @@
/dts-v1/;
-/include/ "mrvl,cn73xx.dtsi"
+#include "mrvl,cn73xx.dtsi"
/ {
model = "cavium,ebb7304";
@@ -13,6 +13,7 @@
aliases {
serial0 = &uart0;
+ spi0 = &spi;
};
chosen {
@@ -94,3 +95,21 @@
&uart0 {
clock-frequency = <1200000000>;
};
+
+&i2c0 {
+ u-boot,dm-pre-reloc; /* Needed early for DDR SPD EEPROM */
+ clock-frequency = <100000>;
+};
+
+&i2c1 {
+ u-boot,dm-pre-reloc; /* Needed early for DDR SPD EEPROM */
+ clock-frequency = <100000>;
+};
+
+&spi {
+ flash@0 {
+ compatible = "micron,n25q128a11", "jedec,spi-nor";
+ spi-max-frequency = <2000000>;
+ reg = <0>;
+ };
+};
diff --git a/arch/mips/mach-mscc/include/mach/jr2/jr2.h b/arch/mips/mach-mscc/include/mach/jr2/jr2.h
index 67244f6..3a779e7 100644
--- a/arch/mips/mach-mscc/include/mach/jr2/jr2.h
+++ b/arch/mips/mach-mscc/include/mach/jr2/jr2.h
@@ -8,9 +8,6 @@
#ifndef _MSCC_JR2_H_
#define _MSCC_JR2_H_
-#include <linux/bitops.h>
-#include <dm.h>
-
/*
* Target offset base(s)
*/
diff --git a/arch/mips/mach-mscc/include/mach/luton/luton.h b/arch/mips/mach-mscc/include/mach/luton/luton.h
index 19f02ed..dda665f 100644
--- a/arch/mips/mach-mscc/include/mach/luton/luton.h
+++ b/arch/mips/mach-mscc/include/mach/luton/luton.h
@@ -8,9 +8,6 @@
#ifndef _MSCC_OCELOT_H_
#define _MSCC_OCELOT_H_
-#include <linux/bitops.h>
-#include <dm.h>
-
/*
* Target offset base(s)
*/
diff --git a/arch/mips/mach-mscc/include/mach/ocelot/ocelot.h b/arch/mips/mach-mscc/include/mach/ocelot/ocelot.h
index 2cb2135..72b07c3 100644
--- a/arch/mips/mach-mscc/include/mach/ocelot/ocelot.h
+++ b/arch/mips/mach-mscc/include/mach/ocelot/ocelot.h
@@ -8,9 +8,6 @@
#ifndef _MSCC_OCELOT_H_
#define _MSCC_OCELOT_H_
-#include <linux/bitops.h>
-#include <dm.h>
-
/*
* Target offset base(s)
*/
diff --git a/arch/mips/mach-mscc/include/mach/serval/serval.h b/arch/mips/mach-mscc/include/mach/serval/serval.h
index 763d18f..a78c6e5 100644
--- a/arch/mips/mach-mscc/include/mach/serval/serval.h
+++ b/arch/mips/mach-mscc/include/mach/serval/serval.h
@@ -8,9 +8,6 @@
#ifndef _MSCC_SERVAL_H_
#define _MSCC_SERVAL_H_
-#include <linux/bitops.h>
-#include <dm.h>
-
/*
* Target offset base(s)
*/
diff --git a/arch/mips/mach-mscc/include/mach/servalt/servalt.h b/arch/mips/mach-mscc/include/mach/servalt/servalt.h
index 9015bc7..4d7d088 100644
--- a/arch/mips/mach-mscc/include/mach/servalt/servalt.h
+++ b/arch/mips/mach-mscc/include/mach/servalt/servalt.h
@@ -8,9 +8,6 @@
#ifndef _MSCC_SERVALT_H_
#define _MSCC_SERVALT_H_
-#include <linux/bitops.h>
-#include <dm.h>
-
/*
* Target offset base(s)
*/
diff --git a/arch/riscv/dts/fu540-c000-u-boot.dtsi b/arch/riscv/dts/fu540-c000-u-boot.dtsi
index afdb4f4..5302677 100644
--- a/arch/riscv/dts/fu540-c000-u-boot.dtsi
+++ b/arch/riscv/dts/fu540-c000-u-boot.dtsi
@@ -3,6 +3,8 @@
* (C) Copyright 2019 SiFive, Inc
*/
+#include <dt-bindings/reset/sifive-fu540-prci.h>
+
/ {
cpus {
assigned-clocks = <&prci PRCI_CLK_COREPLL>;
@@ -59,6 +61,16 @@
reg = <0x0 0x2000000 0x0 0xc0000>;
u-boot,dm-spl;
};
+ prci: clock-controller@10000000 {
+ #reset-cells = <1>;
+ resets = <&prci PRCI_RST_DDR_CTRL_N>,
+ <&prci PRCI_RST_DDR_AXI_N>,
+ <&prci PRCI_RST_DDR_AHB_N>,
+ <&prci PRCI_RST_DDR_PHY_N>,
+ <&prci PRCI_RST_GEMGXL_N>;
+ reset-names = "ddr_ctrl", "ddr_axi", "ddr_ahb",
+ "ddr_phy", "gemgxl_reset";
+ };
dmc: dmc@100b0000 {
compatible = "sifive,fu540-c000-ddr";
reg = <0x0 0x100b0000 0x0 0x0800
diff --git a/arch/riscv/include/asm/arch-fu540/reset.h b/arch/riscv/include/asm/arch-fu540/reset.h
new file mode 100644
index 0000000..e42797a
--- /dev/null
+++ b/arch/riscv/include/asm/arch-fu540/reset.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (c) 2020 SiFive, Inc.
+ *
+ * Author: Sagar Kadam <sagar.kadam@sifive.com>
+ */
+
+#ifndef __RESET_SIFIVE_H
+#define __RESET_SIFIVE_H
+
+int sifive_reset_bind(struct udevice *dev, ulong count);
+
+#endif
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index cbca69e..a34b108 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -811,7 +811,7 @@
graphics console won't work without VGA options ROMs. Set it to N
if your kernel is only on a serial console.
-config STACK_SIZE
+config STACK_SIZE_RESUME
hex
depends on HAVE_ACPI_RESUME
default 0x1000
diff --git a/arch/x86/cpu/apollolake/fsp_bindings.c b/arch/x86/cpu/apollolake/fsp_bindings.c
index 9130af9..bbf04b5 100644
--- a/arch/x86/cpu/apollolake/fsp_bindings.c
+++ b/arch/x86/cpu/apollolake/fsp_bindings.c
@@ -90,6 +90,28 @@
}
/**
+ * read_u64_prop() - Read an u64 property from devicetree (scalar or array)
+ * @node: Valid node reference to read property from
+ * @name: Name of the property to read from
+ * @count: If the property is expected to be an array, this is the
+ * number of expected elements
+ * set to 0 if the property is expected to be a scalar
+ * @dst: Pointer to destination of where to save the value(s) read
+ * from devicetree
+ */
+static int read_u64_prop(ofnode node, char *name, size_t count, u64 *dst)
+{
+ if (count == 0) {
+ ofnode_read_u64(node, name, dst);
+ } else {
+ debug("ERROR: %s u64 arrays not supported!\n", __func__);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+/**
* read_string_prop() - Read a string property from devicetree
* @node: Valid node reference to read property from
* @name: Name of the property to read from
@@ -206,6 +228,12 @@
read_u32_prop(node, fspb->propname, fspb->count,
(u32 *)&cfg[fspb->offset]);
break;
+ case FSP_UINT64:
+ ret = read_u64_prop(node, fspb->propname, fspb->count,
+ (u64 *)&cfg[fspb->offset]);
+ if (ret)
+ return ret;
+ break;
case FSP_STRING:
read_string_prop(node, fspb->propname, fspb->count,
(char *)&cfg[fspb->offset]);
@@ -605,6 +633,17 @@
.offset = offsetof(struct fsp_m_config, variable_nvs_buffer_ptr),
.propname = "fspm,variable-nvs-buffer-ptr",
}, {
+ .type = FSP_UINT64,
+ .offset = offsetof(struct fsp_m_config, start_timer_ticker_of_pfet_assert),
+ .propname = "fspm,start-timer-ticker-of-pfet-assert",
+ }, {
+ .type = FSP_UINT8, .offset = offsetof(struct fsp_m_config, rt_en),
+ .propname = "fspm,rt-en",
+ }, {
+ .type = FSP_UINT8,
+ .offset = offsetof(struct fsp_m_config, skip_pcie_power_sequence),
+ .propname = "fspm,skip-pcie-power-sequence",
+ }, {
.propname = NULL
}
};
@@ -1794,6 +1833,18 @@
.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
port_usb20_hs_npre_drv_sel),
}, {
+ .type = FSP_UINT8,
+ .offset = offsetof(struct fsp_s_config, os_selection),
+ .propname = "fsps,os-selection",
+ }, {
+ .type = FSP_UINT8,
+ .offset = offsetof(struct fsp_s_config, dptf_enabled),
+ .propname = "fsps,dptf-enabled",
+ }, {
+ .type = FSP_UINT8,
+ .offset = offsetof(struct fsp_s_config, pwm_enabled),
+ .propname = "fsps,pwm-enabled",
+ }, {
.propname = NULL
}
};
diff --git a/arch/x86/cpu/call32.S b/arch/x86/cpu/call32.S
index e185b9a..e641e78 100644
--- a/arch/x86/cpu/call32.S
+++ b/arch/x86/cpu/call32.S
@@ -32,8 +32,7 @@
push %rdi /* 32-bit code segment */
lea compat(%rip), %rax
push %rax
- .byte 0x48 /* REX prefix to force 64-bit far return */
- retf
+ retfq
.code32
compat:
/*
@@ -60,4 +59,4 @@
/* Jump to the required target */
pushl %edi /* 32-bit code segment */
pushl %esi /* 32-bit target address */
- retf
+ retfl
diff --git a/arch/x86/cpu/ivybridge/sdram.c b/arch/x86/cpu/ivybridge/sdram.c
index 99bc480..dd6b875 100644
--- a/arch/x86/cpu/ivybridge/sdram.c
+++ b/arch/x86/cpu/ivybridge/sdram.c
@@ -10,6 +10,7 @@
*/
#include <common.h>
+#include <dm.h>
#include <errno.h>
#include <fdtdec.h>
#include <init.h>
diff --git a/arch/x86/cpu/sipi_vector.S b/arch/x86/cpu/sipi_vector.S
index 40cc27f..fa1e6cb 100644
--- a/arch/x86/cpu/sipi_vector.S
+++ b/arch/x86/cpu/sipi_vector.S
@@ -131,12 +131,12 @@
jnz microcode_done
/* Determine if parallel microcode loading is allowed */
- cmp $0xffffffff, microcode_lock
+ cmpl $0xffffffff, microcode_lock
je load_microcode
/* Protect microcode loading */
lock_microcode:
- lock bts $0, microcode_lock
+ lock btsl $0, microcode_lock
jc lock_microcode
load_microcode:
@@ -154,7 +154,7 @@
popa
/* Unconditionally unlock microcode loading */
- cmp $0xffffffff, microcode_lock
+ cmpl $0xffffffff, microcode_lock
je microcode_done
xor %eax, %eax
diff --git a/arch/x86/include/asm/arch-apollolake/fsp/fsp_m_upd.h b/arch/x86/include/asm/arch-apollolake/fsp/fsp_m_upd.h
index 5275b75..78c338e 100644
--- a/arch/x86/include/asm/arch-apollolake/fsp/fsp_m_upd.h
+++ b/arch/x86/include/asm/arch-apollolake/fsp/fsp_m_upd.h
@@ -122,7 +122,10 @@
/* 0x150 */
void *variable_nvs_buffer_ptr;
- u8 reserved_fspm_upd[12];
+ u64 start_timer_ticker_of_pfet_assert;
+ u8 rt_en;
+ u8 skip_pcie_power_sequence;
+ u8 reserved_fspm_upd[2];
};
/** FSP-M UPD Configuration */
diff --git a/arch/x86/include/asm/arch-apollolake/fsp/fsp_s_upd.h b/arch/x86/include/asm/arch-apollolake/fsp/fsp_s_upd.h
index 451a7a2..be80f5d 100644
--- a/arch/x86/include/asm/arch-apollolake/fsp/fsp_s_upd.h
+++ b/arch/x86/include/asm/arch-apollolake/fsp/fsp_s_upd.h
@@ -351,7 +351,10 @@
u8 port_usb20_hs_npre_drv_sel[8];
/* 0x370 */
- u8 reserved_fsps_upd[16];
+ u8 os_selection;
+ u8 dptf_enabled;
+ u8 pwm_enabled;
+ u8 reserved_fsps_upd[13];
};
/** struct fsps_upd - FSP-S Configuration */
@@ -563,4 +566,8 @@
#define PCIE_RP_SELECTABLE_DEEMPHASIS_6_DB 0
#define PCIE_RP_SELECTABLE_DEEMPHASIS_3_5_DB 1
+#define OS_SELECTION_WINDOWS 0
+#define OS_SELECTION_ANDROID 1
+#define OS_SELECTION_LINUX 3
+
#endif
diff --git a/arch/x86/include/asm/arch-apollolake/fsp_bindings.h b/arch/x86/include/asm/arch-apollolake/fsp_bindings.h
index b493951..a80e66b 100644
--- a/arch/x86/include/asm/arch-apollolake/fsp_bindings.h
+++ b/arch/x86/include/asm/arch-apollolake/fsp_bindings.h
@@ -17,6 +17,7 @@
FSP_UINT8,
FSP_UINT16,
FSP_UINT32,
+ FSP_UINT64,
FSP_STRING,
FSP_LPDDR4_SWIZZLE,
};
diff --git a/arch/x86/include/asm/irq.h b/arch/x86/include/asm/irq.h
index e5c9160..bee0760 100644
--- a/arch/x86/include/asm/irq.h
+++ b/arch/x86/include/asm/irq.h
@@ -12,8 +12,8 @@
* Intel interrupt router configuration mechanism
*
* There are two known ways of Intel interrupt router configuration mechanism
- * so far. On most cases, the IRQ routing configuraiton is controlled by PCI
- * configuraiton registers on the legacy bridge, normally PCI BDF(0, 31, 0).
+ * so far. On most cases, the IRQ routing configuration is controlled by PCI
+ * configuration registers on the legacy bridge, normally PCI BDF(0, 31, 0).
* On some newer platforms like BayTrail and Braswell, the IRQ routing is now
* in the IBASE register block where IBASE is memory-mapped.
*/
@@ -36,7 +36,7 @@
* @link_base: link value base number
* @link_num: number of PIRQ links supported
* @has_regmap: has mapping table between PIRQ link and routing register offset
- * @irq_mask: IRQ mask reprenting the 16 IRQs in 8259, bit N is 1 means
+ * @irq_mask: IRQ mask representing the 16 IRQs in 8259, bit N is 1 means
* IRQ N is available to be routed
* @lb_bdf: irq router's PCI bus/device/function number encoding
* @ibase: IBASE register block base address
diff --git a/arch/x86/lib/fsp/fsp_dram.c b/arch/x86/lib/fsp/fsp_dram.c
index 01d498c..faa819f 100644
--- a/arch/x86/lib/fsp/fsp_dram.c
+++ b/arch/x86/lib/fsp/fsp_dram.c
@@ -121,7 +121,7 @@
ulong stack_size;
stack_size = CONFIG_IS_ENABLED(HAVE_ACPI_RESUME,
- (CONFIG_STACK_SIZE), (0));
+ (CONFIG_STACK_SIZE_RESUME), (0));
/*
* Everything between U-Boot's stack and ram top needs to be
* reserved in order for ACPI S3 resume to work.
diff --git a/board/atmel/common/board.c b/board/atmel/common/board.c
index c41706c..eee5c35 100644
--- a/board/atmel/common/board.c
+++ b/board/atmel/common/board.c
@@ -5,6 +5,7 @@
*/
#include <common.h>
+#include <dm.h>
#include <env.h>
#include <w1.h>
#include <w1-eeprom.h>
diff --git a/board/liebherr/display5/display5.c b/board/liebherr/display5/display5.c
index ada7cf5..5f44714 100644
--- a/board/liebherr/display5/display5.c
+++ b/board/liebherr/display5/display5.c
@@ -27,7 +27,6 @@
#include <i2c.h>
#include <linux/delay.h>
-#include <dm.h>
#include <dm/platform_data/serial_mxc.h>
#include <dm/platdata.h>
diff --git a/board/mscc/servalt/servalt.c b/board/mscc/servalt/servalt.c
index d0e6016..879f5de 100644
--- a/board/mscc/servalt/servalt.c
+++ b/board/mscc/servalt/servalt.c
@@ -9,6 +9,8 @@
#include <asm/io.h>
#include <led.h>
+DECLARE_GLOBAL_DATA_PTR;
+
enum {
BOARD_TYPE_PCB116 = 0xAABBCE00,
};
diff --git a/board/myir/mys_6ulx/Kconfig b/board/myir/mys_6ulx/Kconfig
new file mode 100644
index 0000000..cbf72c6
--- /dev/null
+++ b/board/myir/mys_6ulx/Kconfig
@@ -0,0 +1,12 @@
+if TARGET_MYS_6ULX
+
+config SYS_BOARD
+ default "mys_6ulx"
+
+config SYS_VENDOR
+ default "myir"
+
+config SYS_CONFIG_NAME
+ default "mys_6ulx"
+
+endif
diff --git a/board/myir/mys_6ulx/MAINTAINERS b/board/myir/mys_6ulx/MAINTAINERS
new file mode 100644
index 0000000..d4ee661
--- /dev/null
+++ b/board/myir/mys_6ulx/MAINTAINERS
@@ -0,0 +1,9 @@
+MYS_6ULX BOARD
+M: Parthiban Nallathambi <parthiban@linumiz.com>
+S: Maintained
+F: arch/arm/dts/imx6ull-myir-mys-6ulx-nand.dts
+F: arch/arm/dts/imx6ull-myir-mys-6ulx.dtsi
+F: arch/arm/dts/imx6ull-mys-6ulx-u-boot.dtsi
+F: board/myir/mys_6ulx/
+F: configs/myir_mys_6ulx_defconfig
+F: include/configs/mys_6ulx.h
diff --git a/board/myir/mys_6ulx/Makefile b/board/myir/mys_6ulx/Makefile
new file mode 100644
index 0000000..3c63e43
--- /dev/null
+++ b/board/myir/mys_6ulx/Makefile
@@ -0,0 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0+
+
+obj-y := mys_6ulx.o
+obj-$(CONFIG_SPL_BUILD) += spl.o
diff --git a/board/myir/mys_6ulx/README b/board/myir/mys_6ulx/README
new file mode 100644
index 0000000..a099665
--- /dev/null
+++ b/board/myir/mys_6ulx/README
@@ -0,0 +1,52 @@
+How to use U-Boot on MYiR MYS-6ULX Single Board Computer
+--------------------------------------------------------
+
+- Configure and build U-Boot for MYS-6ULX iMX6ULL:
+
+ $ make mrproper
+ $ make myir_mys_6ulx_defconfig
+ $ make
+
+ This will generate SPL and u-boot-dtb.img images.
+
+Boot from MMC/SD:
+- The SPL and u-boot-dtb.img images need to be flashed into the micro SD card:
+
+ $ sudo dd if=SPL of=/dev/mmcblk0 bs=1k seek=1; sync
+ $ sudo dd if=u-boot-dtb.img of=/dev/mmcblk0 bs=1k seek=69; sync
+
+- Boot mode settings:
+
+ Boot switch position: SW1 -> 0
+ SW2 -> 1
+ SW3 -> 0
+ SW4 -> 1
+
+Boot from NAND:
+- Boot the board using SD/MMC or Serial download and load the SPL into memory
+either from SD/MMC or TFTP.
+
+Default MTD layout is 512k(spl),1m(uboot),1m(uboot-dup),-(ubi)
+
+Flash SPL to NAND from SD/MMC,
+
+ $ ext4load mmc 0:2 $loadaddr SPL
+ $ nand erase.part spl
+ $ nandbcb init $loadaddr 0x0 $filesize
+
+Flash u-boot proper to NAND from SD/MMC,
+
+ $ ext4load mmc 0:2 $loadaddr u-boot-dtb.img
+ $ nand erase.part uboot
+ $ nand write $loadaddr uboot $filesize
+
+- Boot mode settings:
+
+ Boot switch position: SW1 -> 1
+ SW2 -> 0
+ SW3 -> 0
+ SW4 -> 1
+
+- Connect the Serial cable to UART0 and the PC for the console.
+
+- Reset the board using and U-Boot should boot from NAND.
diff --git a/board/myir/mys_6ulx/mys_6ulx.c b/board/myir/mys_6ulx/mys_6ulx.c
new file mode 100644
index 0000000..d886af0
--- /dev/null
+++ b/board/myir/mys_6ulx/mys_6ulx.c
@@ -0,0 +1,117 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2020 Linumiz
+ * Author: Parthiban Nallathambi <parthiban@linumiz.com>
+ */
+
+#include <init.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/crm_regs.h>
+#include <asm/arch/mx6-pins.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/mach-imx/iomux-v3.h>
+#include <asm/mach-imx/mxc_i2c.h>
+#include <fsl_esdhc_imx.h>
+#include <linux/bitops.h>
+#include <miiphy.h>
+#include <netdev.h>
+#include <usb.h>
+#include <usb/ehci-ci.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int dram_init(void)
+{
+ gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
+
+ return 0;
+}
+
+#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
+ PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
+ PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | \
+ PAD_CTL_HYS)
+
+static iomux_v3_cfg_t const uart1_pads[] = {
+ MX6_PAD_UART1_TX_DATA__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
+ MX6_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
+};
+
+static iomux_v3_cfg_t const uart5_pads[] = {
+ MX6_PAD_UART5_TX_DATA__UART5_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
+ MX6_PAD_UART5_RX_DATA__UART5_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
+ MX6_PAD_GPIO1_IO09__UART5_DCE_CTS | MUX_PAD_CTRL(UART_PAD_CTRL),
+ MX6_PAD_GPIO1_IO08__UART5_DCE_RTS | MUX_PAD_CTRL(UART_PAD_CTRL),
+};
+
+static void setup_iomux_uart(void)
+{
+ imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
+ imx_iomux_v3_setup_multiple_pads(uart5_pads, ARRAY_SIZE(uart5_pads));
+}
+
+#ifdef CONFIG_FEC_MXC
+
+static int setup_fec(void)
+{
+ struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
+ int ret;
+
+ /*
+ * Use 50M anatop loopback REF_CLK1 for ENET1,
+ * clear gpr1[13], set gpr1[17].
+ */
+ clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC1_MASK,
+ IOMUX_GPR1_FEC1_CLOCK_MUX1_SEL_MASK);
+
+ ret = enable_fec_anatop_clock(0, ENET_50MHZ);
+ if (ret)
+ return ret;
+
+ enable_enet_clk(1);
+
+ return 0;
+}
+
+int board_phy_config(struct phy_device *phydev)
+{
+ /*
+ * Defaults + Enable status LEDs (LED1: Activity, LED0: Link) & select
+ * 50 MHz RMII clock mode.
+ */
+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1f, 0x8190);
+
+ if (phydev->drv->config)
+ phydev->drv->config(phydev);
+
+ return 0;
+}
+#endif /* CONFIG_FEC_MXC */
+
+int board_early_init_f(void)
+{
+ setup_iomux_uart();
+
+ return 0;
+}
+
+int board_init(void)
+{
+ /* Address of boot parameters */
+ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
+
+#ifdef CONFIG_FEC_MXC
+ setup_fec();
+#endif
+ return 0;
+}
+
+int checkboard(void)
+{
+ u32 cpurev = get_cpu_rev();
+
+ printf("Board: MYiR MYS-6ULX %s Single Board Computer\n",
+ get_imx_type((cpurev & 0xFF000) >> 12));
+
+ return 0;
+}
diff --git a/board/myir/mys_6ulx/spl.c b/board/myir/mys_6ulx/spl.c
new file mode 100644
index 0000000..5cd4d05
--- /dev/null
+++ b/board/myir/mys_6ulx/spl.c
@@ -0,0 +1,206 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2020 Linumiz
+ * Author: Parthiban Nallathambi <parthiban@linumiz.com>
+ */
+
+#include <common.h>
+#include <init.h>
+#include <spl.h>
+#include <asm/arch/clock.h>
+#include <asm/io.h>
+#include <asm/arch/mx6-ddr.h>
+#include <asm/arch/mx6-pins.h>
+#include <asm/arch/crm_regs.h>
+#include <asm/arch/sys_proto.h>
+#include <fsl_esdhc_imx.h>
+
+/* Configuration for Micron MT41K128M16JT-125, 32M x 16 x 8 -> 256MiB */
+
+static struct mx6ul_iomux_grp_regs mx6_grp_ioregs = {
+ .grp_addds = 0x00000030,
+ .grp_ddrmode_ctl = 0x00020000,
+ .grp_b0ds = 0x00000030,
+ .grp_ctlds = 0x00000030,
+ .grp_b1ds = 0x00000030,
+ .grp_ddrpke = 0x00000000,
+ .grp_ddrmode = 0x00020000,
+ .grp_ddr_type = 0x000c0000,
+};
+
+static struct mx6ul_iomux_ddr_regs mx6_ddr_ioregs = {
+ .dram_dqm0 = 0x00000030,
+ .dram_dqm1 = 0x00000030,
+ .dram_ras = 0x00000030,
+ .dram_cas = 0x00000030,
+ .dram_odt0 = 0x00000030,
+ .dram_odt1 = 0x00000030,
+ .dram_sdba2 = 0x00000000,
+ .dram_sdclk_0 = 0x00000030,
+ .dram_sdqs0 = 0x00000030,
+ .dram_sdqs1 = 0x00000030,
+ .dram_reset = 0x00000030,
+};
+
+static struct mx6_mmdc_calibration mx6_mmcd_calib = {
+ .p0_mpwldectrl0 = 0x00000000,
+ .p0_mpdgctrl0 = 0x41480148,
+ .p0_mprddlctl = 0x40403E42,
+ .p0_mpwrdlctl = 0x40405852,
+};
+
+struct mx6_ddr_sysinfo ddr_sysinfo = {
+ .dsize = 0, /* Bus size = 16bit */
+ .cs_density = 32,
+ .ncs = 1,
+ .cs1_mirror = 0,
+ .rtt_wr = 1,
+ .rtt_nom = 1,
+ .walat = 1, /* Write additional latency */
+ .ralat = 5, /* Read additional latency */
+ .mif3_mode = 3, /* Command prediction working mode */
+ .bi_on = 1, /* Bank interleaving enabled */
+ .pd_fast_exit = 1,
+ .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */
+ .rst_to_cke = 0x23, /* 33 cycles, 500us (JEDEC default) */
+ .ddr_type = DDR_TYPE_DDR3,
+ .refsel = 1, /* Refresh cycles at 32KHz */
+ .refr = 7, /* 8 refresh commands per refresh cycle */
+};
+
+/* MT41K128M16JT-125 (2Gb density) */
+static struct mx6_ddr3_cfg mem_ddr = {
+ .mem_speed = 1600,
+ .density = 2,
+ .width = 16,
+ .banks = 8,
+ .rowaddr = 14,
+ .coladdr = 10,
+ .pagesz = 2,
+ .trcd = 1375,
+ .trcmin = 4875,
+ .trasmin = 3500,
+};
+
+static void ccgr_init(void)
+{
+ struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
+
+ writel(0xFFFFFFFF, &ccm->CCGR0);
+ writel(0xFFFFFFFF, &ccm->CCGR1);
+ writel(0xFFFFFFFF, &ccm->CCGR2);
+ writel(0xFFFFFFFF, &ccm->CCGR3);
+ writel(0xFFFFFFFF, &ccm->CCGR4);
+ writel(0xFFFFFFFF, &ccm->CCGR5);
+ writel(0xFFFFFFFF, &ccm->CCGR6);
+}
+
+static void spl_dram_init(void)
+{
+ mx6ul_dram_iocfg(mem_ddr.width, &mx6_ddr_ioregs, &mx6_grp_ioregs);
+ mx6_dram_cfg(&ddr_sysinfo, &mx6_mmcd_calib, &mem_ddr);
+}
+
+#ifdef CONFIG_FSL_ESDHC_IMX
+
+#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
+ PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_LOW | \
+ PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | \
+ PAD_CTL_HYS)
+
+static iomux_v3_cfg_t const usdhc1_pads[] = {
+ MX6_PAD_SD1_CLK__USDHC1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_SD1_CMD__USDHC1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_SD1_DATA0__USDHC1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_SD1_DATA1__USDHC1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_SD1_DATA2__USDHC1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_SD1_DATA3__USDHC1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_UART1_RTS_B__USDHC1_CD_B | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+};
+
+#ifndef CONFIG_NAND_MXS
+static iomux_v3_cfg_t const usdhc2_pads[] = {
+ MX6_PAD_NAND_RE_B__USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_NAND_WE_B__USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_NAND_DATA00__USDHC2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_NAND_DATA01__USDHC2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_NAND_DATA02__USDHC2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_NAND_DATA03__USDHC2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_NAND_DATA04__USDHC2_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_NAND_DATA05__USDHC2_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_NAND_DATA06__USDHC2_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_NAND_DATA07__USDHC2_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+};
+#endif
+
+static struct fsl_esdhc_cfg usdhc_cfg[] = {
+ {
+ .esdhc_base = USDHC1_BASE_ADDR,
+ .max_bus_width = 4,
+ },
+#ifndef CONFIG_NAND_MXS
+ {
+ .esdhc_base = USDHC2_BASE_ADDR,
+ .max_bus_width = 8,
+ },
+#endif
+};
+
+int board_mmc_getcd(struct mmc *mmc)
+{
+ return 1;
+}
+
+int board_mmc_init(struct bd_info *bis)
+{
+ int i, ret;
+
+ for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) {
+ switch (i) {
+ case 0:
+ SETUP_IOMUX_PADS(usdhc1_pads);
+ usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
+ break;
+#ifndef CONFIG_NAND_MXS
+ case 1:
+ SETUP_IOMUX_PADS(usdhc2_pads);
+ usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
+ break;
+#endif
+ default:
+ printf("Warning - USDHC%d controller not supporting\n",
+ i + 1);
+ return 0;
+ }
+
+ ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]);
+ if (ret) {
+ printf("Warning: failed to initialize mmc dev %d\n", i);
+ return ret;
+ }
+ }
+
+ return 0;
+}
+
+#endif /* CONFIG_FSL_ESDHC_IMX */
+
+void board_init_f(ulong dummy)
+{
+ ccgr_init();
+
+ /* Setup AIPS and disable watchdog */
+ arch_cpu_init();
+
+ /* Setup iomux and fec */
+ board_early_init_f();
+
+ /* Setup GP timer */
+ timer_init();
+
+ /* UART clocks enabled and gd valid - init serial console */
+ preloader_console_init();
+
+ /* DDR initialization */
+ spl_dram_init();
+}
diff --git a/board/phytec/pcm058/README b/board/phytec/pcm058/README
index 02be099..687366b 100644
--- a/board/phytec/pcm058/README
+++ b/board/phytec/pcm058/README
@@ -61,17 +61,21 @@
=> sf probe
=> sf erase 0x0 0x1000000
-Load the SPL from raw MMC into memory and copy to the SPI. The SPL is maximum
-392*512-byte blocks in size therefore 0x188 blocks, totaling 0x31000 bytes:
+Load the equivalent of u-boot-with-spl.imx from the raw MMC into memory and
+copy to the SPI. The SPL is expected at an offset of 0x400, and its size is
+maximum 392*512-byte blocks in size, therefore 0x188 blocks, totaling 0x31000
+bytes. Assume U-boot should fit into 640KiB, therefore 0x500 512-byte blocks,
+totalling 0xA0000 bytes. Adding these together:
-=> mmc read ${loadaddr} 0x2 0x188
-=> sf write ${loadaddr} 0x400 0x31000
+=> mmc read ${loadaddr} 0x2 0x688
+=> sf write ${loadaddr} 0x400 0xD1000
-Load the U-boot binary into memory and copy to the SPI. U-boot should fit into
-640KiB, so 0x500 512-byte blocks, totalling 0xA0000 bytes:
+The SPL is located at offset 0x400, and U-boot at 0x31400 in SPI flash, as to
+match the SD Card layout. This would allow, instead of reading from the SD Card
+above, with networking and TFTP correctly configured, the equivalent of:
-=> mmc read ${loadaddr} 0x18a 0x500
-=> sf write ${loadaddr} 0x40000 0xA0000
+=> tftp u-boot-with-spl.imx
+=> sf write ${fileaddr} 0x400 ${filesize}
The default NAND bootscripts expect a single MTD partition named "rootfs",
which in turn contains the UBI volumes "fit" (which contains the kernel fit-
diff --git a/board/st/common/stm32mp_dfu.c b/board/st/common/stm32mp_dfu.c
index 0cda919..38eb0f2 100644
--- a/board/st/common/stm32mp_dfu.c
+++ b/board/st/common/stm32mp_dfu.c
@@ -5,6 +5,7 @@
#include <common.h>
#include <blk.h>
+#include <dm.h>
#include <dfu.h>
#include <env.h>
#include <memalign.h>
diff --git a/board/toradex/colibri-imx6ull/colibri-imx6ull.c b/board/toradex/colibri-imx6ull/colibri-imx6ull.c
index 55e2b5f..89b99a0 100644
--- a/board/toradex/colibri-imx6ull/colibri-imx6ull.c
+++ b/board/toradex/colibri-imx6ull/colibri-imx6ull.c
@@ -57,32 +57,7 @@
}
#endif /* CONFIG_NAND_MXS */
-#ifdef CONFIG_VIDEO_MXS
-static iomux_v3_cfg_t const lcd_pads[] = {
- MX6_PAD_LCD_CLK__LCDIF_CLK | MUX_PAD_CTRL(LCD_PAD_CTRL),
- MX6_PAD_LCD_ENABLE__LCDIF_ENABLE | MUX_PAD_CTRL(LCD_PAD_CTRL),
- MX6_PAD_LCD_HSYNC__LCDIF_HSYNC | MUX_PAD_CTRL(LCD_PAD_CTRL),
- MX6_PAD_LCD_CLK__LCDIF_CLK | MUX_PAD_CTRL(LCD_PAD_CTRL),
- MX6_PAD_LCD_DATA00__LCDIF_DATA00 | MUX_PAD_CTRL(LCD_PAD_CTRL),
- MX6_PAD_LCD_DATA01__LCDIF_DATA01 | MUX_PAD_CTRL(LCD_PAD_CTRL),
- MX6_PAD_LCD_DATA02__LCDIF_DATA02 | MUX_PAD_CTRL(LCD_PAD_CTRL),
- MX6_PAD_LCD_DATA03__LCDIF_DATA03 | MUX_PAD_CTRL(LCD_PAD_CTRL),
- MX6_PAD_LCD_DATA04__LCDIF_DATA04 | MUX_PAD_CTRL(LCD_PAD_CTRL),
- MX6_PAD_LCD_DATA05__LCDIF_DATA05 | MUX_PAD_CTRL(LCD_PAD_CTRL),
- MX6_PAD_LCD_DATA06__LCDIF_DATA06 | MUX_PAD_CTRL(LCD_PAD_CTRL),
- MX6_PAD_LCD_DATA07__LCDIF_DATA07 | MUX_PAD_CTRL(LCD_PAD_CTRL),
- MX6_PAD_LCD_DATA08__LCDIF_DATA08 | MUX_PAD_CTRL(LCD_PAD_CTRL),
- MX6_PAD_LCD_DATA09__LCDIF_DATA09 | MUX_PAD_CTRL(LCD_PAD_CTRL),
- MX6_PAD_LCD_DATA10__LCDIF_DATA10 | MUX_PAD_CTRL(LCD_PAD_CTRL),
- MX6_PAD_LCD_DATA11__LCDIF_DATA11 | MUX_PAD_CTRL(LCD_PAD_CTRL),
- MX6_PAD_LCD_DATA12__LCDIF_DATA12 | MUX_PAD_CTRL(LCD_PAD_CTRL),
- MX6_PAD_LCD_DATA13__LCDIF_DATA13 | MUX_PAD_CTRL(LCD_PAD_CTRL),
- MX6_PAD_LCD_DATA14__LCDIF_DATA14 | MUX_PAD_CTRL(LCD_PAD_CTRL),
- MX6_PAD_LCD_DATA15__LCDIF_DATA15 | MUX_PAD_CTRL(LCD_PAD_CTRL),
- MX6_PAD_LCD_DATA16__LCDIF_DATA16 | MUX_PAD_CTRL(LCD_PAD_CTRL),
- MX6_PAD_LCD_DATA17__LCDIF_DATA17 | MUX_PAD_CTRL(LCD_PAD_CTRL),
-};
-
+#ifdef CONFIG_DM_VIDEO
static iomux_v3_cfg_t const backlight_pads[] = {
/* Backlight On */
MX6_PAD_JTAG_TMS__GPIO1_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL),
@@ -95,8 +70,6 @@
static int setup_lcd(void)
{
- imx_iomux_v3_setup_multiple_pads(lcd_pads, ARRAY_SIZE(lcd_pads));
-
imx_iomux_v3_setup_multiple_pads(backlight_pads, ARRAY_SIZE(backlight_pads));
/* Set BL_ON */
@@ -153,11 +126,6 @@
#ifdef CONFIG_NAND_MXS
setup_gpmi_nand();
#endif
-
-#ifdef CONFIG_VIDEO_MXS
- setup_lcd();
-#endif
-
return 0;
}
@@ -203,6 +171,12 @@
}
#endif /* CONFIG_CMD_USB_SDP */
+#if defined(CONFIG_DM_VIDEO)
+ setup_lcd();
+
+ show_boot_logo();
+#endif
+
return 0;
}
diff --git a/board/toradex/colibri_imx7/MAINTAINERS b/board/toradex/colibri_imx7/MAINTAINERS
index 82246be..61a5044 100644
--- a/board/toradex/colibri_imx7/MAINTAINERS
+++ b/board/toradex/colibri_imx7/MAINTAINERS
@@ -9,5 +9,6 @@
F: configs/colibri_imx7_defconfig
F: configs/colibri_imx7_emmc_defconfig
F: arch/arm/dts/imx7-colibri.dtsi
+F: arch/arm/dts/imx7-colibri-u-boot.dtsi
F: arch/arm/dts/imx7-colibri-emmc.dts
F: arch/arm/dts/imx7-colibri-rawnand.dts
diff --git a/board/toradex/colibri_imx7/colibri_imx7.c b/board/toradex/colibri_imx7/colibri_imx7.c
index 26c285d..14df3fc 100644
--- a/board/toradex/colibri_imx7/colibri_imx7.c
+++ b/board/toradex/colibri_imx7/colibri_imx7.c
@@ -100,32 +100,7 @@
}
#endif
-#ifdef CONFIG_VIDEO_MXS
-static iomux_v3_cfg_t const lcd_pads[] = {
- MX7D_PAD_LCD_CLK__LCD_CLK | MUX_PAD_CTRL(LCD_PAD_CTRL),
- MX7D_PAD_LCD_ENABLE__LCD_ENABLE | MUX_PAD_CTRL(LCD_PAD_CTRL),
- MX7D_PAD_LCD_HSYNC__LCD_HSYNC | MUX_PAD_CTRL(LCD_PAD_CTRL),
- MX7D_PAD_LCD_VSYNC__LCD_VSYNC | MUX_PAD_CTRL(LCD_PAD_CTRL),
- MX7D_PAD_LCD_DATA00__LCD_DATA0 | MUX_PAD_CTRL(LCD_PAD_CTRL),
- MX7D_PAD_LCD_DATA01__LCD_DATA1 | MUX_PAD_CTRL(LCD_PAD_CTRL),
- MX7D_PAD_LCD_DATA02__LCD_DATA2 | MUX_PAD_CTRL(LCD_PAD_CTRL),
- MX7D_PAD_LCD_DATA03__LCD_DATA3 | MUX_PAD_CTRL(LCD_PAD_CTRL),
- MX7D_PAD_LCD_DATA04__LCD_DATA4 | MUX_PAD_CTRL(LCD_PAD_CTRL),
- MX7D_PAD_LCD_DATA05__LCD_DATA5 | MUX_PAD_CTRL(LCD_PAD_CTRL),
- MX7D_PAD_LCD_DATA06__LCD_DATA6 | MUX_PAD_CTRL(LCD_PAD_CTRL),
- MX7D_PAD_LCD_DATA07__LCD_DATA7 | MUX_PAD_CTRL(LCD_PAD_CTRL),
- MX7D_PAD_LCD_DATA08__LCD_DATA8 | MUX_PAD_CTRL(LCD_PAD_CTRL),
- MX7D_PAD_LCD_DATA09__LCD_DATA9 | MUX_PAD_CTRL(LCD_PAD_CTRL),
- MX7D_PAD_LCD_DATA10__LCD_DATA10 | MUX_PAD_CTRL(LCD_PAD_CTRL),
- MX7D_PAD_LCD_DATA11__LCD_DATA11 | MUX_PAD_CTRL(LCD_PAD_CTRL),
- MX7D_PAD_LCD_DATA12__LCD_DATA12 | MUX_PAD_CTRL(LCD_PAD_CTRL),
- MX7D_PAD_LCD_DATA13__LCD_DATA13 | MUX_PAD_CTRL(LCD_PAD_CTRL),
- MX7D_PAD_LCD_DATA14__LCD_DATA14 | MUX_PAD_CTRL(LCD_PAD_CTRL),
- MX7D_PAD_LCD_DATA15__LCD_DATA15 | MUX_PAD_CTRL(LCD_PAD_CTRL),
- MX7D_PAD_LCD_DATA16__LCD_DATA16 | MUX_PAD_CTRL(LCD_PAD_CTRL),
- MX7D_PAD_LCD_DATA17__LCD_DATA17 | MUX_PAD_CTRL(LCD_PAD_CTRL),
-};
-
+#ifdef CONFIG_DM_VIDEO
static iomux_v3_cfg_t const backlight_pads[] = {
/* Backlight On */
MX7D_PAD_SD1_WP__GPIO5_IO1 | MUX_PAD_CTRL(NO_PAD_CTRL),
@@ -139,8 +114,6 @@
static int setup_lcd(void)
{
- imx_iomux_v3_setup_multiple_pads(lcd_pads, ARRAY_SIZE(lcd_pads));
-
imx_iomux_v3_setup_multiple_pads(backlight_pads, ARRAY_SIZE(backlight_pads));
/* Set BL_ON */
@@ -215,10 +188,6 @@
setup_gpmi_nand();
#endif
-#ifdef CONFIG_VIDEO_MXS
- setup_lcd();
-#endif
-
#ifdef CONFIG_USB_EHCI_MX7
imx_iomux_v3_setup_multiple_pads(usb_cdet_pads, ARRAY_SIZE(usb_cdet_pads));
gpio_request(USB_CDET_GPIO, "usb-cdet-gpio");
@@ -382,4 +351,15 @@
return USB_INIT_HOST;
}
}
+
+int board_late_init(void)
+{
+#if defined(CONFIG_DM_VIDEO)
+ setup_lcd();
+
+ show_boot_logo();
+#endif
+ return 0;
+}
+
#endif
diff --git a/board/toradex/common/Kconfig b/board/toradex/common/Kconfig
index 11f4aab..36068d2 100644
--- a/board/toradex/common/Kconfig
+++ b/board/toradex/common/Kconfig
@@ -20,6 +20,12 @@
config TDX_HAVE_NOR
bool
+config TDX_HAVE_EEPROM
+ bool
+
+config TDX_HAVE_EEPROM_EXTRA
+ bool
+
if TDX_CFG_BLOCK
config TDX_CFG_BLOCK_IS_IN_MMC
@@ -37,6 +43,11 @@
depends on TDX_HAVE_NOR
default y
+config TDX_CFG_BLOCK_IS_IN_EEPROM
+ bool
+ depends on TDX_HAVE_EEPROM
+ default y
+
config TDX_CFG_BLOCK_DEV
int "Toradex config block eMMC device ID"
depends on TDX_CFG_BLOCK_IS_IN_MMC
@@ -66,4 +77,11 @@
Ethernet carrier boards. This options enables the code to set the
second Ethernet address as environment variable (eth1addr).
+config TDX_CFG_BLOCK_EXTRA
+ bool "Support for additional EEPROMs (carrier board, display adapter)"
+ depends on TDX_HAVE_EEPROM_EXTRA
+ help
+ Enables fetching auxilary config blocks from carrier board/display
+ adapter EEPROMs.
+
endif
diff --git a/board/toradex/common/Makefile b/board/toradex/common/Makefile
index 6b9fccb..7b19b6e 100644
--- a/board/toradex/common/Makefile
+++ b/board/toradex/common/Makefile
@@ -8,4 +8,5 @@
else
obj-$(CONFIG_TDX_CFG_BLOCK) += tdx-cfg-block.o
obj-y += tdx-common.o
+obj-y += tdx-eeprom.o
endif
diff --git a/board/toradex/common/tdx-cfg-block.c b/board/toradex/common/tdx-cfg-block.c
index 75216ec..bf27b2f 100644
--- a/board/toradex/common/tdx-cfg-block.c
+++ b/board/toradex/common/tdx-cfg-block.c
@@ -5,6 +5,8 @@
#include <common.h>
#include "tdx-cfg-block.h"
+#include "tdx-eeprom.h"
+
#include <command.h>
#include <asm/cache.h>
@@ -37,21 +39,31 @@
#define TAG_VALID 0xcf01
#define TAG_MAC 0x0000
+#define TAG_CAR_SERIAL 0x0021
#define TAG_HW 0x0008
#define TAG_INVALID 0xffff
#define TAG_FLAG_VALID 0x1
+#define TDX_EEPROM_ID_MODULE 0
+#define TDX_EEPROM_ID_CARRIER 1
+
#if defined(CONFIG_TDX_CFG_BLOCK_IS_IN_MMC)
#define TDX_CFG_BLOCK_MAX_SIZE 512
#elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NAND)
#define TDX_CFG_BLOCK_MAX_SIZE 64
#elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NOR)
#define TDX_CFG_BLOCK_MAX_SIZE 64
+#elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_EEPROM)
+#define TDX_CFG_BLOCK_MAX_SIZE 64
#else
#error Toradex config block location not set
#endif
+#ifdef CONFIG_TDX_CFG_BLOCK_EXTRA
+#define TDX_CFG_BLOCK_EXTRA_MAX_SIZE 64
+#endif
+
struct toradex_tag {
u32 len:14;
u32 flags:2;
@@ -62,6 +74,11 @@
struct toradex_hw tdx_hw_tag;
struct toradex_eth_addr tdx_eth_addr;
u32 tdx_serial;
+#ifdef CONFIG_TDX_CFG_BLOCK_EXTRA
+u32 tdx_car_serial;
+bool valid_cfgblock_carrier;
+struct toradex_hw tdx_car_hw_tag;
+#endif
const char * const toradex_modules[] = {
[0] = "UNKNOWN MODULE",
@@ -124,6 +141,18 @@
[57] = "Verdin iMX8M Mini DualLite 1GB",
};
+const char * const toradex_carrier_boards[] = {
+ [0] = "UNKNOWN CARRIER BOARD",
+ [155] = "Dahlia",
+ [156] = "Verdin Development Board",
+};
+
+const char * const toradex_display_adapters[] = {
+ [0] = "UNKNOWN DISPLAY ADAPTER",
+ [157] = "Verdin DSI to HDMI Adapter",
+ [159] = "Verdin DSI to LVDS Adapter",
+};
+
#ifdef CONFIG_TDX_CFG_BLOCK_IS_IN_MMC
static int tdx_cfg_block_mmc_storage(u8 *config_block, int write)
{
@@ -224,6 +253,20 @@
}
#endif
+#ifdef CONFIG_TDX_CFG_BLOCK_IS_IN_EEPROM
+static int read_tdx_cfg_block_from_eeprom(unsigned char *config_block)
+{
+ return read_tdx_eeprom_data(TDX_EEPROM_ID_MODULE, 0x0, config_block,
+ TDX_CFG_BLOCK_MAX_SIZE);
+}
+
+static int write_tdx_cfg_block_to_eeprom(unsigned char *config_block)
+{
+ return write_tdx_eeprom_data(TDX_EEPROM_ID_MODULE, 0x0, config_block,
+ TDX_CFG_BLOCK_MAX_SIZE);
+}
+#endif
+
int read_tdx_cfg_block(void)
{
int ret = 0;
@@ -247,6 +290,8 @@
ret = read_tdx_cfg_block_from_nand(config_block);
#elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NOR)
ret = read_tdx_cfg_block_from_nor(config_block);
+#elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_EEPROM)
+ ret = read_tdx_cfg_block_from_eeprom(config_block);
#else
ret = -EINVAL;
#endif
@@ -263,7 +308,12 @@
valid_cfgblock = true;
offset = 4;
- while (offset < TDX_CFG_BLOCK_MAX_SIZE) {
+ /*
+ * check if there is enough space for storing tag and value of the
+ * biggest element
+ */
+ while (offset + sizeof(struct toradex_tag) +
+ sizeof(struct toradex_hw) < TDX_CFG_BLOCK_MAX_SIZE) {
tag = (struct toradex_tag *)(config_block + offset);
offset += 4;
if (tag->id == TAG_INVALID)
@@ -322,7 +372,6 @@
it = 'y';
#endif
-
#if defined(CONFIG_TARGET_APALIS_IMX8) || \
defined(CONFIG_TARGET_APALIS_IMX8X) || \
defined(CONFIG_TARGET_COLIBRI_IMX6ULL) || \
@@ -493,7 +542,8 @@
return 0;
}
-static int get_cfgblock_barcode(char *barcode)
+static int get_cfgblock_barcode(char *barcode, struct toradex_hw *tag,
+ u32 *serial)
{
if (strlen(barcode) < 16) {
printf("Argument too short, barcode is 16 chars long\n");
@@ -501,31 +551,232 @@
}
/* Get hardware information from the first 8 digits */
- tdx_hw_tag.ver_major = barcode[4] - '0';
- tdx_hw_tag.ver_minor = barcode[5] - '0';
- tdx_hw_tag.ver_assembly = barcode[7] - '0';
+ tag->ver_major = barcode[4] - '0';
+ tag->ver_minor = barcode[5] - '0';
+ tag->ver_assembly = barcode[7] - '0';
barcode[4] = '\0';
- tdx_hw_tag.prodid = simple_strtoul(barcode, NULL, 10);
+ tag->prodid = simple_strtoul(barcode, NULL, 10);
/* Parse second part of the barcode (serial number */
barcode += 8;
- tdx_serial = simple_strtoul(barcode, NULL, 10);
+ *serial = simple_strtoul(barcode, NULL, 10);
return 0;
}
-static int do_cfgblock_create(struct cmd_tbl *cmdtp, int flag, int argc,
- char *const argv[])
+static int write_tag(u8 *config_block, int *offset, int tag_id,
+ u8 *tag_data, size_t tag_data_size)
{
- u8 *config_block;
struct toradex_tag *tag;
- size_t size = TDX_CFG_BLOCK_MAX_SIZE;
+
+ if (!offset || !config_block)
+ return -EINVAL;
+
+ tag = (struct toradex_tag *)(config_block + *offset);
+ tag->id = tag_id;
+ tag->flags = TAG_FLAG_VALID;
+ /* len is provided as number of 32bit values after the tag */
+ tag->len = (tag_data_size + sizeof(u32) - 1) / sizeof(u32);
+ *offset += sizeof(struct toradex_tag);
+ if (tag_data && tag_data_size) {
+ memcpy(config_block + *offset, tag_data,
+ tag_data_size);
+ *offset += tag_data_size;
+ }
+
+ return 0;
+}
+
+#ifdef CONFIG_TDX_CFG_BLOCK_EXTRA
+int read_tdx_cfg_block_carrier(void)
+{
+ int ret = 0;
+ u8 *config_block = NULL;
+ struct toradex_tag *tag;
+ size_t size = TDX_CFG_BLOCK_EXTRA_MAX_SIZE;
+ int offset;
+
+ /* Allocate RAM area for carrier config block */
+ config_block = memalign(ARCH_DMA_MINALIGN, size);
+ if (!config_block) {
+ printf("Not enough malloc space available!\n");
+ return -ENOMEM;
+ }
+
+ memset(config_block, 0, size);
+
+ ret = read_tdx_eeprom_data(TDX_EEPROM_ID_CARRIER, 0x0, config_block,
+ size);
+ if (ret)
+ return ret;
+
+ /* Expect a valid tag first */
+ tag = (struct toradex_tag *)config_block;
+ if (tag->flags != TAG_FLAG_VALID || tag->id != TAG_VALID) {
+ valid_cfgblock_carrier = false;
+ ret = -EINVAL;
+ goto out;
+ }
+ valid_cfgblock_carrier = true;
+ offset = 4;
+
+ while (offset + sizeof(struct toradex_tag) +
+ sizeof(struct toradex_hw) < TDX_CFG_BLOCK_MAX_SIZE) {
+ tag = (struct toradex_tag *)(config_block + offset);
+ offset += 4;
+ if (tag->id == TAG_INVALID)
+ break;
+
+ if (tag->flags == TAG_FLAG_VALID) {
+ switch (tag->id) {
+ case TAG_CAR_SERIAL:
+ memcpy(&tdx_car_serial, config_block + offset,
+ sizeof(tdx_car_serial));
+ break;
+ case TAG_HW:
+ memcpy(&tdx_car_hw_tag, config_block +
+ offset, 8);
+ break;
+ }
+ }
+
+ /* Get to next tag according to current tags length */
+ offset += tag->len * 4;
+ }
+out:
+ free(config_block);
+ return ret;
+}
+
+int check_pid8_sanity(char *pid8)
+{
+ char s_carrierid_verdin_dev[5];
+ char s_carrierid_dahlia[5];
+
+ sprintf(s_carrierid_verdin_dev, "0%d", VERDIN_DEVELOPMENT_BOARD);
+ sprintf(s_carrierid_dahlia, "0%d", DAHLIA);
+
+ /* sane value check, first 4 chars which represent carrier id */
+ if (!strncmp(pid8, s_carrierid_verdin_dev, 4))
+ return 0;
+
+ if (!strncmp(pid8, s_carrierid_dahlia, 4))
+ return 0;
+
+ return -EINVAL;
+}
+
+int try_migrate_tdx_cfg_block_carrier(void)
+{
+ char pid8[8];
+ int offset = 0;
+ int ret = CMD_RET_SUCCESS;
+ size_t size = TDX_CFG_BLOCK_EXTRA_MAX_SIZE;
+ u8 *config_block;
+
+ memset(pid8, 0x0, 8);
+ ret = read_tdx_eeprom_data(TDX_EEPROM_ID_CARRIER, 0x0, (u8 *)pid8, 8);
+ if (ret)
+ return ret;
+
+ if (check_pid8_sanity(pid8))
+ return -EINVAL;
+
+ /* Allocate RAM area for config block */
+ config_block = memalign(ARCH_DMA_MINALIGN, size);
+ if (!config_block) {
+ printf("Not enough malloc space available!\n");
+ return CMD_RET_FAILURE;
+ }
+
+ memset(config_block, 0xff, size);
+ /* we try parse PID8 concatenating zeroed serial number */
+ tdx_car_hw_tag.ver_major = pid8[4] - '0';
+ tdx_car_hw_tag.ver_minor = pid8[5] - '0';
+ tdx_car_hw_tag.ver_assembly = pid8[7] - '0';
+
+ pid8[4] = '\0';
+ tdx_car_hw_tag.prodid = simple_strtoul(pid8, NULL, 10);
+
+ /* Valid Tag */
+ write_tag(config_block, &offset, TAG_VALID, NULL, 0);
+
+ /* Product Tag */
+ write_tag(config_block, &offset, TAG_HW, (u8 *)&tdx_car_hw_tag,
+ sizeof(tdx_car_hw_tag));
+
+ /* Serial Tag */
+ write_tag(config_block, &offset, TAG_CAR_SERIAL, (u8 *)&tdx_car_serial,
+ sizeof(tdx_car_serial));
+
+ memset(config_block + offset, 0, 32 - offset);
+ ret = write_tdx_eeprom_data(TDX_EEPROM_ID_CARRIER, 0x0, config_block,
+ size);
+ if (ret) {
+ printf("Failed to write Toradex Extra config block: %d\n",
+ ret);
+ ret = CMD_RET_FAILURE;
+ goto out;
+ }
+
+ printf("Successfully migrated to Toradex Config Block from PID8\n");
+
+out:
+ free(config_block);
+ return ret;
+}
+
+static int get_cfgblock_carrier_interactive(void)
+{
+ char message[CONFIG_SYS_CBSIZE];
+ int len;
+
+ printf("Supported carrier boards:\n");
+ printf("CARRIER BOARD NAME\t\t [ID]\n");
+ for (int i = 0; i < sizeof(toradex_carrier_boards) /
+ sizeof(toradex_carrier_boards[0]); i++)
+ if (toradex_carrier_boards[i])
+ printf("%s \t\t [%d]\n", toradex_carrier_boards[i], i);
+
+ sprintf(message, "Choose your carrier board (provide ID): ");
+ len = cli_readline(message);
+ tdx_car_hw_tag.prodid = simple_strtoul(console_buffer, NULL, 10);
+
+ do {
+ sprintf(message, "Enter carrier board version (e.g. V1.1B): V");
+ len = cli_readline(message);
+ } while (len < 4);
+
+ tdx_car_hw_tag.ver_major = console_buffer[0] - '0';
+ tdx_car_hw_tag.ver_minor = console_buffer[2] - '0';
+ tdx_car_hw_tag.ver_assembly = console_buffer[3] - 'A';
+
+ while (len < 8) {
+ sprintf(message, "Enter carrier board serial number: ");
+ len = cli_readline(message);
+ }
+
+ tdx_car_serial = simple_strtoul(console_buffer, NULL, 10);
+
+ return 0;
+}
+
+static int do_cfgblock_carrier_create(struct cmd_tbl *cmdtp, int flag, int argc,
+ char * const argv[])
+{
+ u8 *config_block;
+ size_t size = TDX_CFG_BLOCK_EXTRA_MAX_SIZE;
int offset = 0;
int ret = CMD_RET_SUCCESS;
int err;
int force_overwrite = 0;
+ if (argc >= 3) {
+ if (argv[2][0] == '-' && argv[2][1] == 'y')
+ force_overwrite = 1;
+ }
+
/* Allocate RAM area for config block */
config_block = memalign(ARCH_DMA_MINALIGN, size);
if (!config_block) {
@@ -534,12 +785,95 @@
}
memset(config_block, 0xff, size);
+ read_tdx_cfg_block_carrier();
+ if (valid_cfgblock_carrier && !force_overwrite) {
+ char message[CONFIG_SYS_CBSIZE];
+
+ sprintf(message, "A valid Toradex Carrier config block is present, still recreate? [y/N] ");
+
+ if (!cli_readline(message))
+ goto out;
+
+ if (console_buffer[0] != 'y' &&
+ console_buffer[0] != 'Y')
+ goto out;
+ }
+
+ if (argc < 3 || (force_overwrite && argc < 4)) {
+ err = get_cfgblock_carrier_interactive();
+ } else {
+ if (force_overwrite)
+ err = get_cfgblock_barcode(argv[3], &tdx_car_hw_tag,
+ &tdx_car_serial);
+ else
+ err = get_cfgblock_barcode(argv[2], &tdx_car_hw_tag,
+ &tdx_car_serial);
+ }
+
+ if (err) {
+ ret = CMD_RET_FAILURE;
+ goto out;
+ }
+
+ /* Valid Tag */
+ write_tag(config_block, &offset, TAG_VALID, NULL, 0);
+
+ /* Product Tag */
+ write_tag(config_block, &offset, TAG_HW, (u8 *)&tdx_car_hw_tag,
+ sizeof(tdx_car_hw_tag));
+
+ /* Serial Tag */
+ write_tag(config_block, &offset, TAG_CAR_SERIAL, (u8 *)&tdx_car_serial,
+ sizeof(tdx_car_serial));
+
+ memset(config_block + offset, 0, 32 - offset);
+ err = write_tdx_eeprom_data(TDX_EEPROM_ID_CARRIER, 0x0, config_block,
+ size);
+ if (err) {
+ printf("Failed to write Toradex Extra config block: %d\n",
+ ret);
+ ret = CMD_RET_FAILURE;
+ goto out;
+ }
+
+ printf("Toradex Extra config block successfully written\n");
+
+out:
+ free(config_block);
+ return ret;
+}
+
+#endif /* CONFIG_TDX_CFG_BLOCK_EXTRA */
+
+static int do_cfgblock_create(struct cmd_tbl *cmdtp, int flag, int argc,
+ char * const argv[])
+{
+ u8 *config_block;
+ size_t size = TDX_CFG_BLOCK_MAX_SIZE;
+ int offset = 0;
+ int ret = CMD_RET_SUCCESS;
+ int err;
+ int force_overwrite = 0;
if (argc >= 3) {
+#ifdef CONFIG_TDX_CFG_BLOCK_EXTRA
+ if (!strcmp(argv[2], "carrier"))
+ return do_cfgblock_carrier_create(cmdtp, flag,
+ --argc, ++argv);
+#endif /* CONFIG_TDX_CFG_BLOCK_EXTRA */
if (argv[2][0] == '-' && argv[2][1] == 'y')
force_overwrite = 1;
}
+ /* Allocate RAM area for config block */
+ config_block = memalign(ARCH_DMA_MINALIGN, size);
+ if (!config_block) {
+ printf("Not enough malloc space available!\n");
+ return CMD_RET_FAILURE;
+ }
+
+ memset(config_block, 0xff, size);
+
read_tdx_cfg_block();
if (valid_cfgblock) {
#if defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NAND)
@@ -581,9 +915,11 @@
err = get_cfgblock_interactive();
} else {
if (force_overwrite)
- err = get_cfgblock_barcode(argv[3]);
+ err = get_cfgblock_barcode(argv[3], &tdx_hw_tag,
+ &tdx_serial);
else
- err = get_cfgblock_barcode(argv[2]);
+ err = get_cfgblock_barcode(argv[2], &tdx_hw_tag,
+ &tdx_serial);
}
if (err) {
ret = CMD_RET_FAILURE;
@@ -595,39 +931,25 @@
tdx_eth_addr.nic = htonl(tdx_serial << 8);
/* Valid Tag */
- tag = (struct toradex_tag *)config_block;
- tag->id = TAG_VALID;
- tag->flags = TAG_FLAG_VALID;
- tag->len = 0;
- offset += 4;
+ write_tag(config_block, &offset, TAG_VALID, NULL, 0);
/* Product Tag */
- tag = (struct toradex_tag *)(config_block + offset);
- tag->id = TAG_HW;
- tag->flags = TAG_FLAG_VALID;
- tag->len = 2;
- offset += 4;
-
- memcpy(config_block + offset, &tdx_hw_tag, 8);
- offset += 8;
+ write_tag(config_block, &offset, TAG_HW, (u8 *)&tdx_hw_tag,
+ sizeof(tdx_hw_tag));
/* MAC Tag */
- tag = (struct toradex_tag *)(config_block + offset);
- tag->id = TAG_MAC;
- tag->flags = TAG_FLAG_VALID;
- tag->len = 2;
- offset += 4;
+ write_tag(config_block, &offset, TAG_MAC, (u8 *)&tdx_eth_addr,
+ sizeof(tdx_eth_addr));
- memcpy(config_block + offset, &tdx_eth_addr, 6);
- offset += 6;
memset(config_block + offset, 0, 32 - offset);
-
#if defined(CONFIG_TDX_CFG_BLOCK_IS_IN_MMC)
err = tdx_cfg_block_mmc_storage(config_block, 1);
#elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NAND)
err = write_tdx_cfg_block_to_nand(config_block);
#elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NOR)
err = write_tdx_cfg_block_to_nor(config_block);
+#elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_EEPROM)
+ err = write_tdx_cfg_block_to_eeprom(config_block);
#else
err = -EINVAL;
#endif
@@ -667,8 +989,10 @@
return CMD_RET_USAGE;
}
-U_BOOT_CMD(cfgblock, 4, 0, do_cfgblock,
- "Toradex config block handling commands",
- "create [-y] [barcode] - (Re-)create Toradex config block\n"
- "cfgblock reload - Reload Toradex config block from flash"
+U_BOOT_CMD(
+ cfgblock, 5, 0, do_cfgblock,
+ "Toradex config block handling commands",
+ "create [-y] [barcode] - (Re-)create Toradex config block\n"
+ "create carrier [-y] [barcode] - (Re-)create Toradex Carrier config block\n"
+ "cfgblock reload - Reload Toradex config block from flash"
);
diff --git a/board/toradex/common/tdx-cfg-block.h b/board/toradex/common/tdx-cfg-block.h
index d8f3941..8f91d9a 100644
--- a/board/toradex/common/tdx-cfg-block.h
+++ b/board/toradex/common/tdx-cfg-block.h
@@ -80,12 +80,28 @@
VERDIN_IMX8MMDL,
};
+enum {
+ DAHLIA = 155,
+ VERDIN_DEVELOPMENT_BOARD = 156,
+};
+
+enum {
+ VERDIN_DSI_TO_HDMI_ADAPTER = 157,
+ VERDIN_DSI_TO_LVDS_ADAPTER = 159,
+};
+
extern const char * const toradex_modules[];
+extern const char * const toradex_carrier_boards[];
extern bool valid_cfgblock;
extern struct toradex_hw tdx_hw_tag;
+extern struct toradex_hw tdx_car_hw_tag;
extern struct toradex_eth_addr tdx_eth_addr;
extern u32 tdx_serial;
+extern u32 tdx_car_serial;
int read_tdx_cfg_block(void);
+int read_tdx_cfg_block_carrier(void);
+
+int try_migrate_tdx_cfg_block_carrier(void);
#endif /* _TDX_CFG_BLOCK_H */
diff --git a/board/toradex/common/tdx-common.c b/board/toradex/common/tdx-common.c
index 3a3cfc8..fe5295f 100644
--- a/board/toradex/common/tdx-common.c
+++ b/board/toradex/common/tdx-common.c
@@ -9,6 +9,13 @@
#include <init.h>
#include <linux/libfdt.h>
+#ifdef CONFIG_DM_VIDEO
+#include <bmp_logo.h>
+#include <dm.h>
+#include <splash.h>
+#include <video.h>
+#endif
+
#include "tdx-cfg-block.h"
#include <asm/setup.h>
#include "tdx-common.h"
@@ -19,6 +26,12 @@
static char tdx_serial_str[9];
static char tdx_board_rev_str[6];
+#ifdef CONFIG_TDX_CFG_BLOCK_EXTRA
+static char tdx_car_serial_str[9];
+static char tdx_car_rev_str[6];
+static char *tdx_carrier_board_name;
+#endif
+
#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void)
{
@@ -88,6 +101,28 @@
toradex_modules[tdx_hw_tag.prodid],
tdx_board_rev_str,
tdx_serial_str);
+#ifdef CONFIG_TDX_CFG_BLOCK_EXTRA
+ if (read_tdx_cfg_block_carrier()) {
+ printf("MISSING TORADEX CARRIER CONFIG BLOCKS\n");
+ try_migrate_tdx_cfg_block_carrier();
+ } else {
+ tdx_carrier_board_name = (char *)
+ toradex_carrier_boards[tdx_car_hw_tag.prodid];
+
+ sprintf(tdx_car_serial_str, "%08u", tdx_car_serial);
+ sprintf(tdx_car_rev_str, "V%1d.%1d%c",
+ tdx_car_hw_tag.ver_major,
+ tdx_car_hw_tag.ver_minor,
+ (char)tdx_car_hw_tag.ver_assembly +
+ 'A');
+
+ env_set("carrier_serial#", tdx_car_serial_str);
+ printf("Carrier: Toradex %s %s, Serial# %s\n",
+ tdx_carrier_board_name,
+ tdx_car_rev_str,
+ tdx_car_serial_str);
+ }
+#endif
}
/*
@@ -168,3 +203,22 @@
}
#endif /* CONFIG_TDX_CFG_BLOCK */
+
+#if defined(CONFIG_DM_VIDEO)
+int show_boot_logo(void)
+{
+ struct udevice *dev;
+ int ret;
+ int xpos, ypos;
+
+ splash_get_pos(&xpos, &ypos);
+
+ ret = uclass_get_device(UCLASS_VIDEO, 0, &dev);
+ if (ret)
+ return ret;
+
+ ret = video_bmp_display(dev, (ulong)bmp_logo_bitmap, xpos, ypos, true);
+
+ return ret;
+}
+#endif /* CONFIG_DM_VIDEO */
diff --git a/board/toradex/common/tdx-common.h b/board/toradex/common/tdx-common.h
index 81375de..8020df5 100644
--- a/board/toradex/common/tdx-common.h
+++ b/board/toradex/common/tdx-common.h
@@ -11,4 +11,8 @@
int ft_common_board_setup(void *blob, struct bd_info *bd);
+#if defined(CONFIG_DM_VIDEO)
+int show_boot_logo(void);
+#endif
+
#endif /* _TDX_COMMON_H */
diff --git a/board/toradex/common/tdx-eeprom.c b/board/toradex/common/tdx-eeprom.c
new file mode 100644
index 0000000..fbc267d
--- /dev/null
+++ b/board/toradex/common/tdx-eeprom.c
@@ -0,0 +1,90 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2020 Toradex
+ */
+
+#include <dm.h>
+#include <i2c_eeprom.h>
+#include <linux/errno.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static int get_tdx_eeprom(u32 eeprom_id, struct udevice **devp)
+{
+ int ret = 0;
+ int node;
+ ofnode eeprom;
+ char eeprom_str[16];
+ const char *path;
+
+ if (!gd->fdt_blob) {
+ printf("%s: don't have a valid gd->fdt_blob!\n", __func__);
+ return -EFAULT;
+ }
+
+ node = fdt_path_offset(gd->fdt_blob, "/aliases");
+ if (node < 0)
+ return -ENODEV;
+
+ sprintf(eeprom_str, "eeprom%d", eeprom_id);
+
+ path = fdt_getprop(gd->fdt_blob, node, eeprom_str, NULL);
+ if (!path) {
+ printf("%s: no alias for %s\n", __func__, eeprom_str);
+ return -ENODEV;
+ }
+
+ eeprom = ofnode_path(path);
+ if (!ofnode_valid(eeprom)) {
+ printf("%s: invalid hardware path to EEPROM\n", __func__);
+ return -ENODEV;
+ }
+
+ ret = uclass_get_device_by_ofnode(UCLASS_I2C_EEPROM, eeprom, devp);
+ if (ret) {
+ printf("%s: cannot find EEPROM by node\n", __func__);
+ return ret;
+ }
+
+ return ret;
+}
+
+int read_tdx_eeprom_data(u32 eeprom_id, int offset, u8 *buf,
+ int size)
+{
+ struct udevice *dev;
+ int ret;
+
+ ret = get_tdx_eeprom(eeprom_id, &dev);
+ if (ret)
+ return ret;
+
+ ret = i2c_eeprom_read(dev, 0x0, buf, size);
+ if (ret) {
+ printf("%s: error reading data from EEPROM id: %d!, ret = %d\n",
+ __func__, eeprom_id, ret);
+ return ret;
+ }
+
+ return ret;
+}
+
+int write_tdx_eeprom_data(u32 eeprom_id, int offset, u8 *buf,
+ int size)
+{
+ struct udevice *dev;
+ int ret;
+
+ ret = get_tdx_eeprom(eeprom_id, &dev);
+ if (ret)
+ return ret;
+
+ ret = i2c_eeprom_write(dev, 0x0, buf, size);
+ if (ret) {
+ printf("%s: error writing data to EEPROM id: %d, ret = %d\n",
+ __func__, eeprom_id, ret);
+ return ret;
+ }
+
+ return ret;
+}
diff --git a/board/toradex/common/tdx-eeprom.h b/board/toradex/common/tdx-eeprom.h
new file mode 100644
index 0000000..a6772d2
--- /dev/null
+++ b/board/toradex/common/tdx-eeprom.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (c) 2020 Toradex
+ */
+
+#ifndef _TDX_EEPROM_H
+#define _TDX_EEPROM_H
+
+#include <i2c_eeprom.h>
+
+int read_tdx_eeprom_data(u32 eeprom_id, int offset, uint8_t *buf, int size);
+int write_tdx_eeprom_data(u32 eeprom_id, int offset, uint8_t *buf, int size);
+
+#endif /* _TDX_EEPROM_H */
diff --git a/board/toradex/verdin-imx8mm/Kconfig b/board/toradex/verdin-imx8mm/Kconfig
index 8a2fe9868..149aed6 100644
--- a/board/toradex/verdin-imx8mm/Kconfig
+++ b/board/toradex/verdin-imx8mm/Kconfig
@@ -12,9 +12,15 @@
config TDX_CFG_BLOCK
default y
+config TDX_CFG_BLOCK_EXTRA
+ default y
+
config TDX_HAVE_MMC
default y
+config TDX_HAVE_EEPROM_EXTRA
+ default y
+
config TDX_CFG_BLOCK_DEV
default "0"
diff --git a/cmd/Kconfig b/cmd/Kconfig
index d7136b0..e111764 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1148,6 +1148,14 @@
endif
+config CMD_CLONE
+ bool "clone"
+ depends on BLK
+ help
+ Enable storage cloning over block devices, useful for
+ initial flashing by external block device without network
+ or usb support.
+
config CMD_MTD
bool "mtd"
depends on MTD
diff --git a/cmd/Makefile b/cmd/Makefile
index 6e0086b..7075037 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -98,6 +98,7 @@
obj-$(CONFIG_MP) += mp.o
obj-$(CONFIG_CMD_MTD) += mtd.o
obj-$(CONFIG_CMD_MTDPARTS) += mtdparts.o
+obj-$(CONFIG_CMD_CLONE) += clone.o
ifneq ($(CONFIG_CMD_NAND)$(CONFIG_CMD_SF),)
obj-y += legacy-mtd-utils.o
endif
diff --git a/cmd/bdinfo.c b/cmd/bdinfo.c
index 8b2c105..9485c40 100644
--- a/cmd/bdinfo.c
+++ b/cmd/bdinfo.c
@@ -9,6 +9,7 @@
#include <common.h>
#include <command.h>
#include <env.h>
+#include <lmb.h>
#include <net.h>
#include <vsprintf.h>
#include <asm/cache.h>
@@ -33,9 +34,10 @@
printf("%-12s= %s\n", name, val);
}
-static void print_lnum(const char *name, unsigned long long value)
+static void print_phys_addr(const char *name, phys_addr_t value)
{
- printf("%-12s= 0x%.8llX\n", name, value);
+ printf("%-12s= 0x%.*llx\n", name, 2 * (int)sizeof(ulong),
+ (unsigned long long)value);
}
void bdinfo_print_mhz(const char *name, unsigned long hz)
@@ -74,7 +76,7 @@
bdinfo_print_num("boot_params", (ulong)bd->bi_boot_params);
print_bi_dram(bd);
bdinfo_print_num("memstart", (ulong)bd->bi_memstart);
- print_lnum("memsize", (u64)bd->bi_memsize);
+ print_phys_addr("memsize", bd->bi_memsize);
bdinfo_print_num("flashstart", (ulong)bd->bi_flashstart);
bdinfo_print_num("flashsize", (ulong)bd->bi_flashsize);
bdinfo_print_num("flashoffset", (ulong)bd->bi_flashoffset);
@@ -96,6 +98,12 @@
#if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
bdinfo_print_num("multi_dtb_fit", (ulong)gd->multi_dtb_fit);
#endif
+ if (gd->fdt_blob) {
+ struct lmb lmb;
+
+ lmb_init_and_reserve(&lmb, gd->bd, (void *)gd->fdt_blob);
+ lmb_dump_all_force(&lmb);
+ }
arch_print_bdinfo();
diff --git a/cmd/bootz.c b/cmd/bootz.c
index 1c8b0cf..7556cd2 100644
--- a/cmd/bootz.c
+++ b/cmd/bootz.c
@@ -54,7 +54,7 @@
* Handle the BOOTM_STATE_FINDOTHER state ourselves as we do not
* have a header that provide this informaiton.
*/
- if (bootm_find_images(flag, argc, argv, zi_start, zi_end - zi_start))
+ if (bootm_find_images(flag, argc, argv, images->ep, zi_end - zi_start))
return 1;
return 0;
diff --git a/cmd/clone.c b/cmd/clone.c
new file mode 100644
index 0000000..97747f8
--- /dev/null
+++ b/cmd/clone.c
@@ -0,0 +1,126 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2020 John Chau <john@harmon.hk>
+ *
+ */
+
+#include <common.h>
+#include <command.h>
+#include <malloc.h>
+#include <part.h>
+#include <blk.h>
+#include <vsprintf.h>
+
+#define BUFSIZE (1 * 1024 * 1024)
+static int do_clone(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv[])
+{
+ int srcdev, destdev;
+ struct blk_desc *srcdesc, *destdesc;
+ int srcbz, destbz, ret;
+ char *unit, *buf;
+ unsigned long wrcnt, rdcnt, requested, srcblk, destblk;
+ unsigned long timer;
+ const unsigned long buffersize = 1024 * 1024;
+
+ if (argc < 6)
+ return CMD_RET_USAGE;
+
+ srcdev = blk_get_device_by_str(argv[1], argv[2], &srcdesc);
+ destdev = blk_get_device_by_str(argv[3], argv[4], &destdesc);
+ if (srcdev < 0) {
+ printf("Unable to open source device\n");
+ return 1;
+ } else if (destdev < 0) {
+ printf("Unable to open destination device\n");
+ return 1;
+ }
+ requested = simple_strtoul(argv[5], &unit, 10);
+ srcbz = srcdesc->blksz;
+ destbz = destdesc->blksz;
+
+ if ((srcbz * (buffersize / srcbz) != buffersize) &&
+ (destbz * (buffersize / destbz) != buffersize)) {
+ printf("failed: cannot match device block sizes\n");
+ return 1;
+ }
+ if (requested == 0) {
+ unsigned long a = srcdesc->lba * srcdesc->blksz;
+ unsigned long b = destdesc->lba * destdesc->blksz;
+
+ if (a > b)
+ requested = a;
+ else
+ requested = b;
+ } else {
+ switch (unit[0]) {
+ case 'g':
+ case 'G':
+ requested *= 1024;
+ case 'm':
+ case 'M':
+ requested *= 1024;
+ case 'k':
+ case 'K':
+ requested *= 1024;
+ break;
+ }
+ }
+ printf("Copying %ld bytes from %s:%s to %s:%s\n",
+ requested, argv[1], argv[2], argv[3], argv[4]);
+ wrcnt = 0;
+ rdcnt = 0;
+ buf = (char *)malloc(BUFSIZE);
+ srcblk = 0;
+ destblk = 0;
+ timer = get_timer(0);
+ while (wrcnt < requested) {
+ unsigned long toread = BUFSIZE / srcbz;
+ unsigned long towrite = BUFSIZE / destbz;
+ unsigned long offset = 0;
+
+read:
+ ret = blk_dread(srcdesc, srcblk, toread, buf + offset);
+ if (ret < 0) {
+ printf("Src read error @blk %ld\n", srcblk);
+ goto exit;
+ }
+ rdcnt += ret * srcbz;
+ srcblk += ret;
+ if (ret < toread) {
+ toread -= ret;
+ offset += ret * srcbz;
+ goto read;
+ }
+ offset = 0;
+write:
+ ret = blk_dwrite(destdesc, destblk, towrite, buf + offset);
+ if (ret < 0) {
+ printf("Dest write error @blk %ld\n", srcblk);
+ goto exit;
+ }
+ wrcnt += ret * destbz;
+ destblk += ret;
+ if (ret < towrite) {
+ towrite -= ret;
+ offset += ret * destbz;
+ goto write;
+ }
+ }
+
+exit:
+ timer = get_timer(timer);
+ timer = 1000 * timer / CONFIG_SYS_HZ;
+ printf("%ld read\n", rdcnt);
+ printf("%ld written\n", wrcnt);
+ printf("%ldms, %ldkB/s\n", timer, wrcnt / timer);
+ free(buf);
+
+ return 0;
+}
+
+U_BOOT_CMD(
+ clone, 6, 1, do_clone,
+ "simple storage cloning",
+ "<src interface> <src dev> <dest interface> <dest dev> <size[K/M/G]>\n"
+ "clone storage from 'src dev' on 'src interface' to 'dest dev' on 'dest interface' with maximum 'size' bytes (or 0 for clone to end)"
+);
diff --git a/cmd/demo.c b/cmd/demo.c
index 9da06f5..f923533 100644
--- a/cmd/demo.c
+++ b/cmd/demo.c
@@ -8,6 +8,7 @@
#include <common.h>
#include <command.h>
+#include <dm.h>
#include <dm-demo.h>
#include <mapmem.h>
#include <asm/io.h>
diff --git a/cmd/mdio.c b/cmd/mdio.c
index c48bb51..cfa45ad 100644
--- a/cmd/mdio.c
+++ b/cmd/mdio.c
@@ -10,6 +10,7 @@
#include <common.h>
#include <command.h>
+#include <dm.h>
#include <miiphy.h>
#include <phy.h>
diff --git a/cmd/mii.c b/cmd/mii.c
index b52a55d..fe8602e 100644
--- a/cmd/mii.c
+++ b/cmd/mii.c
@@ -10,6 +10,7 @@
#include <common.h>
#include <command.h>
+#include <dm.h>
#include <miiphy.h>
typedef struct _MII_field_desc_t {
diff --git a/cmd/w1.c b/cmd/w1.c
index 92be1f2..459094b 100644
--- a/cmd/w1.c
+++ b/cmd/w1.c
@@ -6,6 +6,7 @@
*/
#include <common.h>
#include <command.h>
+#include <dm.h>
#include <w1.h>
#include <w1-eeprom.h>
#include <dm/device-internal.h>
diff --git a/common/Kconfig b/common/Kconfig
index 67b3818..62d78c5 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -403,6 +403,7 @@
config USE_PREBOOT
bool "Enable preboot"
+ default "usb start" if USB_KEYBOARD
help
When this option is enabled, the existence of the environment
variable "preboot" will be checked immediately before starting the
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 72c7165..10605f1 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -1529,6 +1529,16 @@
Enable support for using SPI flash in TPL. See SPL_SPI_FLASH_SUPPORT
for details.
+config TPL_SPI_FLASH_TINY
+ bool "Enable low footprint TPL SPI Flash support"
+ depends on TPL_SPI_FLASH_SUPPORT && !SPI_FLASH_BAR
+ default y if SPI_FLASH
+ help
+ Enable lightweight TPL SPI Flash support that supports just reading
+ data/images from flash. No support to write/erase flash. Enable
+ this if you have TPL size limitations and don't need full-fledged
+ SPI flash support.
+
config TPL_SPI_LOAD
bool "Support loading from SPI flash"
depends on TPL_SPI_FLASH_SUPPORT
diff --git a/configs/colibri-imx6ull_defconfig b/configs/colibri-imx6ull_defconfig
index d1716a3..23108bd 100644
--- a/configs/colibri-imx6ull_defconfig
+++ b/configs/colibri-imx6ull_defconfig
@@ -92,3 +92,4 @@
CONFIG_DM_VIDEO=y
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_FDT_FIXUP_PARTITIONS=y
+CONFIG_SYS_WHITE_ON_BLACK=y
diff --git a/configs/colibri_imx7_defconfig b/configs/colibri_imx7_defconfig
index b2cce8a..e409e09 100644
--- a/configs/colibri_imx7_defconfig
+++ b/configs/colibri_imx7_defconfig
@@ -91,3 +91,5 @@
CONFIG_DM_VIDEO=y
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_FDT_FIXUP_PARTITIONS=y
+CONFIG_BOARD_LATE_INIT=y
+CONFIG_SYS_WHITE_ON_BLACK=y
diff --git a/configs/colibri_imx7_emmc_defconfig b/configs/colibri_imx7_emmc_defconfig
index b433437..8355fef 100644
--- a/configs/colibri_imx7_emmc_defconfig
+++ b/configs/colibri_imx7_emmc_defconfig
@@ -85,3 +85,5 @@
CONFIG_CI_UDC=y
CONFIG_DM_VIDEO=y
CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_BOARD_LATE_INIT=y
+CONFIG_SYS_WHITE_ON_BLACK=y
diff --git a/configs/libretech-ac_defconfig b/configs/libretech-ac_defconfig
index 62094f2..2ca169c 100644
--- a/configs/libretech-ac_defconfig
+++ b/configs/libretech-ac_defconfig
@@ -15,7 +15,6 @@
CONFIG_DEBUG_UART=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_PREBOOT=y
-CONFIG_PREBOOT="usb start"
CONFIG_MISC_INIT_R=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
diff --git a/configs/libretech-s905d-pc_defconfig b/configs/libretech-s905d-pc_defconfig
index 74e4c7f..c10e549 100644
--- a/configs/libretech-s905d-pc_defconfig
+++ b/configs/libretech-s905d-pc_defconfig
@@ -15,7 +15,6 @@
CONFIG_DEBUG_UART=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_PREBOOT=y
-CONFIG_PREBOOT="usb start"
CONFIG_MISC_INIT_R=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_CMD_BDI is not set
diff --git a/configs/libretech-s912-pc_defconfig b/configs/libretech-s912-pc_defconfig
index 7fe00a9..fffca0f 100644
--- a/configs/libretech-s912-pc_defconfig
+++ b/configs/libretech-s912-pc_defconfig
@@ -14,7 +14,6 @@
CONFIG_DEBUG_UART=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_PREBOOT=y
-CONFIG_PREBOOT="usb start"
CONFIG_MISC_INIT_R=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_CMD_BDI is not set
diff --git a/configs/mx6cuboxi_defconfig b/configs/mx6cuboxi_defconfig
index 0e1e641..02f7279 100644
--- a/configs/mx6cuboxi_defconfig
+++ b/configs/mx6cuboxi_defconfig
@@ -43,6 +43,7 @@
CONFIG_OF_LIST="imx6dl-hummingboard2-emmc-som-v15 imx6q-hummingboard2-emmc-som-v15"
CONFIG_MULTI_DTB_FIT=y
CONFIG_ENV_OVERWRITE=y
+CONFIG_SPL_OF_PLATDATA=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
diff --git a/configs/myir_mys_6ulx_defconfig b/configs/myir_mys_6ulx_defconfig
new file mode 100644
index 0000000..84463a3
--- /dev/null
+++ b/configs/myir_mys_6ulx_defconfig
@@ -0,0 +1,69 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
+CONFIG_SYS_TEXT_BASE=0x87800000
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_ENV_SIZE=0x4000
+CONFIG_TARGET_MYS_6ULX=y
+CONFIG_SPL_TEXT_BASE=0x908000
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_NR_DRAM_BANKS=8
+CONFIG_SPL=y
+CONFIG_DEFAULT_DEVICE_TREE="imx6ull-myir-mys-6ulx-eval"
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_FIT=y
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
+CONFIG_BOOTDELAY=3
+# CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_SPL_DMA=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_USB_HOST_SUPPORT=y
+CONFIG_SPL_USB_GADGET=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x90000000
+CONFIG_CMD_DM=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+# CONFIG_RANDOM_UUID is not set
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_MTDIDS_DEFAULT="nand0=gpmi-nand"
+CONFIG_MTDPARTS_DEFAULT="gpmi-nand:512k(spl),1m(uboot),1m(uboot-dup),-(ubi)"
+CONFIG_CMD_UBI=y
+# CONFIG_ISO_PARTITION is not set
+CONFIG_OF_CONTROL=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_DM_I2C_GPIO=y
+CONFIG_SYS_I2C_MXC=y
+CONFIG_FSL_USDHC=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_RAW_NAND=y
+CONFIG_NAND_MXS=y
+CONFIG_NAND_MXS_DT=y
+CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
+CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
+CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND=0x180000
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_FEC_MXC=y
+CONFIG_MII=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_IMX6=y
+CONFIG_DM_PMIC=y
+# CONFIG_SPL_PMIC_CHILDREN is not set
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_MXC_UART=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_GADGET=y
+CONFIG_SMBIOS_MANUFACTURER="MYiR"
diff --git a/configs/octeon_ebb7304_defconfig b/configs/octeon_ebb7304_defconfig
index d810b1e..f8d27b0 100644
--- a/configs/octeon_ebb7304_defconfig
+++ b/configs/octeon_ebb7304_defconfig
@@ -1,9 +1,9 @@
CONFIG_MIPS=y
CONFIG_SYS_TEXT_BASE=0xffffffff80000000
CONFIG_SYS_MALLOC_F_LEN=0x4000
+CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_NR_DRAM_BANKS=2
CONFIG_DEBUG_UART_BASE=0x8001180000000800
CONFIG_DEBUG_UART_CLOCK=1200000000
CONFIG_ARCH_OCTEON=y
@@ -12,6 +12,8 @@
CONFIG_DEBUG_UART=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MTD=y
CONFIG_CMD_PCI=y
CONFIG_CMD_DHCP=y
@@ -29,10 +31,18 @@
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_NETDEVICES is not set
+CONFIG_PCI=y
+CONFIG_DM_PCI=y
CONFIG_DEBUG_UART_SHIFT=3
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_OCTEON_SPI=y
CONFIG_SYSRESET=y
CONFIG_SYSRESET_OCTEON=y
CONFIG_HEXDUMP=y
diff --git a/configs/pcm058_defconfig b/configs/pcm058_defconfig
index e8a263b..045ef16 100644
--- a/configs/pcm058_defconfig
+++ b/configs/pcm058_defconfig
@@ -7,7 +7,7 @@
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x31400
CONFIG_MX6_OCRAM_256KB=y
CONFIG_TARGET_PCM058=y
CONFIG_DM_GPIO=y
@@ -35,6 +35,7 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x18a
CONFIG_SPL_DMA=y
CONFIG_SPL_FS_EXT4=y
+CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_SPI_LOAD=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_YMODEM_SUPPORT=y
diff --git a/configs/pico-imx6_defconfig b/configs/pico-imx6_defconfig
index 0a38941..0a602da 100644
--- a/configs/pico-imx6_defconfig
+++ b/configs/pico-imx6_defconfig
@@ -66,6 +66,9 @@
CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y
CONFIG_PHY_ATHEROS=y
+CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
+CONFIG_RGMII=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y
CONFIG_MXC_UART=y
diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig
index 959c40c..3967863 100644
--- a/configs/pinebook-pro-rk3399_defconfig
+++ b/configs/pinebook-pro-rk3399_defconfig
@@ -13,7 +13,6 @@
CONFIG_DEBUG_UART=y
CONFIG_BOOTDELAY=3
CONFIG_USE_PREBOOT=y
-CONFIG_PREBOOT="usb start"
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-pinebook-pro.dtb"
CONFIG_MISC_INIT_R=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig
index 31d3095..a420372 100644
--- a/configs/rockpro64-rk3399_defconfig
+++ b/configs/rockpro64-rk3399_defconfig
@@ -13,7 +13,6 @@
CONFIG_DEFAULT_DEVICE_TREE="rk3399-rockpro64"
CONFIG_DEBUG_UART=y
CONFIG_USE_PREBOOT=y
-CONFIG_PREBOOT="usb start"
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rockpro64.dtb"
CONFIG_MISC_INIT_R=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
diff --git a/configs/rpi_0_w_defconfig b/configs/rpi_0_w_defconfig
index a8752f5..350a182 100644
--- a/configs/rpi_0_w_defconfig
+++ b/configs/rpi_0_w_defconfig
@@ -9,7 +9,6 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_PREBOOT=y
-CONFIG_PREBOOT="usb start"
CONFIG_MISC_INIT_R=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
diff --git a/configs/rpi_2_defconfig b/configs/rpi_2_defconfig
index 867f59c..2ec3c4b 100644
--- a/configs/rpi_2_defconfig
+++ b/configs/rpi_2_defconfig
@@ -9,7 +9,6 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_PREBOOT=y
-CONFIG_PREBOOT="usb start"
CONFIG_MISC_INIT_R=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
diff --git a/configs/rpi_3_32b_defconfig b/configs/rpi_3_32b_defconfig
index 08643fa..8c3c980 100644
--- a/configs/rpi_3_32b_defconfig
+++ b/configs/rpi_3_32b_defconfig
@@ -10,7 +10,6 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_PREBOOT=y
-CONFIG_PREBOOT="usb start"
CONFIG_MISC_INIT_R=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
diff --git a/configs/rpi_3_b_plus_defconfig b/configs/rpi_3_b_plus_defconfig
index c31ea55..1e2d4b1 100644
--- a/configs/rpi_3_b_plus_defconfig
+++ b/configs/rpi_3_b_plus_defconfig
@@ -10,7 +10,6 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_PREBOOT=y
-CONFIG_PREBOOT="usb start"
CONFIG_MISC_INIT_R=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
diff --git a/configs/rpi_3_defconfig b/configs/rpi_3_defconfig
index aa4770e..e992b64 100644
--- a/configs/rpi_3_defconfig
+++ b/configs/rpi_3_defconfig
@@ -10,7 +10,6 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_PREBOOT=y
-CONFIG_PREBOOT="usb start"
CONFIG_MISC_INIT_R=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
diff --git a/configs/rpi_defconfig b/configs/rpi_defconfig
index da767ef..8532cac 100644
--- a/configs/rpi_defconfig
+++ b/configs/rpi_defconfig
@@ -9,7 +9,6 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_PREBOOT=y
-CONFIG_PREBOOT="usb start"
CONFIG_MISC_INIT_R=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
diff --git a/configs/seaboard_defconfig b/configs/seaboard_defconfig
index cc47587..e440458 100644
--- a/configs/seaboard_defconfig
+++ b/configs/seaboard_defconfig
@@ -10,7 +10,6 @@
CONFIG_DEFAULT_DEVICE_TREE="tegra20-seaboard"
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_USE_PREBOOT=y
-CONFIG_PREBOOT="usb start"
CONFIG_SYS_PROMPT="Tegra20 (SeaBoard) # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_FLASH is not set
diff --git a/configs/sifive_fu540_defconfig b/configs/sifive_fu540_defconfig
index 5980406..070ef66 100644
--- a/configs/sifive_fu540_defconfig
+++ b/configs/sifive_fu540_defconfig
@@ -25,3 +25,5 @@
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_CLK=y
CONFIG_DM_MTD=y
+CONFIG_SPL_DM_RESET=y
+CONFIG_DM_RESET=y
diff --git a/configs/sipeed_maix_bitm_defconfig b/configs/sipeed_maix_bitm_defconfig
index 96651f0..459bf0d 100644
--- a/configs/sipeed_maix_bitm_defconfig
+++ b/configs/sipeed_maix_bitm_defconfig
@@ -1,6 +1,7 @@
CONFIG_RISCV=y
CONFIG_TARGET_SIPEED_MAIX=y
CONFIG_ARCH_RV64I=y
+CONFIG_STACK_SIZE=0x100000
# CONFIG_NET is not set
# CONFIG_INPUT is not set
# CONFIG_DM_ETH is not set
diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig
index eb29055..f50a995 100644
--- a/configs/tbs2910_defconfig
+++ b/configs/tbs2910_defconfig
@@ -101,6 +101,7 @@
# CONFIG_VIDEO_ANSI is not set
CONFIG_SYS_WHITE_ON_BLACK=y
# CONFIG_PANEL is not set
+CONFIG_VIDCONSOLE_AS_LCD=y
CONFIG_I2C_EDID=y
CONFIG_VIDEO_IPUV3=y
# CONFIG_GZIP is not set
diff --git a/configs/ventana_defconfig b/configs/ventana_defconfig
index 33131ce..b51254a 100644
--- a/configs/ventana_defconfig
+++ b/configs/ventana_defconfig
@@ -10,7 +10,6 @@
CONFIG_DEFAULT_DEVICE_TREE="tegra20-ventana"
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_USE_PREBOOT=y
-CONFIG_PREBOOT="usb start"
CONFIG_SYS_PROMPT="Tegra20 (Ventana) # "
# CONFIG_CMD_IMI is not set
CONFIG_CMD_GPIO=y
diff --git a/configs/verdin-imx8mm_defconfig b/configs/verdin-imx8mm_defconfig
index ca8a1e3..937094c 100644
--- a/configs/verdin-imx8mm_defconfig
+++ b/configs/verdin-imx8mm_defconfig
@@ -75,6 +75,7 @@
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MXC=y
CONFIG_MISC=y
+CONFIG_I2C_EEPROM=y
CONFIG_DM_MMC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_ESDHC_IMX=y
diff --git a/doc/README.clang b/doc/README.clang
deleted file mode 100644
index 475bb1e..0000000
--- a/doc/README.clang
+++ /dev/null
@@ -1,55 +0,0 @@
-The biggest problem when trying to compile U-Boot with clang is that
-almost all archs rely on storing gd in a global register and clang user
-manual states: "clang does not support global register variables; this
-is unlikely to be implemented soon because it requires additional LLVM
-backend support."
-
-Since version 3.4 the ARM backend can be instructed to leave r9 alone.
-Global registers themselves are not supported so some inline assembly is
-used to get its value. This does lead to larger code then strictly
-necessary, but at least works.
-
-NOTE: target compilation only work for _some_ ARM boards at the moment.
-Also AArch64 is not supported currently due to a lack of private libgcc
-support. Boards which reassign gd in c will also fail to compile, but there is
-in no strict reason to do so in the ARM world, since crt0.S takes care of this.
-These assignments can be avoided by changing the init calls but this is not in
-mainline yet.
-
-Debian (based)
---------------
-Binary packages can be installed as usual, e.g.:
-sudo apt-get install clang
-
-Note that we still use binutils for some tools so we must continue to set
-CROSS_COMPILE. To compile U-Boot with clang on linux without IAS use e.g.:
-make HOSTCC=clang rpi_2_defconfig
-make HOSTCC=clang CROSS_COMPILE=arm-linux-gnueabi- \
- CC="clang -target arm-linux-gnueabi" -j8
-
-It can also be used to compile sandbox:
-make HOSTCC=clang sandbox_defconfig
-make HOSTCC=clang CC=clang -j8
-
-FreeBSD 11 (Current):
---------------------
-Since llvm 3.4 is currently in the base system, the integrated as is
-incapable of building U-Boot. Therefore gas from devel/arm-gnueabi-binutils
-is used instead. It needs a symlinks to be picked up correctly though:
-
-ln -s /usr/local/bin/arm-gnueabi-freebsd-as /usr/bin/arm-freebsd-eabi-as
-
-# The following commands compile U-Boot using the clang xdev toolchain.
-# NOTE: CROSS_COMPILE and target differ on purpose!
-export CROSS_COMPILE=arm-gnueabi-freebsd-
-gmake rpi_2_defconfig
-gmake CC="clang -target arm-freebsd-eabi --sysroot /usr/arm-freebsd" -j8
-
-Given that U-Boot will default to gcc, above commands can be
-simplified with a simple wrapper script, listed below.
-
-/usr/local/bin/arm-gnueabi-freebsd-gcc
----
-#!/bin/sh
-
-exec clang -target arm-freebsd-eabi --sysroot /usr/arm-freebsd "$@"
diff --git a/doc/board/emulation/qemu-mips.rst b/doc/board/emulation/qemu-mips.rst
index f206039..d359251 100644
--- a/doc/board/emulation/qemu-mips.rst
+++ b/doc/board/emulation/qemu-mips.rst
@@ -29,28 +29,28 @@
.. code-block:: bash
- make qemu_mips
+ make qemu_mips_defconfig
qemu-system-mips -M mips -bios u-boot.bin -nographic
32 bit, little endian
.. code-block:: bash
- make qemu_mipsel
+ make qemu_mipsel_defconfig
qemu-system-mipsel -M mips -bios u-boot.bin -nographic
64 bit, big endian
.. code-block:: bash
- make qemu_mips64
+ make qemu_mips64_defconfig
qemu-system-mips64 -cpu MIPS64R2-generic -M mips -bios u-boot.bin -nographic
64 bit, little endian
.. code-block:: bash
- make qemu_mips64el
+ make qemu_mips64el_defconfig
qemu-system-mips64el -cpu MIPS64R2-generic -M mips -bios u-boot.bin -nographic
or using u-boot.bin from emulated flash:
diff --git a/doc/build/clang.rst b/doc/build/clang.rst
new file mode 100644
index 0000000..1d35616
--- /dev/null
+++ b/doc/build/clang.rst
@@ -0,0 +1,76 @@
+Building with Clang
+===================
+
+The biggest problem when trying to compile U-Boot with Clang is that almost all
+archs rely on storing gd in a global register and the Clang 3.5 user manual
+states: "Clang does not support global register variables; this is unlikely to
+be implemented soon because it requires additional LLVM backend support."
+
+The ARM backend can be instructed not to use the r9 and x18 registers using
+-ffixed-r9 or -ffixed-x18 respectively. As global registers themselves are not
+supported inline assembly is needed to get and set the r9 or x18 value. This
+leads to larger code then strictly necessary, but at least works.
+
+**NOTE:** target compilation only work for _some_ ARM boards at the moment.
+Also AArch64 is not supported currently due to a lack of private libgcc
+support. Boards which reassign gd in c will also fail to compile, but there is
+in no strict reason to do so in the ARM world, since crt0.S takes care of this.
+These assignments can be avoided by changing the init calls but this is not in
+mainline yet.
+
+
+Debian based
+------------
+
+Required packages can be installed via apt, e.g.
+
+.. code-block:: bash
+
+ sudo apt-get install clang
+
+Note that we still use binutils for some tools so we must continue to set
+CROSS_COMPILE. To compile U-Boot with Clang on Linux without IAS use e.g.
+
+.. code-block:: bash
+
+ make HOSTCC=clang rpi_2_defconfig
+ make HOSTCC=clang CROSS_COMPILE=arm-linux-gnueabi- \
+ CC="clang -target arm-linux-gnueabi" -j8
+
+It can also be used to compile sandbox:
+
+.. code-block:: bash
+
+ make HOSTCC=clang sandbox_defconfig
+ make HOSTCC=clang CC=clang -j8
+
+
+FreeBSD 11
+----------
+
+Since llvm 3.4 is currently in the base system, the integrated assembler as
+is incapable of building U-Boot. Therefore gas from devel/arm-gnueabi-binutils
+is used instead. It needs a symlink to be picked up correctly though:
+
+.. code-block:: bash
+
+ ln -s /usr/local/bin/arm-gnueabi-freebsd-as /usr/bin/arm-freebsd-eabi-as
+
+The following commands compile U-Boot using the Clang xdev toolchain.
+
+**NOTE:** CROSS_COMPILE and target differ on purpose!
+
+.. code-block:: bash
+
+ export CROSS_COMPILE=arm-gnueabi-freebsd-
+ gmake rpi_2_defconfig
+ gmake CC="clang -target arm-freebsd-eabi --sysroot /usr/arm-freebsd" -j8
+
+Given that U-Boot will default to gcc, above commands can be
+simplified with a simple wrapper script - saved as
+/usr/local/bin/arm-gnueabi-freebsd-gcc - listed below:
+
+.. code-block:: bash
+
+ #!/bin/sh
+ exec clang -target arm-freebsd-eabi --sysroot /usr/arm-freebsd "$@"
diff --git a/doc/build/index.rst b/doc/build/index.rst
index e4e3411..e0072af 100644
--- a/doc/build/index.rst
+++ b/doc/build/index.rst
@@ -6,4 +6,5 @@
.. toctree::
:maxdepth: 2
+ clang
tools
diff --git a/doc/device-tree-bindings/fsp/fsp2/apollolake/fsp-m.txt b/doc/device-tree-bindings/fsp/fsp2/apollolake/fsp-m.txt
index 5311938..666400e 100644
--- a/doc/device-tree-bindings/fsp/fsp2/apollolake/fsp-m.txt
+++ b/doc/device-tree-bindings/fsp/fsp2/apollolake/fsp-m.txt
@@ -240,6 +240,9 @@
- fspm,enable-reset-system: Enable Reset System
- fspm,enable-s3-heci2: Enable HECI2 in S3 resume path
- fspm,variable-nvs-buffer-ptr:
+- fspm,start-timer-ticker-of-pfet-assert: PCIE SLOT Power Enable Assert Time - PFET
+- fspm,rt-en: Real Time Enabling
+- fspm,skip-pcie-power-sequence: Skip Pcie Power Sequence
Example:
diff --git a/doc/device-tree-bindings/fsp/fsp2/apollolake/fsp-s.txt b/doc/device-tree-bindings/fsp/fsp2/apollolake/fsp-s.txt
index 973d253..731a310 100644
--- a/doc/device-tree-bindings/fsp/fsp2/apollolake/fsp-s.txt
+++ b/doc/device-tree-bindings/fsp/fsp2/apollolake/fsp-s.txt
@@ -463,6 +463,12 @@
- fsps,port-usb20-i-usb-tx-emphasis-en: PerPort HS Transmitter Emphasis
- fsps,port-usb20-per-port-rxi-set: PerPort HS Receiver Bias
- fsps,port-usb20-hs-npre-drv-sel: Delay/skew's strength control for HS driver
+- fsps,os-selection: OS Selection
+ 0: Windows
+ 1: Android
+ 3: Linux
+- fsps,dptf-enabled: DPTF
+- fsps,pwm-enabled: PWM Enabled
Example:
diff --git a/drivers/adc/stm32-adc-core.c b/drivers/adc/stm32-adc-core.c
index 31bbb6f..f20c46f 100644
--- a/drivers/adc/stm32-adc-core.c
+++ b/drivers/adc/stm32-adc-core.c
@@ -7,6 +7,7 @@
*/
#include <common.h>
+#include <dm.h>
#include <asm/io.h>
#include <dm/device_compat.h>
#include <linux/bitops.h>
diff --git a/drivers/adc/stm32-adc-core.h b/drivers/adc/stm32-adc-core.h
index ba0e10e..05968db 100644
--- a/drivers/adc/stm32-adc-core.h
+++ b/drivers/adc/stm32-adc-core.h
@@ -26,9 +26,9 @@
#define STM32_ADC_MAX_ADCS 3
#define STM32_ADCX_COMN_OFFSET 0x300
-#include <common.h>
#include <clk.h>
-#include <dm.h>
+
+struct udevice;
/**
* struct stm32_adc_common - stm32 ADC driver common data (for all instances)
diff --git a/drivers/adc/stm32-adc.c b/drivers/adc/stm32-adc.c
index b12f894..3f0ed48 100644
--- a/drivers/adc/stm32-adc.c
+++ b/drivers/adc/stm32-adc.c
@@ -8,6 +8,7 @@
#include <common.h>
#include <adc.h>
+#include <dm.h>
#include <asm/io.h>
#include <dm/device_compat.h>
#include <linux/bitops.h>
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 82cb187..6003e14 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -83,6 +83,13 @@
set up by U-Boot itself but only statically. Thus the driver does not
support changing clock rates, only querying them.
+config CLK_OCTEON
+ bool "Clock controller driver for Marvell MIPS Octeon"
+ depends on CLK && ARCH_OCTEON
+ default y
+ help
+ Enable this to support the clocks on Octeon MIPS platforms.
+
config CLK_STM32F
bool "Enable clock driver support for STM32F family"
depends on CLK && (STM32F7 || STM32F4)
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index d911954..cda4b4b 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -29,6 +29,7 @@
obj-$(CONFIG_CLK_HSDK) += clk-hsdk-cgu.o
obj-$(CONFIG_CLK_K210) += kendryte/
obj-$(CONFIG_CLK_MPC83XX) += mpc83xx_clk.o
+obj-$(CONFIG_CLK_OCTEON) += clk_octeon.o
obj-$(CONFIG_CLK_OWL) += owl/
obj-$(CONFIG_CLK_RENESAS) += renesas/
obj-$(CONFIG_CLK_SIFIVE) += sifive/
diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index 15656f5..934cd57 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -25,6 +25,11 @@
return (const struct clk_ops *)dev->driver->ops;
}
+struct clk *dev_get_clk_ptr(struct udevice *dev)
+{
+ return (struct clk *)dev_get_uclass_priv(dev);
+}
+
#if CONFIG_IS_ENABLED(OF_CONTROL)
# if CONFIG_IS_ENABLED(OF_PLATDATA)
int clk_get_by_driver_info(struct udevice *dev, struct phandle_1_arg *cells,
diff --git a/drivers/clk/clk_octeon.c b/drivers/clk/clk_octeon.c
new file mode 100644
index 0000000..fd559e0
--- /dev/null
+++ b/drivers/clk/clk_octeon.c
@@ -0,0 +1,72 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2020 Stefan Roese <sr@denx.de>
+ */
+
+#include <clk-uclass.h>
+#include <dm.h>
+#include <dt-bindings/clock/octeon-clock.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct octeon_clk_priv {
+ u64 core_clk;
+ u64 io_clk;
+};
+
+static int octeon_clk_enable(struct clk *clk)
+{
+ /* Nothing to do on Octeon */
+ return 0;
+}
+
+static ulong octeon_clk_get_rate(struct clk *clk)
+{
+ struct octeon_clk_priv *priv = dev_get_priv(clk->dev);
+
+ switch (clk->id) {
+ case OCTEON_CLK_CORE:
+ return priv->core_clk;
+
+ case OCTEON_CLK_IO:
+ return priv->io_clk;
+
+ default:
+ return 0;
+ }
+
+ return 0;
+}
+
+static struct clk_ops octeon_clk_ops = {
+ .enable = octeon_clk_enable,
+ .get_rate = octeon_clk_get_rate,
+};
+
+static const struct udevice_id octeon_clk_ids[] = {
+ { .compatible = "mrvl,octeon-clk" },
+ { /* sentinel */ }
+};
+
+static int octeon_clk_probe(struct udevice *dev)
+{
+ struct octeon_clk_priv *priv = dev_get_priv(dev);
+
+ /*
+ * The clock values are already read into GD, lets just store them
+ * in priv data
+ */
+ priv->core_clk = gd->cpu_clk;
+ priv->io_clk = gd->bus_clk;
+
+ return 0;
+}
+
+U_BOOT_DRIVER(clk_octeon) = {
+ .name = "clk_octeon",
+ .id = UCLASS_CLK,
+ .of_match = octeon_clk_ids,
+ .ops = &octeon_clk_ops,
+ .probe = octeon_clk_probe,
+ .priv_auto_alloc_size = sizeof(struct octeon_clk_priv),
+};
diff --git a/drivers/clk/kendryte/bypass.c b/drivers/clk/kendryte/bypass.c
index d1fd281..5f1986f 100644
--- a/drivers/clk/kendryte/bypass.c
+++ b/drivers/clk/kendryte/bypass.c
@@ -4,12 +4,15 @@
*/
#define LOG_CATEGORY UCLASS_CLK
-#include <kendryte/bypass.h>
+#include <common.h>
+#include <clk.h>
#include <clk-uclass.h>
+#include <dm.h>
+#include <log.h>
+#include <kendryte/bypass.h>
#include <linux/clk-provider.h>
#include <linux/err.h>
-#include <log.h>
#define CLK_K210_BYPASS "k210_clk_bypass"
diff --git a/drivers/clk/kendryte/pll.c b/drivers/clk/kendryte/pll.c
index 19e3588..ab6d75d 100644
--- a/drivers/clk/kendryte/pll.c
+++ b/drivers/clk/kendryte/pll.c
@@ -3,18 +3,20 @@
* Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com>
*/
#define LOG_CATEGORY UCLASS_CLK
-#include <kendryte/pll.h>
-#include <asm/io.h>
+#include <common.h>
+#include <dm.h>
/* For DIV_ROUND_DOWN_ULL, defined in linux/kernel.h */
#include <div64.h>
+#include <log.h>
+#include <serial.h>
+#include <asm/io.h>
#include <dt-bindings/clock/k210-sysctl.h>
+#include <kendryte/pll.h>
#include <linux/bitfield.h>
#include <linux/clk-provider.h>
#include <linux/delay.h>
#include <linux/err.h>
-#include <log.h>
-#include <serial.h>
#define CLK_K210_PLL "k210_clk_pll"
diff --git a/drivers/clk/sifive/fu540-prci.c b/drivers/clk/sifive/fu540-prci.c
index fe6e0d4..c5148e9 100644
--- a/drivers/clk/sifive/fu540-prci.c
+++ b/drivers/clk/sifive/fu540-prci.c
@@ -30,17 +30,22 @@
#include <common.h>
#include <asm/io.h>
+#include <asm/arch/reset.h>
#include <clk-uclass.h>
#include <clk.h>
#include <div64.h>
#include <dm.h>
#include <errno.h>
+#include <reset-uclass.h>
+#include <dm/device.h>
+#include <dm/uclass.h>
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/math64.h>
#include <linux/clk/analogbits-wrpll-cln28hpc.h>
#include <dt-bindings/clock/sifive-fu540-prci.h>
+#include <dt-bindings/reset/sifive-fu540-prci.h>
/*
* EXPECTED_CLK_PARENT_COUNT: how many parent clocks this driver expects:
@@ -131,21 +136,18 @@
/* DEVICESRESETREG */
#define PRCI_DEVICESRESETREG_OFFSET 0x28
-#define PRCI_DEVICESRESETREG_DDR_CTRL_RST_N_SHIFT 0
+#define PRCI_DEVICERESETCNT 5
+
#define PRCI_DEVICESRESETREG_DDR_CTRL_RST_N_MASK \
- (0x1 << PRCI_DEVICESRESETREG_DDR_CTRL_RST_N_SHIFT)
-#define PRCI_DEVICESRESETREG_DDR_AXI_RST_N_SHIFT 1
+ (0x1 << PRCI_RST_DDR_CTRL_N)
#define PRCI_DEVICESRESETREG_DDR_AXI_RST_N_MASK \
- (0x1 << PRCI_DEVICESRESETREG_DDR_AXI_RST_N_SHIFT)
-#define PRCI_DEVICESRESETREG_DDR_AHB_RST_N_SHIFT 2
+ (0x1 << PRCI_RST_DDR_AXI_N)
#define PRCI_DEVICESRESETREG_DDR_AHB_RST_N_MASK \
- (0x1 << PRCI_DEVICESRESETREG_DDR_AHB_RST_N_SHIFT)
-#define PRCI_DEVICESRESETREG_DDR_PHY_RST_N_SHIFT 3
+ (0x1 << PRCI_RST_DDR_AHB_N)
#define PRCI_DEVICESRESETREG_DDR_PHY_RST_N_MASK \
- (0x1 << PRCI_DEVICESRESETREG_DDR_PHY_RST_N_SHIFT)
-#define PRCI_DEVICESRESETREG_GEMGXL_RST_N_SHIFT 5
+ (0x1 << PRCI_RST_DDR_PHY_N)
#define PRCI_DEVICESRESETREG_GEMGXL_RST_N_MASK \
- (0x1 << PRCI_DEVICESRESETREG_GEMGXL_RST_N_SHIFT)
+ (0x1 << PRCI_RST_GEMGXL_N)
/* CLKMUXSTATUSREG */
#define PRCI_CLKMUXSTATUSREG_OFFSET 0x2c
@@ -528,6 +530,41 @@
.recalc_rate = sifive_fu540_prci_tlclksel_recalc_rate,
};
+static int __prci_consumer_reset(const char *rst_name, bool trigger)
+{
+ struct udevice *dev;
+ struct reset_ctl rst_sig;
+ int ret;
+
+ ret = uclass_get_device_by_driver(UCLASS_RESET,
+ DM_GET_DRIVER(sifive_reset),
+ &dev);
+ if (ret) {
+ dev_err(dev, "Reset driver not found: %d\n", ret);
+ return ret;
+ }
+
+ ret = reset_get_by_name(dev, rst_name, &rst_sig);
+ if (ret) {
+ dev_err(dev, "failed to get %s reset\n", rst_name);
+ return ret;
+ }
+
+ if (reset_valid(&rst_sig)) {
+ if (trigger)
+ ret = reset_deassert(&rst_sig);
+ else
+ ret = reset_assert(&rst_sig);
+ if (ret) {
+ dev_err(dev, "failed to trigger reset id = %ld\n",
+ rst_sig.id);
+ return ret;
+ }
+ }
+
+ return ret;
+}
+
/**
* __prci_ddr_release_reset() - Release DDR reset
* @pd: struct __prci_data * for the PRCI containing the DDRCLK mux reg
@@ -535,19 +572,20 @@
*/
static void __prci_ddr_release_reset(struct __prci_data *pd)
{
- u32 v;
-
- v = __prci_readl(pd, PRCI_DEVICESRESETREG_OFFSET);
- v |= PRCI_DEVICESRESETREG_DDR_CTRL_RST_N_MASK;
- __prci_writel(v, PRCI_DEVICESRESETREG_OFFSET, pd);
+ /* Release DDR ctrl reset */
+ __prci_consumer_reset("ddr_ctrl", true);
/* HACK to get the '1 full controller clock cycle'. */
asm volatile ("fence");
- v = __prci_readl(pd, PRCI_DEVICESRESETREG_OFFSET);
- v |= (PRCI_DEVICESRESETREG_DDR_AXI_RST_N_MASK |
- PRCI_DEVICESRESETREG_DDR_AHB_RST_N_MASK |
- PRCI_DEVICESRESETREG_DDR_PHY_RST_N_MASK);
- __prci_writel(v, PRCI_DEVICESRESETREG_OFFSET, pd);
+
+ /* Release DDR AXI reset */
+ __prci_consumer_reset("ddr_axi", true);
+
+ /* Release DDR AHB reset */
+ __prci_consumer_reset("ddr_ahb", true);
+
+ /* Release DDR PHY reset */
+ __prci_consumer_reset("ddr_phy", true);
/* HACK to get the '1 full controller clock cycle'. */
asm volatile ("fence");
@@ -567,12 +605,8 @@
*/
static void __prci_ethernet_release_reset(struct __prci_data *pd)
{
- u32 v;
-
/* Release GEMGXL reset */
- v = __prci_readl(pd, PRCI_DEVICESRESETREG_OFFSET);
- v |= PRCI_DEVICESRESETREG_GEMGXL_RST_N_MASK;
- __prci_writel(v, PRCI_DEVICESRESETREG_OFFSET, pd);
+ __prci_consumer_reset("gemgxl_reset", true);
/* Procmon => core clock */
__prci_writel(PRCI_PROCMONCFG_CORE_CLOCK_MASK, PRCI_PROCMONCFG_OFFSET,
@@ -757,6 +791,11 @@
.disable = sifive_fu540_prci_disable,
};
+static int sifive_fu540_clk_bind(struct udevice *dev)
+{
+ return sifive_reset_bind(dev, PRCI_DEVICERESETCNT);
+}
+
static const struct udevice_id sifive_fu540_prci_ids[] = {
{ .compatible = "sifive,fu540-c000-prci" },
{ }
@@ -769,4 +808,5 @@
.probe = sifive_fu540_prci_probe,
.ops = &sifive_fu540_prci_ops,
.priv_auto_alloc_size = sizeof(struct __prci_data),
+ .bind = sifive_fu540_clk_bind,
};
diff --git a/drivers/ddr/imx/imx8m/ddrphy_utils.c b/drivers/ddr/imx/imx8m/ddrphy_utils.c
index 20ae47b..0f8baef 100644
--- a/drivers/ddr/imx/imx8m/ddrphy_utils.c
+++ b/drivers/ddr/imx/imx8m/ddrphy_utils.c
@@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
/*
-* Copyright 2018 NXP
-*/
+ * Copyright 2018 NXP
+ */
#include <common.h>
#include <errno.h>
@@ -201,7 +201,7 @@
}
unsigned int look_for_max(unsigned int data[],
- unsigned int addr_start, unsigned int addr_end)
+ unsigned int addr_start, unsigned int addr_end)
{
unsigned int i, imax = 0;
@@ -233,9 +233,9 @@
if (i == 0) {
cdd_cha[0] = (tmp >> 8) & 0xff;
} else if (i == 6) {
- cdd_cha[11]=tmp & 0xff;
+ cdd_cha[11] = tmp & 0xff;
} else {
- cdd_chb[ i * 2 - 1] = tmp & 0xff;
+ cdd_chb[i * 2 - 1] = tmp & 0xff;
cdd_chb[i * 2] = (tmp >> 8) & 0xff;
}
}
@@ -254,7 +254,8 @@
g_cdd_ww_max[fsp] = cdd_cha_ww_max > cdd_chb_ww_max ? cdd_cha_ww_max : cdd_chb_ww_max;
} else {
unsigned int ddr4_cdd[64];
- for( i = 0; i < 29; i++) {
+
+ for (i = 0; i < 29; i++) {
tmp = reg32_read(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + (0x54012 + i) * 4);
ddr4_cdd[i * 2] = tmp & 0xff;
ddr4_cdd[i * 2 + 1] = (tmp >> 8) & 0xff;
@@ -269,18 +270,18 @@
void update_umctl2_rank_space_setting(unsigned int pstat_num)
{
- unsigned int i,ddr_type;
+ unsigned int i, ddr_type;
unsigned int addr_slot, rdata, tmp, tmp_t;
- unsigned int ddrc_w2r,ddrc_r2w,ddrc_wr_gap,ddrc_rd_gap;
+ unsigned int ddrc_w2r, ddrc_r2w, ddrc_wr_gap, ddrc_rd_gap;
ddr_type = reg32_read(DDRC_MSTR(0)) & 0x3f;
for (i = 0; i < pstat_num; i++) {
addr_slot = i ? (i + 1) * 0x1000 : 0;
if (ddr_type == 0x20) {
/* update r2w:[13:8], w2r:[5:0] */
- rdata=reg32_read(DDRC_DRAMTMG2(0) + addr_slot);
+ rdata = reg32_read(DDRC_DRAMTMG2(0) + addr_slot);
ddrc_w2r = rdata & 0x3f;
- if(is_imx8mp())
+ if (is_imx8mp())
tmp = ddrc_w2r + (g_cdd_wr_max[i] >> 1);
else
tmp = ddrc_w2r + (g_cdd_wr_max[i] >> 1) + 1;
@@ -297,7 +298,7 @@
reg32_write((DDRC_DRAMTMG2(0) + addr_slot), tmp_t);
} else {
/* update w2r:[5:0] */
- rdata=reg32_read(DDRC_DRAMTMG9(0) + addr_slot);
+ rdata = reg32_read(DDRC_DRAMTMG9(0) + addr_slot);
ddrc_w2r = rdata & 0x3f;
if (is_imx8mp())
tmp = ddrc_w2r + (g_cdd_wr_max[i] >> 1);
@@ -310,7 +311,7 @@
/* update r2w:[13:8] */
rdata = reg32_read(DDRC_DRAMTMG2(0) + addr_slot);
ddrc_r2w = (rdata >> 8) & 0x3f;
- if(is_imx8mp())
+ if (is_imx8mp())
tmp = ddrc_r2w + (g_cdd_rw_max[i] >> 1);
else
tmp = ddrc_r2w + (g_cdd_rw_max[i] >> 1) + 1;
@@ -324,7 +325,7 @@
/* update rankctl: wr_gap:11:8; rd:gap:7:4; quasi-dymic, doc wrong(static) */
rdata = reg32_read(DDRC_RANKCTL(0) + addr_slot);
ddrc_wr_gap = (rdata >> 8) & 0xf;
- if(is_imx8mp())
+ if (is_imx8mp())
tmp = ddrc_wr_gap + (g_cdd_ww_max[i] >> 1);
else
tmp = ddrc_wr_gap + (g_cdd_ww_max[i] >> 1) + 1;
@@ -342,7 +343,7 @@
}
}
- if(is_imx8mq()) {
+ if (is_imx8mq()) {
/* update rankctl: wr_gap:11:8; rd:gap:7:4; quasi-dymic, doc wrong(static) */
rdata = reg32_read(DDRC_RANKCTL(0));
ddrc_wr_gap = (rdata >> 8) & 0xf;
diff --git a/drivers/firmware/psci.c b/drivers/firmware/psci.c
index 23cf807..7d2e49f 100644
--- a/drivers/firmware/psci.c
+++ b/drivers/firmware/psci.c
@@ -25,7 +25,11 @@
#define PSCI_METHOD_HVC 1
#define PSCI_METHOD_SMC 2
+#if CONFIG_IS_ENABLED(EFI_LOADER)
int __efi_runtime_data psci_method;
+#else
+int psci_method __attribute__ ((section(".data")));
+#endif
unsigned long __efi_runtime invoke_psci_fn
(unsigned long function_id, unsigned long arg0,
diff --git a/drivers/fpga/socfpga_arria10.c b/drivers/fpga/socfpga_arria10.c
index dfd3cbb..44e1ac5 100644
--- a/drivers/fpga/socfpga_arria10.c
+++ b/drivers/fpga/socfpga_arria10.c
@@ -13,6 +13,7 @@
#include <altera.h>
#include <asm/arch/pinmux.h>
#include <common.h>
+#include <dm.h>
#include <dm/ofnode.h>
#include <errno.h>
#include <fs_loader.h>
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index ff5cd7e..11e9a17 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -346,6 +346,16 @@
help
Say yes here to support Microchip PIC32 GPIOs.
+config OCTEON_GPIO
+ bool "Octeon II/III/TX/TX2 GPIO driver"
+ depends on DM_GPIO && DM_PCI && (ARCH_OCTEON || ARCH_OCTEONTX || ARCH_OCTEONTX2)
+ default y
+ help
+ Add support for the Marvell Octeon GPIO driver. This is used with
+ various Octeon parts such as Octeon II/III and OcteonTX/TX2.
+ Octeon II/III has 32 GPIOs (count defined via DT) and OcteonTX/TX2
+ has 64 GPIOs (count defined via internal register).
+
config STM32_GPIO
bool "ST STM32 GPIO driver"
depends on DM_GPIO && (ARCH_STM32 || ARCH_STM32MP)
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index e769509..d3d0d3c 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -59,6 +59,7 @@
obj-$(CONFIG_HSDK_CREG_GPIO) += hsdk-creg-gpio.o
obj-$(CONFIG_IMX_RGPIO2P) += imx_rgpio2p.o
obj-$(CONFIG_PIC32_GPIO) += pic32_gpio.o
+obj-$(CONFIG_OCTEON_GPIO) += octeon_gpio.o
obj-$(CONFIG_MVEBU_GPIO) += mvebu_gpio.o
obj-$(CONFIG_MSM_GPIO) += msm_gpio.o
obj-$(CONFIG_$(SPL_)PCF8575_GPIO) += pcf8575_gpio.o
diff --git a/drivers/gpio/mxc_gpio.c b/drivers/gpio/mxc_gpio.c
index a16f571..88b920a 100644
--- a/drivers/gpio/mxc_gpio.c
+++ b/drivers/gpio/mxc_gpio.c
@@ -13,6 +13,8 @@
#include <asm/arch/imx-regs.h>
#include <asm/gpio.h>
#include <asm/io.h>
+#include <dt-structs.h>
+#include <mapmem.h>
enum mxc_gpio_direction {
MXC_GPIO_DIRECTION_IN,
@@ -22,6 +24,10 @@
#define GPIO_PER_BANK 32
struct mxc_gpio_plat {
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+ /* Put this first since driver model will copy the data here */
+ struct dtd_gpio_mxc dtplat;
+#endif
int bank_index;
struct gpio_regs *regs;
};
@@ -280,6 +286,12 @@
int banknum;
char name[18], *str;
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+ struct dtd_gpio_mxc *dtplat = &plat->dtplat;
+
+ plat->regs = map_sysmem(dtplat->reg[0], dtplat->reg[1]);
+#endif
+
banknum = plat->bank_index;
if (IS_ENABLED(CONFIG_ARCH_IMX8))
sprintf(name, "GPIO%d_", banknum);
@@ -297,14 +309,15 @@
static int mxc_gpio_ofdata_to_platdata(struct udevice *dev)
{
- fdt_addr_t addr;
struct mxc_gpio_plat *plat = dev_get_platdata(dev);
+ if (!CONFIG_IS_ENABLED(OF_PLATDATA)) {
+ fdt_addr_t addr;
+ addr = dev_read_addr(dev);
+ if (addr == FDT_ADDR_T_NONE)
+ return -EINVAL;
- addr = dev_read_addr(dev);
- if (addr == FDT_ADDR_T_NONE)
- return -EINVAL;
-
- plat->regs = (struct gpio_regs *)addr;
+ plat->regs = (struct gpio_regs *)addr;
+ }
plat->bank_index = dev->req_seq;
return 0;
@@ -332,6 +345,8 @@
.bind = mxc_gpio_bind,
};
+U_BOOT_DRIVER_ALIAS(gpio_mxc, fsl_imx6q_gpio)
+
#if !CONFIG_IS_ENABLED(OF_CONTROL)
static const struct mxc_gpio_plat mxc_plat[] = {
{ 0, (struct gpio_regs *)GPIO1_BASE_ADDR },
diff --git a/drivers/gpio/octeon_gpio.c b/drivers/gpio/octeon_gpio.c
new file mode 100644
index 0000000..45acaad
--- /dev/null
+++ b/drivers/gpio/octeon_gpio.c
@@ -0,0 +1,242 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2018 Marvell International Ltd.
+ *
+ * (C) Copyright 2011
+ * eInfochips Ltd. <www.einfochips.com>
+ * Written-by: Ajay Bhargav <ajay.bhargav@einfochips.com>
+ *
+ * (C) Copyright 2010
+ * Marvell Semiconductor <www.marvell.com>
+ */
+
+#include <dm.h>
+#include <pci.h>
+#include <pci_ids.h>
+#include <asm/gpio.h>
+#include <asm/io.h>
+#include <linux/bitfield.h>
+#include <linux/compat.h>
+#include <dt-bindings/gpio/gpio.h>
+
+/* Returns the bit value to write or read based on the offset */
+#define GPIO_BIT(x) BIT_ULL((x) & 0x3f)
+
+#define GPIO_RX_DAT 0x00
+#define GPIO_TX_SET 0x08
+#define GPIO_TX_CLR 0x10
+#define GPIO_CONST 0x90 /* OcteonTX only */
+
+/* Offset to register-set for 2nd GPIOs (> 63), OcteonTX only */
+#define GPIO1_OFFSET 0x1400
+
+/* GPIO_CONST register bits */
+#define GPIO_CONST_GPIOS_MASK GENMASK_ULL(7, 0)
+
+/* GPIO_BIT_CFG register bits */
+#define GPIO_BIT_CFG_TX_OE BIT_ULL(0)
+#define GPIO_BIT_CFG_PIN_XOR BIT_ULL(1)
+#define GPIO_BIT_CFG_INT_EN BIT_ULL(2)
+#define GPIO_BIT_CFG_PIN_SEL_MASK GENMASK_ULL(26, 16)
+
+enum {
+ PROBE_PCI = 0, /* PCI based probing */
+ PROBE_DT, /* DT based probing */
+};
+
+struct octeon_gpio_data {
+ int probe;
+ u32 reg_offs;
+ u32 gpio_bit_cfg_offs;
+};
+
+struct octeon_gpio {
+ void __iomem *base;
+ const struct octeon_gpio_data *data;
+};
+
+/* Returns the offset to the output register based on the offset and value */
+static u32 gpio_tx_reg(int offset, int value)
+{
+ u32 ret;
+
+ ret = value ? GPIO_TX_SET : GPIO_TX_CLR;
+ if (offset > 63)
+ ret += GPIO1_OFFSET;
+
+ return ret;
+}
+
+/* Returns the offset to the input data register based on the offset */
+static u32 gpio_rx_dat_reg(int offset)
+{
+ u32 ret;
+
+ ret = GPIO_RX_DAT;
+ if (offset > 63)
+ ret += GPIO1_OFFSET;
+
+ return ret;
+}
+
+static int octeon_gpio_dir_input(struct udevice *dev, unsigned int offset)
+{
+ struct octeon_gpio *gpio = dev_get_priv(dev);
+
+ debug("%s(%s, %u)\n", __func__, dev->name, offset);
+ clrbits_64(gpio->base + gpio->data->gpio_bit_cfg_offs + 8 * offset,
+ GPIO_BIT_CFG_TX_OE | GPIO_BIT_CFG_PIN_XOR |
+ GPIO_BIT_CFG_INT_EN | GPIO_BIT_CFG_PIN_SEL_MASK);
+
+ return 0;
+}
+
+static int octeon_gpio_dir_output(struct udevice *dev, unsigned int offset,
+ int value)
+{
+ struct octeon_gpio *gpio = dev_get_priv(dev);
+
+ debug("%s(%s, %u, %d)\n", __func__, dev->name, offset, value);
+ writeq(GPIO_BIT(offset), gpio->base + gpio->data->reg_offs +
+ gpio_tx_reg(offset, value));
+
+ clrsetbits_64(gpio->base + gpio->data->gpio_bit_cfg_offs + 8 * offset,
+ GPIO_BIT_CFG_PIN_SEL_MASK | GPIO_BIT_CFG_INT_EN,
+ GPIO_BIT_CFG_TX_OE);
+
+ return 0;
+}
+
+static int octeon_gpio_get_value(struct udevice *dev, unsigned int offset)
+{
+ struct octeon_gpio *gpio = dev_get_priv(dev);
+ u64 reg = readq(gpio->base + gpio->data->reg_offs +
+ gpio_rx_dat_reg(offset));
+
+ debug("%s(%s, %u): value: %d\n", __func__, dev->name, offset,
+ !!(reg & GPIO_BIT(offset)));
+
+ return !!(reg & GPIO_BIT(offset));
+}
+
+static int octeon_gpio_set_value(struct udevice *dev,
+ unsigned int offset, int value)
+{
+ struct octeon_gpio *gpio = dev_get_priv(dev);
+
+ debug("%s(%s, %u, %d)\n", __func__, dev->name, offset, value);
+ writeq(GPIO_BIT(offset), gpio->base + gpio->data->reg_offs +
+ gpio_tx_reg(offset, value));
+
+ return 0;
+}
+
+static int octeon_gpio_get_function(struct udevice *dev, unsigned int offset)
+{
+ struct octeon_gpio *gpio = dev_get_priv(dev);
+ u64 val = readq(gpio->base + gpio->data->gpio_bit_cfg_offs +
+ 8 * offset);
+ int pin_sel;
+
+ debug("%s(%s, %u): GPIO_BIT_CFG: 0x%llx\n", __func__, dev->name,
+ offset, val);
+ pin_sel = FIELD_GET(GPIO_BIT_CFG_PIN_SEL_MASK, val);
+ if (pin_sel)
+ return GPIOF_FUNC;
+ else if (val & GPIO_BIT_CFG_TX_OE)
+ return GPIOF_OUTPUT;
+ else
+ return GPIOF_INPUT;
+}
+
+static int octeon_gpio_xlate(struct udevice *dev, struct gpio_desc *desc,
+ struct ofnode_phandle_args *args)
+{
+ if (args->args_count < 1)
+ return -EINVAL;
+
+ desc->offset = args->args[0];
+ desc->flags = 0;
+ if (args->args_count > 1) {
+ if (args->args[1] & GPIO_ACTIVE_LOW)
+ desc->flags |= GPIOD_ACTIVE_LOW;
+ /* In the future add tri-state flag support */
+ }
+ return 0;
+}
+
+static const struct dm_gpio_ops octeon_gpio_ops = {
+ .direction_input = octeon_gpio_dir_input,
+ .direction_output = octeon_gpio_dir_output,
+ .get_value = octeon_gpio_get_value,
+ .set_value = octeon_gpio_set_value,
+ .get_function = octeon_gpio_get_function,
+ .xlate = octeon_gpio_xlate,
+};
+
+static int octeon_gpio_probe(struct udevice *dev)
+{
+ struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+ struct octeon_gpio *priv = dev_get_priv(dev);
+ char *end;
+
+ priv->data = (const struct octeon_gpio_data *)dev_get_driver_data(dev);
+
+ if (priv->data->probe == PROBE_PCI) {
+ priv->base = dm_pci_map_bar(dev, PCI_BASE_ADDRESS_0,
+ PCI_REGION_MEM);
+ uc_priv->gpio_count = readq(priv->base +
+ priv->data->reg_offs + GPIO_CONST) &
+ GPIO_CONST_GPIOS_MASK;
+ } else {
+ priv->base = dev_remap_addr(dev);
+ uc_priv->gpio_count = ofnode_read_u32_default(dev->node,
+ "nr-gpios", 32);
+ }
+
+ if (!priv->base) {
+ debug("%s(%s): Could not get base address\n",
+ __func__, dev->name);
+ return -ENODEV;
+ }
+
+ uc_priv->bank_name = strdup(dev->name);
+ end = strchr(uc_priv->bank_name, '@');
+ end[0] = 'A' + dev->seq;
+ end[1] = '\0';
+
+ debug("%s(%s): base address: %p, pin count: %d\n",
+ __func__, dev->name, priv->base, uc_priv->gpio_count);
+
+ return 0;
+}
+
+static const struct octeon_gpio_data gpio_octeon_data = {
+ .probe = PROBE_DT,
+ .reg_offs = 0x80,
+ .gpio_bit_cfg_offs = 0x100,
+};
+
+static const struct octeon_gpio_data gpio_octeontx_data = {
+ .probe = PROBE_PCI,
+ .reg_offs = 0x00,
+ .gpio_bit_cfg_offs = 0x400,
+};
+
+static const struct udevice_id octeon_gpio_ids[] = {
+ { .compatible = "cavium,thunder-8890-gpio",
+ .data = (ulong)&gpio_octeontx_data },
+ { .compatible = "cavium,octeon-7890-gpio",
+ .data = (ulong)&gpio_octeon_data },
+ { }
+};
+
+U_BOOT_DRIVER(octeon_gpio) = {
+ .name = "octeon_gpio",
+ .id = UCLASS_GPIO,
+ .of_match = of_match_ptr(octeon_gpio_ids),
+ .probe = octeon_gpio_probe,
+ .priv_auto_alloc_size = sizeof(struct octeon_gpio),
+ .ops = &octeon_gpio_ops,
+ .flags = DM_FLAG_PRE_RELOC,
+};
diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c
index 644f465..7886779 100644
--- a/drivers/mmc/fsl_esdhc_imx.c
+++ b/drivers/mmc/fsl_esdhc_imx.c
@@ -33,6 +33,9 @@
#include <dm.h>
#include <asm-generic/gpio.h>
#include <dm/pinctrl.h>
+#include <dt-structs.h>
+#include <mapmem.h>
+#include <dm/ofnode.h>
#if !CONFIG_IS_ENABLED(BLK)
#include "mmc_private.h"
@@ -102,6 +105,11 @@
};
struct fsl_esdhc_plat {
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+ /* Put this first since driver model will copy the data here */
+ struct dtd_fsl_esdhc dtplat;
+#endif
+
struct mmc_config cfg;
struct mmc mmc;
};
@@ -1378,25 +1386,19 @@
{
}
-static int fsl_esdhc_probe(struct udevice *dev)
+static int fsl_esdhc_ofdata_to_platdata(struct udevice *dev)
{
- struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
- struct fsl_esdhc_plat *plat = dev_get_platdata(dev);
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
struct fsl_esdhc_priv *priv = dev_get_priv(dev);
- const void *fdt = gd->fdt_blob;
- int node = dev_of_offset(dev);
- struct esdhc_soc_data *data =
- (struct esdhc_soc_data *)dev_get_driver_data(dev);
#if CONFIG_IS_ENABLED(DM_REGULATOR)
struct udevice *vqmmc_dev;
+ int ret;
#endif
+ const void *fdt = gd->fdt_blob;
+ int node = dev_of_offset(dev);
+
fdt_addr_t addr;
unsigned int val;
- struct mmc *mmc;
-#if !CONFIG_IS_ENABLED(BLK)
- struct blk_desc *bdesc;
-#endif
- int ret;
addr = dev_read_addr(dev);
if (addr == FDT_ADDR_T_NONE)
@@ -1404,8 +1406,6 @@
priv->esdhc_regs = (struct fsl_esdhc *)addr;
priv->dev = dev;
priv->mode = -1;
- if (data)
- priv->flags = data->flags;
val = dev_read_u32_default(dev, "bus-width", -1);
if (val == 8)
@@ -1469,7 +1469,64 @@
priv->vs18_enable = 1;
}
#endif
+#endif
+ return 0;
+}
+
+static int fsl_esdhc_probe(struct udevice *dev)
+{
+ struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
+ struct fsl_esdhc_plat *plat = dev_get_platdata(dev);
+ struct fsl_esdhc_priv *priv = dev_get_priv(dev);
+ struct esdhc_soc_data *data =
+ (struct esdhc_soc_data *)dev_get_driver_data(dev);
+ struct mmc *mmc;
+#if !CONFIG_IS_ENABLED(BLK)
+ struct blk_desc *bdesc;
+#endif
+ int ret;
+
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+ struct dtd_fsl_esdhc *dtplat = &plat->dtplat;
+ unsigned int val;
+
+ priv->esdhc_regs = map_sysmem(dtplat->reg[0], dtplat->reg[1]);
+ val = plat->dtplat.bus_width;
+ if (val == 8)
+ priv->bus_width = 8;
+ else if (val == 4)
+ priv->bus_width = 4;
+ else
+ priv->bus_width = 1;
+
+ if (dtplat->non_removable)
+ priv->non_removable = 1;
+ else
+ priv->non_removable = 0;
+
+ if (CONFIG_IS_ENABLED(DM_GPIO) && !priv->non_removable) {
+ struct udevice *gpiodev;
+ struct driver_info *info;
+
+ info = (struct driver_info *)dtplat->cd_gpios->node;
+
+ ret = device_get_by_driver_info(info, &gpiodev);
+
+ if (ret)
+ return ret;
+
+ ret = gpio_dev_request_index(gpiodev, gpiodev->name, "cd-gpios",
+ dtplat->cd_gpios->arg[0], GPIOD_IS_IN,
+ dtplat->cd_gpios->arg[1], &priv->cd_gpio);
+
+ if (ret)
+ return ret;
+ }
+#endif
+ if (data)
+ priv->flags = data->flags;
+
/*
* TODO:
* Because lack of clk driver, if SDHC clk is not enabled,
@@ -1520,9 +1577,11 @@
return ret;
}
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
ret = mmc_of_parse(dev, &plat->cfg);
if (ret)
return ret;
+#endif
mmc = &plat->mmc;
mmc->cfg = &plat->cfg;
@@ -1644,9 +1703,10 @@
#endif
U_BOOT_DRIVER(fsl_esdhc) = {
- .name = "fsl-esdhc-mmc",
+ .name = "fsl_esdhc",
.id = UCLASS_MMC,
.of_match = fsl_esdhc_ids,
+ .ofdata_to_platdata = fsl_esdhc_ofdata_to_platdata,
.ops = &fsl_esdhc_ops,
#if CONFIG_IS_ENABLED(BLK)
.bind = fsl_esdhc_bind,
@@ -1655,4 +1715,6 @@
.platdata_auto_alloc_size = sizeof(struct fsl_esdhc_plat),
.priv_auto_alloc_size = sizeof(struct fsl_esdhc_priv),
};
+
+U_BOOT_DRIVER_ALIAS(fsl_esdhc, fsl_imx6q_usdhc)
#endif
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index f4eb655..ff871f8 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -15,7 +15,6 @@
#include <malloc.h>
#include <mmc.h>
#include <sdhci.h>
-#include <dm.h>
#include <asm/cache.h>
#include <linux/bitops.h>
#include <linux/delay.h>
diff --git a/drivers/mtd/nand/bbt.c b/drivers/mtd/nand/bbt.c
index 84d60b8..294daee 100644
--- a/drivers/mtd/nand/bbt.c
+++ b/drivers/mtd/nand/bbt.c
@@ -127,7 +127,7 @@
unsigned int rbits = bits_per_block + offs - BITS_PER_LONG;
pos[1] &= ~GENMASK(rbits - 1, 0);
- pos[1] |= val >> rbits;
+ pos[1] |= val >> (bits_per_block - rbits);
}
return 0;
diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand_compat.c b/drivers/mtd/nand/raw/brcmnand/brcmnand_compat.c
index c586798..a6acf55 100644
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand_compat.c
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand_compat.c
@@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
#include <common.h>
+#include <dm.h>
#include <malloc.h>
#include <dm/devres.h>
#include "brcmnand_compat.h"
diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand_compat.h b/drivers/mtd/nand/raw/brcmnand/brcmnand_compat.h
index 6f9bec7..52711d4 100644
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand_compat.h
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand_compat.h
@@ -3,8 +3,8 @@
#ifndef __BRCMNAND_COMPAT_H
#define __BRCMNAND_COMPAT_H
-#include <clk.h>
-#include <dm.h>
+struct clk;
+struct udevice;
char *devm_kasprintf(struct udevice *dev, gfp_t gfp, const char *fmt, ...);
diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile
index 952fd1e..99cc418 100644
--- a/drivers/mtd/spi/Makefile
+++ b/drivers/mtd/spi/Makefile
@@ -8,7 +8,7 @@
ifdef CONFIG_SPL_BUILD
obj-$(CONFIG_SPL_SPI_BOOT) += fsl_espi_spl.o
-ifeq ($(CONFIG_SPL_SPI_FLASH_TINY),y)
+ifeq ($(CONFIG_$(SPL_TPL_)SPI_FLASH_TINY),y)
spi-nor-y += spi-nor-tiny.o
else
spi-nor-y += spi-nor-core.o
diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
index 475f6c3..b959e34 100644
--- a/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -119,7 +119,7 @@
struct erase_info instr;
if (offset % mtd->erasesize || len % mtd->erasesize) {
- printf("SF: Erase offset/length not multiple of erase size\n");
+ debug("SF: Erase offset/length not multiple of erase size\n");
return -EINVAL;
}
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index fdcd830..0113e70 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -2470,7 +2470,7 @@
* designer) that this is bad.
*/
if (nor->flags & SNOR_F_BROKEN_RESET)
- printf("enabling reset hack; may not recover from unexpected reboots\n");
+ debug("enabling reset hack; may not recover from unexpected reboots\n");
set_4byte(nor, nor->info, 1);
}
diff --git a/drivers/mtd/spi/spi-nor-tiny.c b/drivers/mtd/spi/spi-nor-tiny.c
index 9f676c6..fa26ea3 100644
--- a/drivers/mtd/spi/spi-nor-tiny.c
+++ b/drivers/mtd/spi/spi-nor-tiny.c
@@ -377,7 +377,7 @@
}
dev_dbg(nor->dev, "unrecognized JEDEC id bytes: %02x, %02x, %02x\n",
id[0], id[1], id[2]);
- return ERR_PTR(-ENODEV);
+ return ERR_PTR(-EMEDIUMTYPE);
}
static int spi_nor_read(struct mtd_info *mtd, loff_t from, size_t len,
@@ -733,7 +733,7 @@
info = spi_nor_read_id(nor);
if (IS_ERR_OR_NULL(info))
- return -ENOENT;
+ return PTR_ERR(info);
/* Parse the Serial Flash Discoverable Parameters table. */
ret = spi_nor_init_params(nor, info, ¶ms);
if (ret)
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 15030b8..ecd779d 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -156,9 +156,30 @@
help
This driver supports the Synopsys Designware Ethernet QOS (Quality
Of Service) IP block. The IP supports many options for bus type,
- clocking/reset structure, and feature list. This driver currently
- supports the specific configuration used in NVIDIA's Tegra186 chip,
- but should be extensible to other combinations quite easily.
+ clocking/reset structure, and feature list.
+
+config DWC_ETH_QOS_IMX
+ bool "Synopsys DWC Ethernet QOS device support for IMX"
+ depends on DWC_ETH_QOS
+ help
+ The Synopsys Designware Ethernet QOS IP block with the specific
+ configuration used in IMX soc.
+
+config DWC_ETH_QOS_STM32
+ bool "Synopsys DWC Ethernet QOS device support for STM32"
+ depends on DWC_ETH_QOS
+ default y if ARCH_STM32MP
+ help
+ The Synopsys Designware Ethernet QOS IP block with the specific
+ configuration used in STM32MP soc.
+
+config DWC_ETH_QOS_TEGRA186
+ bool "Synopsys DWC Ethernet QOS device support for TEGRA186"
+ depends on DWC_ETH_QOS
+ default y if TEGRA186
+ help
+ The Synopsys Designware Ethernet QOS IP block with specific
+ configuration used in NVIDIA's Tegra186 chip.
config E1000
bool "Intel PRO/1000 Gigabit Ethernet support"
diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index 1d9eefb..810a2b9 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -2100,7 +2100,7 @@
.eqos_get_tick_clk_rate = eqos_get_tick_clk_rate_tegra186
};
-static const struct eqos_config eqos_tegra186_config = {
+static const struct eqos_config __maybe_unused eqos_tegra186_config = {
.reg_access_always_ok = false,
.mdio_wait = 10,
.swr_wait = 10,
@@ -2127,7 +2127,7 @@
.eqos_get_tick_clk_rate = eqos_get_tick_clk_rate_stm32
};
-static const struct eqos_config eqos_stm32_config = {
+static const struct eqos_config __maybe_unused eqos_stm32_config = {
.reg_access_always_ok = false,
.mdio_wait = 10000,
.swr_wait = 50,
@@ -2154,7 +2154,7 @@
.eqos_get_tick_clk_rate = eqos_get_tick_clk_rate_imx
};
-struct eqos_config eqos_imx_config = {
+struct eqos_config __maybe_unused eqos_imx_config = {
.reg_access_always_ok = false,
.mdio_wait = 10000,
.swr_wait = 50,
@@ -2165,18 +2165,24 @@
};
static const struct udevice_id eqos_ids[] = {
+#if IS_ENABLED(CONFIG_DWC_ETH_QOS_TEGRA186)
{
.compatible = "nvidia,tegra186-eqos",
.data = (ulong)&eqos_tegra186_config
},
+#endif
+#if IS_ENABLED(CONFIG_DWC_ETH_QOS_STM32)
{
.compatible = "st,stm32mp1-dwmac",
.data = (ulong)&eqos_stm32_config
},
+#endif
+#if IS_ENABLED(CONFIG_DWC_ETH_QOS_IMX)
{
.compatible = "fsl,imx-eqos",
.data = (ulong)&eqos_imx_config
},
+#endif
{ }
};
diff --git a/drivers/net/pcnet.c b/drivers/net/pcnet.c
index 5595608..ad5ac66 100644
--- a/drivers/net/pcnet.c
+++ b/drivers/net/pcnet.c
@@ -10,7 +10,6 @@
#include <cpu_func.h>
#include <dm.h>
#include <log.h>
-#include <dm.h>
#include <malloc.h>
#include <memalign.h>
#include <net.h>
diff --git a/drivers/pci/pcie_layerscape.h b/drivers/pci/pcie_layerscape.h
index 593798e..0124e8e 100644
--- a/drivers/pci/pcie_layerscape.h
+++ b/drivers/pci/pcie_layerscape.h
@@ -8,7 +8,7 @@
#ifndef _PCIE_LAYERSCAPE_H_
#define _PCIE_LAYERSCAPE_H_
#include <pci.h>
-#include <dm.h>
+
#include <linux/sizes.h>
#ifndef CONFIG_SYS_PCI_MEMORY_BUS
diff --git a/drivers/pci/pcie_layerscape_fixup.c b/drivers/pci/pcie_layerscape_fixup.c
index 94de4ed..8315b0b 100644
--- a/drivers/pci/pcie_layerscape_fixup.c
+++ b/drivers/pci/pcie_layerscape_fixup.c
@@ -6,6 +6,7 @@
*/
#include <common.h>
+#include <dm.h>
#include <init.h>
#include <log.h>
#include <pci.h>
diff --git a/drivers/pci/pcie_layerscape_gen4.h b/drivers/pci/pcie_layerscape_gen4.h
index d298a2b..483eb53 100644
--- a/drivers/pci/pcie_layerscape_gen4.h
+++ b/drivers/pci/pcie_layerscape_gen4.h
@@ -9,7 +9,6 @@
#ifndef _PCIE_LAYERSCAPE_GEN4_H_
#define _PCIE_LAYERSCAPE_GEN4_H_
#include <pci.h>
-#include <dm.h>
#include <linux/bitops.h>
#ifndef CONFIG_SYS_PCI_MEMORY_SIZE
diff --git a/drivers/pci/pcie_layerscape_gen4_fixup.c b/drivers/pci/pcie_layerscape_gen4_fixup.c
index 375ce45..148b5d1 100644
--- a/drivers/pci/pcie_layerscape_gen4_fixup.c
+++ b/drivers/pci/pcie_layerscape_gen4_fixup.c
@@ -8,6 +8,7 @@
*/
#include <common.h>
+#include <dm.h>
#include <log.h>
#include <pci.h>
#include <asm/arch/fsl_serdes.h>
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index bd2061b..cdbccfd 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -276,13 +276,13 @@
See the help of PINCTRL_STMFX for details.
config ASPEED_AST2500_PINCTRL
- bool "Aspeed AST2500 pin control driver"
- depends on DM && PINCTRL_GENERIC && ASPEED_AST2500
- default y
- help
- Support pin multiplexing control on Aspeed ast2500 SoC. The driver uses
- Generic Pinctrl framework and is compatible with the Linux driver,
- i.e. it uses the same device tree configuration.
+ bool "Aspeed AST2500 pin control driver"
+ depends on DM && PINCTRL_GENERIC && ASPEED_AST2500
+ default y
+ help
+ Support pin multiplexing control on Aspeed ast2500 SoC. The driver
+ uses Generic Pinctrl framework and is compatible with the Linux
+ driver, i.e. it uses the same device tree configuration.
endif
diff --git a/drivers/pinctrl/nxp/pinctrl-imx6.c b/drivers/pinctrl/nxp/pinctrl-imx6.c
index aafa305..84004e5 100644
--- a/drivers/pinctrl/nxp/pinctrl-imx6.c
+++ b/drivers/pinctrl/nxp/pinctrl-imx6.c
@@ -41,8 +41,8 @@
{ /* sentinel */ }
};
-U_BOOT_DRIVER(imx6_pinctrl) = {
- .name = "imx6-pinctrl",
+U_BOOT_DRIVER(fsl_imx6q_iomuxc) = {
+ .name = "fsl_imx6q_iomuxc",
.id = UCLASS_PINCTRL,
.of_match = of_match_ptr(imx6_pinctrl_match),
.probe = imx6_pinctrl_probe,
@@ -51,3 +51,5 @@
.ops = &imx_pinctrl_ops,
.flags = DM_FLAG_PRE_RELOC,
};
+
+U_BOOT_DRIVER_ALIAS(fsl_imx6q_iomuxc, fsl_imx6dl_iomuxc)
diff --git a/drivers/power/regulator/fixed.c b/drivers/power/regulator/fixed.c
index b5f7aec..2fa6c7e 100644
--- a/drivers/power/regulator/fixed.c
+++ b/drivers/power/regulator/fixed.c
@@ -5,7 +5,6 @@
* Przemyslaw Marczak <p.marczak@samsung.com>
*/
-#include "regulator_common.h"
#include <common.h>
#include <errno.h>
#include <dm.h>
@@ -13,6 +12,8 @@
#include <power/pmic.h>
#include <power/regulator.h>
+#include "regulator_common.h"
+
static int fixed_regulator_ofdata_to_platdata(struct udevice *dev)
{
struct dm_regulator_uclass_platdata *uc_pdata;
diff --git a/drivers/power/regulator/gpio-regulator.c b/drivers/power/regulator/gpio-regulator.c
index cf3fbae..947f812 100644
--- a/drivers/power/regulator/gpio-regulator.c
+++ b/drivers/power/regulator/gpio-regulator.c
@@ -4,7 +4,6 @@
* Keerthy <j-keerthy@ti.com>
*/
-#include "regulator_common.h"
#include <common.h>
#include <fdtdec.h>
#include <errno.h>
@@ -15,6 +14,8 @@
#include <power/pmic.h>
#include <power/regulator.h>
+#include "regulator_common.h"
+
#define GPIO_REGULATOR_MAX_STATES 2
DECLARE_GLOBAL_DATA_PTR;
diff --git a/drivers/power/regulator/regulator_common.c b/drivers/power/regulator/regulator_common.c
index 4cfcc31..13906b9 100644
--- a/drivers/power/regulator/regulator_common.c
+++ b/drivers/power/regulator/regulator_common.c
@@ -4,12 +4,14 @@
* Sven Schwermer <sven.svenschwermer@disruptive-technologies.com>
*/
-#include "regulator_common.h"
#include <common.h>
+#include <dm.h>
#include <log.h>
#include <linux/delay.h>
#include <power/regulator.h>
+#include "regulator_common.h"
+
int regulator_common_ofdata_to_platdata(struct udevice *dev,
struct regulator_common_platdata *dev_pdata, const char *enable_gpio_name)
{
diff --git a/drivers/power/regulator/regulator_common.h b/drivers/power/regulator/regulator_common.h
index 18a5258..bf80439 100644
--- a/drivers/power/regulator/regulator_common.h
+++ b/drivers/power/regulator/regulator_common.h
@@ -7,9 +7,7 @@
#ifndef _REGULATOR_COMMON_H
#define _REGULATOR_COMMON_H
-#include <common.h>
#include <asm/gpio.h>
-#include <dm.h>
struct regulator_common_platdata {
struct gpio_desc gpio; /* GPIO for regulator enable control */
diff --git a/drivers/ram/k3-am654-ddrss.c b/drivers/ram/k3-am654-ddrss.c
index 8bbd8cf..21e5a65 100644
--- a/drivers/ram/k3-am654-ddrss.c
+++ b/drivers/ram/k3-am654-ddrss.c
@@ -13,7 +13,6 @@
#include <ram.h>
#include <asm/io.h>
#include <power-domain.h>
-#include <dm.h>
#include <asm/arch/sys_proto.h>
#include <dm/device_compat.h>
#include <power/regulator.h>
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index 6d53561..253902f 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -148,6 +148,15 @@
help
Support for reset controller on i.MX7/8 SoCs.
+config RESET_SIFIVE
+ bool "Reset Driver for SiFive SoC's"
+ depends on DM_RESET && CLK_SIFIVE_FU540_PRCI && TARGET_SIFIVE_FU540
+ default y
+ help
+ PRCI module within SiFive SoC's provides mechanism to reset
+ different hw blocks like DDR, gemgxl. With this driver we leverage
+ U-Boot's reset framework to reset these hardware blocks.
+
config RESET_SYSCON
bool "Enable generic syscon reset driver support"
depends on DM_RESET
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index 8e0124b..3c7f066 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -23,5 +23,6 @@
obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o
obj-$(CONFIG_RESET_HISILICON) += reset-hisilicon.o
obj-$(CONFIG_RESET_IMX7) += reset-imx7.o
+obj-$(CONFIG_RESET_SIFIVE) += reset-sifive.o
obj-$(CONFIG_RESET_SYSCON) += reset-syscon.o
obj-$(CONFIG_RESET_RASPBERRYPI) += reset-raspberrypi.o
diff --git a/drivers/reset/reset-sifive.c b/drivers/reset/reset-sifive.c
new file mode 100644
index 0000000..527757f
--- /dev/null
+++ b/drivers/reset/reset-sifive.c
@@ -0,0 +1,118 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2020 Sifive, Inc.
+ * Author: Sagar Kadam <sagar.kadam@sifive.com>
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <reset-uclass.h>
+#include <asm/io.h>
+#include <dm/device_compat.h>
+#include <dm/lists.h>
+#include <linux/bitops.h>
+
+#define PRCI_RESETREG_OFFSET 0x28
+
+struct sifive_reset_priv {
+ void *base;
+ /* number of reset signals */
+ int nr_reset;
+};
+
+static int sifive_rst_trigger(struct reset_ctl *rst, bool level)
+{
+ struct sifive_reset_priv *priv = dev_get_priv(rst->dev);
+ int id = rst->id;
+ int regval = readl(priv->base + PRCI_RESETREG_OFFSET);
+
+ /* Derive bitposition from rst id */
+ if (level)
+ /* Reset deassert */
+ regval |= BIT(id);
+ else
+ /* Reset assert */
+ regval &= ~BIT(id);
+
+ writel(regval, priv->base + PRCI_RESETREG_OFFSET);
+
+ return 0;
+}
+
+static int sifive_reset_assert(struct reset_ctl *rst)
+{
+ return sifive_rst_trigger(rst, false);
+}
+
+static int sifive_reset_deassert(struct reset_ctl *rst)
+{
+ return sifive_rst_trigger(rst, true);
+}
+
+static int sifive_reset_request(struct reset_ctl *rst)
+{
+ struct sifive_reset_priv *priv = dev_get_priv(rst->dev);
+
+ debug("%s(rst=%p) (dev=%p, id=%lu) (nr_reset=%d)\n", __func__,
+ rst, rst->dev, rst->id, priv->nr_reset);
+
+ if (rst->id > priv->nr_reset)
+ return -EINVAL;
+
+ return 0;
+}
+
+static int sifive_reset_free(struct reset_ctl *rst)
+{
+ struct sifive_reset_priv *priv = dev_get_priv(rst->dev);
+
+ debug("%s(rst=%p) (dev=%p, id=%lu) (nr_reset=%d)\n", __func__,
+ rst, rst->dev, rst->id, priv->nr_reset);
+
+ return 0;
+}
+
+static int sifive_reset_probe(struct udevice *dev)
+{
+ struct sifive_reset_priv *priv = dev_get_priv(dev);
+
+ priv->base = dev_remap_addr(dev);
+ if (!priv->base)
+ return -ENOMEM;
+
+ return 0;
+}
+
+int sifive_reset_bind(struct udevice *dev, ulong count)
+{
+ struct udevice *rst_dev;
+ struct sifive_reset_priv *priv;
+ int ret;
+
+ ret = device_bind_driver_to_node(dev, "sifive-reset", "reset",
+ dev_ofnode(dev), &rst_dev);
+ if (ret) {
+ dev_err(dev, "failed to bind sifive_reset driver (ret=%d)\n", ret);
+ return ret;
+ }
+ priv = malloc(sizeof(struct sifive_reset_priv));
+ priv->nr_reset = count;
+ rst_dev->priv = priv;
+
+ return 0;
+}
+
+const struct reset_ops sifive_reset_ops = {
+ .request = sifive_reset_request,
+ .rfree = sifive_reset_free,
+ .rst_assert = sifive_reset_assert,
+ .rst_deassert = sifive_reset_deassert,
+};
+
+U_BOOT_DRIVER(sifive_reset) = {
+ .name = "sifive-reset",
+ .id = UCLASS_RESET,
+ .ops = &sifive_reset_ops,
+ .probe = sifive_reset_probe,
+ .priv_auto_alloc_size = sizeof(struct sifive_reset_priv),
+};
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 30d808d..3fc2d06 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -240,6 +240,14 @@
Enable the NXP FlexSPI (FSPI) driver. This driver can be used to
access the SPI NOR flash on platforms embedding this NXP IP core.
+config OCTEON_SPI
+ bool "Octeon SPI driver"
+ depends on DM_PCI && (ARCH_OCTEON || ARCH_OCTEONTX || ARCH_OCTEONTX2)
+ help
+ Enable the Octeon SPI driver. This driver can be used to
+ access the SPI NOR flash on Octeon II/III and OcteonTX/TX2
+ SoC platforms.
+
config OMAP3_SPI
bool "McSPI driver for OMAP"
help
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 4e74617..b5c9ff1 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -43,6 +43,7 @@
obj-$(CONFIG_MXS_SPI) += mxs_spi.o
obj-$(CONFIG_NXP_FSPI) += nxp_fspi.o
obj-$(CONFIG_ATCSPI200_SPI) += atcspi200_spi.o
+obj-$(CONFIG_OCTEON_SPI) += octeon_spi.o
obj-$(CONFIG_OMAP3_SPI) += omap3_spi.o
obj-$(CONFIG_PIC32_SPI) += pic32_spi.o
obj-$(CONFIG_PL022_SPI) += pl022_spi.o
diff --git a/drivers/spi/mscc_bb_spi.c b/drivers/spi/mscc_bb_spi.c
index 0454410..e77447b 100644
--- a/drivers/spi/mscc_bb_spi.c
+++ b/drivers/spi/mscc_bb_spi.c
@@ -11,7 +11,6 @@
#include <log.h>
#include <malloc.h>
#include <spi.h>
-#include <dm.h>
#include <asm/gpio.h>
#include <asm/io.h>
#include <linux/bitops.h>
diff --git a/drivers/spi/octeon_spi.c b/drivers/spi/octeon_spi.c
new file mode 100644
index 0000000..83fe633
--- /dev/null
+++ b/drivers/spi/octeon_spi.c
@@ -0,0 +1,613 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2018 Marvell International Ltd.
+ */
+
+#include <clk.h>
+#include <dm.h>
+#include <malloc.h>
+#include <spi.h>
+#include <spi-mem.h>
+#include <watchdog.h>
+#include <asm/io.h>
+#include <asm/unaligned.h>
+#include <linux/bitfield.h>
+#include <linux/compat.h>
+#include <linux/delay.h>
+
+#define OCTEON_SPI_MAX_BYTES 9
+#define OCTEON_SPI_MAX_CLOCK_HZ 50000000
+
+#define OCTEON_SPI_NUM_CS 4
+
+#define OCTEON_SPI_CS_VALID(cs) ((cs) < OCTEON_SPI_NUM_CS)
+
+#define MPI_CFG 0x0000
+#define MPI_STS 0x0008
+#define MPI_TX 0x0010
+#define MPI_XMIT 0x0018
+#define MPI_WIDE_DAT 0x0040
+#define MPI_IO_CTL 0x0048
+#define MPI_DAT(X) (0x0080 + ((X) << 3))
+#define MPI_WIDE_BUF(X) (0x0800 + ((X) << 3))
+#define MPI_CYA_CFG 0x1000
+#define MPI_CLKEN 0x1080
+
+#define MPI_CFG_ENABLE BIT_ULL(0)
+#define MPI_CFG_IDLELO BIT_ULL(1)
+#define MPI_CFG_CLK_CONT BIT_ULL(2)
+#define MPI_CFG_WIREOR BIT_ULL(3)
+#define MPI_CFG_LSBFIRST BIT_ULL(4)
+#define MPI_CFG_CS_STICKY BIT_ULL(5)
+#define MPI_CFG_CSHI BIT_ULL(7)
+#define MPI_CFG_IDLECLKS GENMASK_ULL(9, 8)
+#define MPI_CFG_TRITX BIT_ULL(10)
+#define MPI_CFG_CSLATE BIT_ULL(11)
+#define MPI_CFG_CSENA0 BIT_ULL(12)
+#define MPI_CFG_CSENA1 BIT_ULL(13)
+#define MPI_CFG_CSENA2 BIT_ULL(14)
+#define MPI_CFG_CSENA3 BIT_ULL(15)
+#define MPI_CFG_CLKDIV GENMASK_ULL(28, 16)
+#define MPI_CFG_LEGACY_DIS BIT_ULL(31)
+#define MPI_CFG_IOMODE GENMASK_ULL(35, 34)
+#define MPI_CFG_TB100_EN BIT_ULL(49)
+
+#define MPI_DAT_DATA GENMASK_ULL(7, 0)
+
+#define MPI_STS_BUSY BIT_ULL(0)
+#define MPI_STS_MPI_INTR BIT_ULL(1)
+#define MPI_STS_RXNUM GENMASK_ULL(12, 8)
+
+#define MPI_TX_TOTNUM GENMASK_ULL(4, 0)
+#define MPI_TX_TXNUM GENMASK_ULL(12, 8)
+#define MPI_TX_LEAVECS BIT_ULL(16)
+#define MPI_TX_CSID GENMASK_ULL(21, 20)
+
+#define MPI_XMIT_TOTNUM GENMASK_ULL(10, 0)
+#define MPI_XMIT_TXNUM GENMASK_ULL(30, 20)
+#define MPI_XMIT_BUF_SEL BIT_ULL(59)
+#define MPI_XMIT_LEAVECS BIT_ULL(60)
+#define MPI_XMIT_CSID GENMASK_ULL(62, 61)
+
+/* Used on Octeon TX2 */
+void board_acquire_flash_arb(bool acquire);
+
+/* Local driver data structure */
+struct octeon_spi {
+ void __iomem *base; /* Register base address */
+ struct clk clk;
+ u32 clkdiv; /* Clock divisor for device speed */
+};
+
+static u64 octeon_spi_set_mpicfg(struct udevice *dev)
+{
+ struct dm_spi_slave_platdata *slave = dev_get_parent_platdata(dev);
+ struct udevice *bus = dev_get_parent(dev);
+ struct octeon_spi *priv = dev_get_priv(bus);
+ u64 mpi_cfg;
+ uint max_speed = slave->max_hz;
+ bool cpha, cpol;
+
+ if (!max_speed)
+ max_speed = 12500000;
+ if (max_speed > OCTEON_SPI_MAX_CLOCK_HZ)
+ max_speed = OCTEON_SPI_MAX_CLOCK_HZ;
+
+ debug("\n slave params %d %d %d\n", slave->cs,
+ slave->max_hz, slave->mode);
+ cpha = !!(slave->mode & SPI_CPHA);
+ cpol = !!(slave->mode & SPI_CPOL);
+
+ mpi_cfg = FIELD_PREP(MPI_CFG_CLKDIV, priv->clkdiv & 0x1fff) |
+ FIELD_PREP(MPI_CFG_CSHI, !!(slave->mode & SPI_CS_HIGH)) |
+ FIELD_PREP(MPI_CFG_LSBFIRST, !!(slave->mode & SPI_LSB_FIRST)) |
+ FIELD_PREP(MPI_CFG_WIREOR, !!(slave->mode & SPI_3WIRE)) |
+ FIELD_PREP(MPI_CFG_IDLELO, cpha != cpol) |
+ FIELD_PREP(MPI_CFG_CSLATE, cpha) |
+ MPI_CFG_CSENA0 | MPI_CFG_CSENA1 |
+ MPI_CFG_CSENA2 | MPI_CFG_CSENA1 |
+ MPI_CFG_ENABLE;
+
+ debug("\n mpi_cfg %llx\n", mpi_cfg);
+ return mpi_cfg;
+}
+
+/**
+ * Wait until the SPI bus is ready
+ *
+ * @param dev SPI device to wait for
+ */
+static void octeon_spi_wait_ready(struct udevice *dev)
+{
+ struct udevice *bus = dev_get_parent(dev);
+ struct octeon_spi *priv = dev_get_priv(bus);
+ void *base = priv->base;
+ u64 mpi_sts;
+
+ do {
+ mpi_sts = readq(base + MPI_STS);
+ WATCHDOG_RESET();
+ } while (mpi_sts & MPI_STS_BUSY);
+
+ debug("%s(%s)\n", __func__, dev->name);
+}
+
+/**
+ * Claim the bus for a slave device
+ *
+ * @param dev SPI bus
+ *
+ * @return 0 for success, -EINVAL if chip select is invalid
+ */
+static int octeon_spi_claim_bus(struct udevice *dev)
+{
+ struct udevice *bus = dev_get_parent(dev);
+ struct octeon_spi *priv = dev_get_priv(bus);
+ void *base = priv->base;
+ u64 mpi_cfg;
+
+ debug("\n\n%s(%s)\n", __func__, dev->name);
+ if (!OCTEON_SPI_CS_VALID(spi_chip_select(dev)))
+ return -EINVAL;
+
+ if (IS_ENABLED(CONFIG_ARCH_OCTEONTX2))
+ board_acquire_flash_arb(true);
+
+ mpi_cfg = readq(base + MPI_CFG);
+ mpi_cfg &= ~MPI_CFG_TRITX;
+ mpi_cfg |= MPI_CFG_ENABLE;
+ writeq(mpi_cfg, base + MPI_CFG);
+ mpi_cfg = readq(base + MPI_CFG);
+ udelay(5); /** Wait for bus to settle */
+
+ return 0;
+}
+
+/**
+ * Release the bus to a slave device
+ *
+ * @param dev SPI bus
+ *
+ * @return 0 for success, -EINVAL if chip select is invalid
+ */
+static int octeon_spi_release_bus(struct udevice *dev)
+{
+ struct udevice *bus = dev_get_parent(dev);
+ struct octeon_spi *priv = dev_get_priv(bus);
+ void *base = priv->base;
+ u64 mpi_cfg;
+
+ debug("%s(%s)\n\n", __func__, dev->name);
+ if (!OCTEON_SPI_CS_VALID(spi_chip_select(dev)))
+ return -EINVAL;
+
+ if (IS_ENABLED(CONFIG_ARCH_OCTEONTX2))
+ board_acquire_flash_arb(false);
+
+ mpi_cfg = readq(base + MPI_CFG);
+ mpi_cfg &= ~MPI_CFG_ENABLE;
+ writeq(mpi_cfg, base + MPI_CFG);
+ mpi_cfg = readq(base + MPI_CFG);
+ udelay(1);
+
+ return 0;
+}
+
+static int octeon_spi_xfer(struct udevice *dev, unsigned int bitlen,
+ const void *dout, void *din, unsigned long flags)
+{
+ struct udevice *bus = dev_get_parent(dev);
+ struct octeon_spi *priv = dev_get_priv(bus);
+ void *base = priv->base;
+ u64 mpi_tx;
+ u64 mpi_cfg;
+ u64 wide_dat = 0;
+ int len = bitlen / 8;
+ int i;
+ const u8 *tx_data = dout;
+ u8 *rx_data = din;
+ int cs = spi_chip_select(dev);
+
+ if (!OCTEON_SPI_CS_VALID(cs))
+ return -EINVAL;
+
+ debug("\n %s(%s, %u, %p, %p, 0x%lx), cs: %d\n",
+ __func__, dev->name, bitlen, dout, din, flags, cs);
+
+ mpi_cfg = octeon_spi_set_mpicfg(dev);
+ if (mpi_cfg != readq(base + MPI_CFG)) {
+ writeq(mpi_cfg, base + MPI_CFG);
+ mpi_cfg = readq(base + MPI_CFG);
+ udelay(10);
+ }
+
+ debug("\n mpi_cfg upd %llx\n", mpi_cfg);
+
+ /*
+ * Start by writing and reading 8 bytes at a time. While we can support
+ * up to 10, it's easier to just use 8 with the MPI_WIDE_DAT register.
+ */
+ while (len > 8) {
+ if (tx_data) {
+ wide_dat = get_unaligned((u64 *)tx_data);
+ debug(" tx: %016llx \t", (unsigned long long)wide_dat);
+ tx_data += 8;
+ writeq(wide_dat, base + MPI_WIDE_DAT);
+ }
+
+ mpi_tx = FIELD_PREP(MPI_TX_CSID, cs) |
+ FIELD_PREP(MPI_TX_LEAVECS, 1) |
+ FIELD_PREP(MPI_TX_TXNUM, tx_data ? 8 : 0) |
+ FIELD_PREP(MPI_TX_TOTNUM, 8);
+ writeq(mpi_tx, base + MPI_TX);
+
+ octeon_spi_wait_ready(dev);
+
+ debug("\n ");
+
+ if (rx_data) {
+ wide_dat = readq(base + MPI_WIDE_DAT);
+ debug(" rx: %016llx\t", (unsigned long long)wide_dat);
+ *(u64 *)rx_data = wide_dat;
+ rx_data += 8;
+ }
+ len -= 8;
+ }
+
+ debug("\n ");
+
+ /* Write and read the rest of the data */
+ if (tx_data) {
+ for (i = 0; i < len; i++) {
+ debug(" tx: %02x\n", *tx_data);
+ writeq(*tx_data++, base + MPI_DAT(i));
+ }
+ }
+
+ mpi_tx = FIELD_PREP(MPI_TX_CSID, cs) |
+ FIELD_PREP(MPI_TX_LEAVECS, !(flags & SPI_XFER_END)) |
+ FIELD_PREP(MPI_TX_TXNUM, tx_data ? len : 0) |
+ FIELD_PREP(MPI_TX_TOTNUM, len);
+ writeq(mpi_tx, base + MPI_TX);
+
+ octeon_spi_wait_ready(dev);
+
+ debug("\n ");
+
+ if (rx_data) {
+ for (i = 0; i < len; i++) {
+ *rx_data = readq(base + MPI_DAT(i)) & 0xff;
+ debug(" rx: %02x\n", *rx_data);
+ rx_data++;
+ }
+ }
+
+ return 0;
+}
+
+static int octeontx2_spi_xfer(struct udevice *dev, unsigned int bitlen,
+ const void *dout, void *din, unsigned long flags)
+{
+ struct udevice *bus = dev_get_parent(dev);
+ struct octeon_spi *priv = dev_get_priv(bus);
+ void *base = priv->base;
+ u64 mpi_xmit;
+ u64 mpi_cfg;
+ u64 wide_dat = 0;
+ int len = bitlen / 8;
+ int rem;
+ int i;
+ const u8 *tx_data = dout;
+ u8 *rx_data = din;
+ int cs = spi_chip_select(dev);
+
+ if (!OCTEON_SPI_CS_VALID(cs))
+ return -EINVAL;
+
+ debug("\n %s(%s, %u, %p, %p, 0x%lx), cs: %d\n",
+ __func__, dev->name, bitlen, dout, din, flags, cs);
+
+ mpi_cfg = octeon_spi_set_mpicfg(dev);
+
+ mpi_cfg |= MPI_CFG_TRITX | MPI_CFG_LEGACY_DIS | MPI_CFG_CS_STICKY |
+ MPI_CFG_TB100_EN;
+
+ mpi_cfg &= ~MPI_CFG_IOMODE;
+ if (flags & (SPI_TX_DUAL | SPI_RX_DUAL))
+ mpi_cfg |= FIELD_PREP(MPI_CFG_IOMODE, 2);
+ if (flags & (SPI_TX_QUAD | SPI_RX_QUAD))
+ mpi_cfg |= FIELD_PREP(MPI_CFG_IOMODE, 3);
+
+ if (mpi_cfg != readq(base + MPI_CFG)) {
+ writeq(mpi_cfg, base + MPI_CFG);
+ mpi_cfg = readq(base + MPI_CFG);
+ udelay(10);
+ }
+
+ debug("\n mpi_cfg upd %llx\n\n", mpi_cfg);
+
+ /* Start by writing or reading 1024 bytes at a time. */
+ while (len > 1024) {
+ if (tx_data) {
+ /* 8 bytes per iteration */
+ for (i = 0; i < 128; i++) {
+ wide_dat = get_unaligned((u64 *)tx_data);
+ debug(" tx: %016llx \t",
+ (unsigned long long)wide_dat);
+ if ((i % 4) == 3)
+ debug("\n");
+ tx_data += 8;
+ writeq(wide_dat, base + MPI_WIDE_BUF(i));
+ }
+ }
+
+ mpi_xmit = FIELD_PREP(MPI_XMIT_CSID, cs) | MPI_XMIT_LEAVECS |
+ FIELD_PREP(MPI_XMIT_TXNUM, tx_data ? 1024 : 0) |
+ FIELD_PREP(MPI_XMIT_TOTNUM, 1024);
+ writeq(mpi_xmit, base + MPI_XMIT);
+
+ octeon_spi_wait_ready(dev);
+
+ debug("\n ");
+
+ if (rx_data) {
+ /* 8 bytes per iteration */
+ for (i = 0; i < 128; i++) {
+ wide_dat = readq(base + MPI_WIDE_BUF(i));
+ debug(" rx: %016llx\t",
+ (unsigned long long)wide_dat);
+ if ((i % 4) == 3)
+ debug("\n");
+ *(u64 *)rx_data = wide_dat;
+ rx_data += 8;
+ }
+ }
+ len -= 1024;
+ }
+
+ if (tx_data) {
+ rem = len % 8;
+ /* 8 bytes per iteration */
+ for (i = 0; i < len / 8; i++) {
+ wide_dat = get_unaligned((u64 *)tx_data);
+ debug(" tx: %016llx \t",
+ (unsigned long long)wide_dat);
+ if ((i % 4) == 3)
+ debug("\n");
+ tx_data += 8;
+ writeq(wide_dat, base + MPI_WIDE_BUF(i));
+ }
+ if (rem) {
+ memcpy(&wide_dat, tx_data, rem);
+ debug(" rtx: %016llx\t", wide_dat);
+ writeq(wide_dat, base + MPI_WIDE_BUF(i));
+ }
+ }
+
+ mpi_xmit = FIELD_PREP(MPI_XMIT_CSID, cs) |
+ FIELD_PREP(MPI_XMIT_LEAVECS, !(flags & SPI_XFER_END)) |
+ FIELD_PREP(MPI_XMIT_TXNUM, tx_data ? len : 0) |
+ FIELD_PREP(MPI_XMIT_TOTNUM, len);
+ writeq(mpi_xmit, base + MPI_XMIT);
+
+ octeon_spi_wait_ready(dev);
+
+ debug("\n ");
+
+ if (rx_data) {
+ rem = len % 8;
+ /* 8 bytes per iteration */
+ for (i = 0; i < len / 8; i++) {
+ wide_dat = readq(base + MPI_WIDE_BUF(i));
+ debug(" rx: %016llx\t",
+ (unsigned long long)wide_dat);
+ if ((i % 4) == 3)
+ debug("\n");
+ *(u64 *)rx_data = wide_dat;
+ rx_data += 8;
+ }
+ if (rem) {
+ wide_dat = readq(base + MPI_WIDE_BUF(i));
+ debug(" rrx: %016llx\t",
+ (unsigned long long)wide_dat);
+ memcpy(rx_data, &wide_dat, rem);
+ rx_data += rem;
+ }
+ }
+
+ return 0;
+}
+
+static bool octeon_spi_supports_op(struct spi_slave *slave,
+ const struct spi_mem_op *op)
+{
+ /* For now, support only below combinations
+ * 1-1-1
+ * 1-1-2 1-2-2
+ * 1-1-4 1-4-4
+ */
+ if (op->cmd.buswidth != 1)
+ return false;
+ return true;
+}
+
+static int octeon_spi_exec_op(struct spi_slave *slave,
+ const struct spi_mem_op *op)
+{
+ unsigned long flags = SPI_XFER_BEGIN;
+ const void *tx;
+ void *rx;
+ u8 opcode, *buf;
+ u8 *addr;
+ int i, temp, ret;
+
+ if (op->cmd.buswidth != 1)
+ return -ENOTSUPP;
+
+ /* Send CMD */
+ i = 0;
+ opcode = op->cmd.opcode;
+
+ if (!op->data.nbytes && !op->addr.nbytes && !op->dummy.nbytes)
+ flags |= SPI_XFER_END;
+
+ ret = octeontx2_spi_xfer(slave->dev, 8, (void *)&opcode, NULL, flags);
+ if (ret < 0)
+ return ret;
+
+ /* Send Address and dummy */
+ if (op->addr.nbytes) {
+ /* Alloc buffer for address+dummy */
+ buf = (u8 *)calloc(1, op->addr.nbytes + op->dummy.nbytes);
+ if (!buf) {
+ printf("%s Out of memory\n", __func__);
+ return -ENOMEM;
+ }
+ addr = (u8 *)&op->addr.val;
+ for (temp = 0; temp < op->addr.nbytes; temp++)
+ buf[i++] = *(u8 *)(addr + op->addr.nbytes - 1 - temp);
+ for (temp = 0; temp < op->dummy.nbytes; temp++)
+ buf[i++] = 0xff;
+ if (op->addr.buswidth == 2)
+ flags |= SPI_RX_DUAL;
+ if (op->addr.buswidth == 4)
+ flags |= SPI_RX_QUAD;
+
+ if (!op->data.nbytes)
+ flags |= SPI_XFER_END;
+ ret = octeontx2_spi_xfer(slave->dev, i * 8, (void *)buf, NULL,
+ flags);
+ free(buf);
+ if (ret < 0)
+ return ret;
+ }
+ if (!op->data.nbytes)
+ return 0;
+
+ /* Send/Receive Data */
+ flags |= SPI_XFER_END;
+ if (op->data.buswidth == 2)
+ flags |= SPI_RX_DUAL;
+ if (op->data.buswidth == 4)
+ flags |= SPI_RX_QUAD;
+
+ rx = (op->data.dir == SPI_MEM_DATA_IN) ? op->data.buf.in : NULL;
+ tx = (op->data.dir == SPI_MEM_DATA_OUT) ? op->data.buf.out : NULL;
+
+ ret = octeontx2_spi_xfer(slave->dev, (op->data.nbytes * 8), tx, rx,
+ flags);
+ return ret;
+}
+
+static const struct spi_controller_mem_ops octeontx2_spi_mem_ops = {
+ .supports_op = octeon_spi_supports_op,
+ .exec_op = octeon_spi_exec_op,
+};
+
+/**
+ * Set the speed of the SPI bus
+ *
+ * @param bus bus to set
+ * @param max_hz maximum speed supported
+ */
+static int octeon_spi_set_speed(struct udevice *bus, uint max_hz)
+{
+ struct octeon_spi *priv = dev_get_priv(bus);
+ ulong clk_rate;
+ u32 calc_hz;
+
+ if (max_hz > OCTEON_SPI_MAX_CLOCK_HZ)
+ max_hz = OCTEON_SPI_MAX_CLOCK_HZ;
+
+ clk_rate = clk_get_rate(&priv->clk);
+ if (IS_ERR_VALUE(clk_rate))
+ return -EINVAL;
+
+ debug("%s(%s, %u, %lu)\n", __func__, bus->name, max_hz, clk_rate);
+
+ priv->clkdiv = clk_rate / (2 * max_hz);
+ while (1) {
+ calc_hz = clk_rate / (2 * priv->clkdiv);
+ if (calc_hz <= max_hz)
+ break;
+ priv->clkdiv += 1;
+ }
+
+ if (priv->clkdiv > 8191)
+ return -EINVAL;
+
+ debug("%s: clkdiv=%d\n", __func__, priv->clkdiv);
+
+ return 0;
+}
+
+static int octeon_spi_set_mode(struct udevice *bus, uint mode)
+{
+ /* We don't set it here */
+ return 0;
+}
+
+static struct dm_spi_ops octeon_spi_ops = {
+ .claim_bus = octeon_spi_claim_bus,
+ .release_bus = octeon_spi_release_bus,
+ .set_speed = octeon_spi_set_speed,
+ .set_mode = octeon_spi_set_mode,
+ .xfer = octeon_spi_xfer,
+};
+
+static int octeon_spi_probe(struct udevice *dev)
+{
+ struct octeon_spi *priv = dev_get_priv(dev);
+ int ret;
+
+ /* Octeon TX & TX2 use PCI based probing */
+ if (device_is_compatible(dev, "cavium,thunder-8190-spi")) {
+ pci_dev_t bdf = dm_pci_get_bdf(dev);
+
+ debug("SPI PCI device: %x\n", bdf);
+ priv->base = dm_pci_map_bar(dev, PCI_BASE_ADDRESS_0,
+ PCI_REGION_MEM);
+ /* Add base offset */
+ priv->base += 0x1000;
+
+ /*
+ * Octeon TX2 needs a different xfer function and supports
+ * mem_ops
+ */
+ if (device_is_compatible(dev, "cavium,thunderx-spi")) {
+ octeon_spi_ops.xfer = octeontx2_spi_xfer;
+ octeon_spi_ops.mem_ops = &octeontx2_spi_mem_ops;
+ }
+ } else {
+ priv->base = dev_remap_addr(dev);
+ }
+
+ ret = clk_get_by_index(dev, 0, &priv->clk);
+ if (ret < 0)
+ return ret;
+
+ ret = clk_enable(&priv->clk);
+ if (ret)
+ return ret;
+
+ debug("SPI bus %s %d at %p\n", dev->name, dev->seq, priv->base);
+
+ return 0;
+}
+
+static const struct udevice_id octeon_spi_ids[] = {
+ /* MIPS Octeon */
+ { .compatible = "cavium,octeon-3010-spi" },
+ /* ARM Octeon TX / TX2 */
+ { .compatible = "cavium,thunder-8190-spi" },
+ { }
+};
+
+U_BOOT_DRIVER(octeon_spi) = {
+ .name = "spi_octeon",
+ .id = UCLASS_SPI,
+ .of_match = octeon_spi_ids,
+ .probe = octeon_spi_probe,
+ .priv_auto_alloc_size = sizeof(struct octeon_spi),
+ .ops = &octeon_spi_ops,
+};
diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c
index d344701..c095ae9 100644
--- a/drivers/spi/spi-mem.c
+++ b/drivers/spi/spi-mem.c
@@ -13,9 +13,14 @@
#include <linux/pm_runtime.h>
#include "internals.h"
#else
-#include <dm/device_compat.h>
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <malloc.h>
+#include <spi.h>
#include <spi.h>
#include <spi-mem.h>
+#include <dm/device_compat.h>
#endif
#ifndef __UBOOT__
diff --git a/drivers/spi/spi-sifive.c b/drivers/spi/spi-sifive.c
index 0e0ce25..c7345d9 100644
--- a/drivers/spi/spi-sifive.c
+++ b/drivers/spi/spi-sifive.c
@@ -10,6 +10,7 @@
#include <dm.h>
#include <dm/device_compat.h>
#include <malloc.h>
+#include <spi.h>
#include <spi-mem.h>
#include <wait_bit.h>
#include <asm/io.h>
diff --git a/drivers/spi/stm32_qspi.c b/drivers/spi/stm32_qspi.c
index 001f070..a53b941 100644
--- a/drivers/spi/stm32_qspi.c
+++ b/drivers/spi/stm32_qspi.c
@@ -9,8 +9,10 @@
#include <common.h>
#include <clk.h>
+#include <dm.h>
#include <log.h>
#include <reset.h>
+#include <spi.h>
#include <spi-mem.h>
#include <dm/device_compat.h>
#include <linux/bitops.h>
diff --git a/drivers/sysreset/sysreset-uclass.c b/drivers/sysreset/sysreset-uclass.c
index 995240f..3f5414e 100644
--- a/drivers/sysreset/sysreset-uclass.c
+++ b/drivers/sysreset/sysreset-uclass.c
@@ -117,6 +117,7 @@
int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
{
printf("resetting ...\n");
+ mdelay(100);
sysreset_walk_halt(SYSRESET_COLD);
diff --git a/drivers/ufs/cdns-platform.c b/drivers/ufs/cdns-platform.c
index 1a7bb7b..bad1bf7 100644
--- a/drivers/ufs/cdns-platform.c
+++ b/drivers/ufs/cdns-platform.c
@@ -9,6 +9,7 @@
#include <common.h>
#include <dm.h>
#include <ufs.h>
+#include <asm/io.h>
#include <dm/device_compat.h>
#include <linux/bitops.h>
#include <linux/err.h>
diff --git a/drivers/ufs/ufs.c b/drivers/ufs/ufs.c
index 87b4e5f..92b7e9f 100644
--- a/drivers/ufs/ufs.c
+++ b/drivers/ufs/ufs.c
@@ -19,9 +19,10 @@
#include <malloc.h>
#include <hexdump.h>
#include <scsi.h>
+#include <asm/io.h>
+#include <asm/dma-mapping.h>
#include <linux/bitops.h>
#include <linux/delay.h>
-
#include <linux/dma-mapping.h>
#include "ufs.h"
diff --git a/drivers/ufs/ufs.h b/drivers/ufs/ufs.h
index e0bde93..069888f 100644
--- a/drivers/ufs/ufs.h
+++ b/drivers/ufs/ufs.h
@@ -2,11 +2,10 @@
#ifndef __UFS_H
#define __UFS_H
-#include <asm/io.h>
-#include <dm.h>
-
#include "unipro.h"
+struct udevice;
+
#define UFS_CDB_SIZE 16
#define UPIU_TRANSACTION_UIC_CMD 0x1F
#define UIC_CMD_SIZE (sizeof(u32) * 4)
diff --git a/drivers/usb/musb-new/musb_uboot.c b/drivers/usb/musb-new/musb_uboot.c
index 988071a..8ac2f0a 100644
--- a/drivers/usb/musb-new/musb_uboot.c
+++ b/drivers/usb/musb-new/musb_uboot.c
@@ -1,5 +1,6 @@
#include <common.h>
#include <console.h>
+#include <dm.h>
#include <malloc.h>
#include <watchdog.h>
#include <linux/delay.h>
@@ -452,3 +453,39 @@
return *musbp;
}
+
+#if CONFIG_IS_ENABLED(DM_USB)
+struct usb_device *usb_dev_get_parent(struct usb_device *udev)
+{
+ struct udevice *parent = udev->dev->parent;
+
+ /*
+ * When called from usb-uclass.c: usb_scan_device() udev->dev points
+ * to the parent udevice, not the actual udevice belonging to the
+ * udev as the device is not instantiated yet.
+ *
+ * If dev is an usb-bus, then we are called from usb_scan_device() for
+ * an usb-device plugged directly into the root port, return NULL.
+ */
+ if (device_get_uclass_id(udev->dev) == UCLASS_USB)
+ return NULL;
+
+ /*
+ * If these 2 are not the same we are being called from
+ * usb_scan_device() and udev itself is the parent.
+ */
+ if (dev_get_parent_priv(udev->dev) != udev)
+ return udev;
+
+ /* We are being called normally, use the parent pointer */
+ if (device_get_uclass_id(parent) == UCLASS_USB_HUB)
+ return dev_get_parent_priv(parent);
+
+ return NULL;
+}
+#else
+struct usb_device *usb_dev_get_parent(struct usb_device *udev)
+{
+ return udev->parent;
+}
+#endif
diff --git a/drivers/usb/musb-new/pic32.c b/drivers/usb/musb-new/pic32.c
index 74a841a..2fbe9be 100644
--- a/drivers/usb/musb-new/pic32.c
+++ b/drivers/usb/musb-new/pic32.c
@@ -10,6 +10,7 @@
*/
#include <common.h>
+#include <dm.h>
#include <dm/device_compat.h>
#include <linux/bitops.h>
#include <linux/delay.h>
diff --git a/drivers/usb/musb-new/usb-compat.h b/drivers/usb/musb-new/usb-compat.h
index f2c18ad..1c66c4f 100644
--- a/drivers/usb/musb-new/usb-compat.h
+++ b/drivers/usb/musb-new/usb-compat.h
@@ -1,9 +1,10 @@
#ifndef __USB_COMPAT_H__
#define __USB_COMPAT_H__
-#include <dm.h>
#include "usb.h"
+struct udevice;
+
struct usb_hcd {
void *hcd_priv;
};
@@ -67,40 +68,12 @@
return 0;
}
-#if CONFIG_IS_ENABLED(DM_USB)
-static inline struct usb_device *usb_dev_get_parent(struct usb_device *udev)
-{
- struct udevice *parent = udev->dev->parent;
-
- /*
- * When called from usb-uclass.c: usb_scan_device() udev->dev points
- * to the parent udevice, not the actual udevice belonging to the
- * udev as the device is not instantiated yet.
- *
- * If dev is an usb-bus, then we are called from usb_scan_device() for
- * an usb-device plugged directly into the root port, return NULL.
- */
- if (device_get_uclass_id(udev->dev) == UCLASS_USB)
- return NULL;
-
- /*
- * If these 2 are not the same we are being called from
- * usb_scan_device() and udev itself is the parent.
- */
- if (dev_get_parent_priv(udev->dev) != udev)
- return udev;
-
- /* We are being called normally, use the parent pointer */
- if (device_get_uclass_id(parent) == UCLASS_USB_HUB)
- return dev_get_parent_priv(parent);
-
- return NULL;
-}
-#else
-static inline struct usb_device *usb_dev_get_parent(struct usb_device *dev)
-{
- return dev->parent;
-}
-#endif
+/**
+ * usb_dev_get_parent() - Get the parent of a USB device
+ *
+ * @udev: USB struct containing information about the device
+ * @return associated device for which udev == dev_get_parent_priv(dev)
+ */
+struct usb_device *usb_dev_get_parent(struct usb_device *udev);
#endif /* __USB_COMPAT_H__ */
diff --git a/drivers/video/imx/mxc_ipuv3_fb.c b/drivers/video/imx/mxc_ipuv3_fb.c
index 587d62f..eb93a4f 100644
--- a/drivers/video/imx/mxc_ipuv3_fb.c
+++ b/drivers/video/imx/mxc_ipuv3_fb.c
@@ -66,6 +66,7 @@
* Structure containing the MXC specific framebuffer information.
*/
struct mxcfb_info {
+ struct udevice *udev;
int blank;
ipu_channel_t ipu_ch;
int ipu_di;
@@ -381,13 +382,16 @@
static int mxcfb_map_video_memory(struct fb_info *fbi)
{
+ struct mxcfb_info *mxc_fbi = (struct mxcfb_info *)fbi->par;
+ struct video_uc_platdata *plat = dev_get_uclass_platdata(mxc_fbi->udev);
+
if (fbi->fix.smem_len < fbi->var.yres_virtual * fbi->fix.line_length) {
fbi->fix.smem_len = fbi->var.yres_virtual *
fbi->fix.line_length;
}
fbi->fix.smem_len = roundup(fbi->fix.smem_len, ARCH_DMA_MINALIGN);
- fbi->screen_base = (char *)gd->video_bottom;
+ fbi->screen_base = (char *)plat->base;
fbi->fix.smem_start = (unsigned long)fbi->screen_base;
if (fbi->screen_base == 0) {
@@ -477,8 +481,8 @@
*
* @return Appropriate error code to the kernel common code
*/
-static int mxcfb_probe(u32 interface_pix_fmt, uint8_t disp,
- struct fb_videomode const *mode)
+static int mxcfb_probe(struct udevice *dev, u32 interface_pix_fmt,
+ uint8_t disp, struct fb_videomode const *mode)
{
struct fb_info *fbi;
struct mxcfb_info *mxcfbi;
@@ -501,6 +505,7 @@
}
mxcfbi->ipu_di = disp;
+ mxcfbi->udev = dev;
if (!ipu_clk_enabled())
clk_enable(g_ipu_clk);
@@ -600,7 +605,7 @@
if (ret < 0)
return ret;
- ret = mxcfb_probe(gpixfmt, gdisp, gmode);
+ ret = mxcfb_probe(dev, gpixfmt, gdisp, gmode);
if (ret < 0)
return ret;
@@ -660,8 +665,8 @@
{ }
};
-U_BOOT_DRIVER(ipuv3_video) = {
- .name = "ipuv3_video",
+U_BOOT_DRIVER(fsl_imx6q_ipu) = {
+ .name = "fsl_imx6q_ipu",
.id = UCLASS_VIDEO,
.of_match = ipuv3_video_ids,
.bind = ipuv3_video_bind,
diff --git a/fs/fat/fat.c b/fs/fat/fat.c
index 9578b74..28aa5aa 100644
--- a/fs/fat/fat.c
+++ b/fs/fat/fat.c
@@ -278,7 +278,10 @@
}
} else {
idx = size / mydata->sect_size;
- ret = disk_read(startsect, idx, buffer);
+ if (idx == 0)
+ ret = 0;
+ else
+ ret = disk_read(startsect, idx, buffer);
if (ret != idx) {
debug("Error reading data (got %d)\n", ret);
return -1;
diff --git a/include/configs/imx8mn_evk.h b/include/configs/imx8mn_evk.h
index 6e8a1db..21eb134 100644
--- a/include/configs/imx8mn_evk.h
+++ b/include/configs/imx8mn_evk.h
@@ -10,6 +10,8 @@
#include <linux/stringify.h>
#include <asm/arch/imx-regs.h>
+#define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M)
+
#define CONFIG_SPL_MAX_SIZE (148 * 1024)
#define CONFIG_SYS_MONITOR_LEN SZ_512K
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
diff --git a/include/configs/imx8mp_evk.h b/include/configs/imx8mp_evk.h
index 82bd61f..009bcdc 100644
--- a/include/configs/imx8mp_evk.h
+++ b/include/configs/imx8mp_evk.h
@@ -10,6 +10,8 @@
#include <linux/stringify.h>
#include <asm/arch/imx-regs.h>
+#define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M)
+
#define CONFIG_SPL_MAX_SIZE (152 * 1024)
#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h
index bb5dbe3..1a50559 100644
--- a/include/configs/imx8mq_evk.h
+++ b/include/configs/imx8mq_evk.h
@@ -10,6 +10,8 @@
#include <linux/stringify.h>
#include <asm/arch/imx-regs.h>
+#define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M)
+
#define CONFIG_SPL_MAX_SIZE (124 * 1024)
#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
diff --git a/include/configs/mys_6ulx.h b/include/configs/mys_6ulx.h
new file mode 100644
index 0000000..2087799
--- /dev/null
+++ b/include/configs/mys_6ulx.h
@@ -0,0 +1,76 @@
+/* SPDX-License-Identifier: GPL-2.0+
+ *
+ * Copyright (C) 2020 Linumiz
+ * Author: Parthiban Nallathambi <parthiban@linumiz.com>
+ */
+
+#ifndef __MYS_6ULX_H
+#define __MYS_6ULX_H
+
+#include <linux/sizes.h>
+#include "mx6_common.h"
+
+/* SPL options */
+#include "imx6_spl.h"
+
+#define CONFIG_SYS_FSL_USDHC_NUM 1
+
+/* Size of malloc() pool */
+#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)
+
+/* Console configs */
+#define CONFIG_MXC_UART_BASE UART1_BASE
+
+/* MMC Configs */
+#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
+
+#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
+#define CONFIG_SYS_HZ 1000
+
+/* Physical Memory Map */
+#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
+#define PHYS_SDRAM_SIZE SZ_256M
+
+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
+#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
+#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
+
+#define CONFIG_SYS_INIT_SP_OFFSET \
+ (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR \
+ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
+
+/* NAND */
+#define CONFIG_SYS_MAX_NAND_DEVICE 1
+#define CONFIG_SYS_NAND_BASE 0x40000000
+
+/* USB Configs */
+#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
+#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
+#define CONFIG_MXC_USB_FLAGS 0
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
+
+#define CONFIG_IMX_THERMAL
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "console=ttymxc0,115200n8\0" \
+ "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
+ "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
+ "fdt_addr_r=0x82000000\0" \
+ "fdt_high=0xffffffff\0" \
+ "initrd_high=0xffffffff\0" \
+ "kernel_addr_r=0x81000000\0" \
+ "pxefile_addr_r=0x87100000\0" \
+ "ramdisk_addr_r=0x82100000\0" \
+ "scriptaddr=0x87000000\0" \
+ BOOTENV
+
+#define BOOT_TARGET_DEVICES(func) \
+ func(MMC, mmc, 0) \
+ func(UBIFS, ubifs, 0) \
+ func(PXE, pxe, na) \
+ func(DHCP, dhcp, na)
+
+#include <config_distro_bootcmd.h>
+
+#endif /* __MYS_6ULX_H */
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index 5b0bec0..5d7544b 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -425,7 +425,6 @@
#ifdef CONFIG_USB_KEYBOARD
#define CONSOLE_STDIN_SETTINGS \
- "preboot=usb start\0" \
"stdin=serial,usbkbd\0"
#else
#define CONSOLE_STDIN_SETTINGS \
diff --git a/include/dm-demo.h b/include/dm-demo.h
index c9a82c7..7b6d0d8 100644
--- a/include/dm-demo.h
+++ b/include/dm-demo.h
@@ -6,8 +6,6 @@
#ifndef __DM_DEMO_H
#define __DM_DEMO_H
-#include <dm.h>
-
/**
* struct dm_demo_pdata - configuration data for demo instance
*
diff --git a/include/dm.h b/include/dm.h
index 2e1afda..a1b8416 100644
--- a/include/dm.h
+++ b/include/dm.h
@@ -3,6 +3,10 @@
* Copyright (c) 2013 Google, Inc
*/
+#ifdef _DM_H_
+#warning "Suspect dm.h is included from a header file - please fix"
+#endif
+
#ifndef _DM_H_
#define _DM_H_
diff --git a/include/dm/read.h b/include/dm/read.h
index b1a6108..487ec9e 100644
--- a/include/dm/read.h
+++ b/include/dm/read.h
@@ -11,6 +11,7 @@
#include <linux/errno.h>
+#include <dm/device.h>
#include <dm/fdtaddr.h>
#include <dm/ofnode.h>
#include <dm/uclass.h>
diff --git a/include/dm/test.h b/include/dm/test.h
index d39686c..2c92d41 100644
--- a/include/dm/test.h
+++ b/include/dm/test.h
@@ -6,9 +6,6 @@
#ifndef __DM_TEST_H
#define __DM_TEST_H
-#include <dm.h>
-#include <test/test.h>
-
/**
* struct dm_test_cdata - configuration data for test instance
*
diff --git a/include/dt-bindings/clock/octeon-clock.h b/include/dt-bindings/clock/octeon-clock.h
new file mode 100644
index 0000000..34e6a3b
--- /dev/null
+++ b/include/dt-bindings/clock/octeon-clock.h
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2020 Stefan Roese <sr@denx.de>
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_OCTEON_CLOCK_H
+#define __DT_BINDINGS_CLOCK_OCTEON_CLOCK_H
+
+#define OCTEON_CLK_CORE 0
+#define OCTEON_CLK_IO 1
+
+#endif /* __DT_BINDINGS_CLOCK_OCTEON_CLOCK_H */
diff --git a/include/dt-bindings/phy/phy.h b/include/dt-bindings/phy/phy.h
index 6c90193..7e657da 100644
--- a/include/dt-bindings/phy/phy.h
+++ b/include/dt-bindings/phy/phy.h
@@ -15,5 +15,9 @@
#define PHY_TYPE_PCIE 2
#define PHY_TYPE_USB2 3
#define PHY_TYPE_USB3 4
+#define PHY_TYPE_UFS 5
+#define PHY_TYPE_DP 6
+#define PHY_TYPE_XPCS 7
+#define PHY_TYPE_SGMII 8
#endif /* _DT_BINDINGS_PHY */
diff --git a/include/dt-bindings/reset/sifive-fu540-prci.h b/include/dt-bindings/reset/sifive-fu540-prci.h
new file mode 100644
index 0000000..89aa5b6
--- /dev/null
+++ b/include/dt-bindings/reset/sifive-fu540-prci.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2020 Sifive, Inc.
+ * Author: Sagar Kadam <sagar.kadam@sifive.com>
+ */
+
+#ifndef __DT_BINDINGS_RESET_SIFIVE_FU540_PRCI_H
+#define __DT_BINDINGS_RESET_SIFIVE_FU540_PRCI_H
+
+/* Reset indexes for use by device tree data and the PRCI driver */
+#define PRCI_RST_DDR_CTRL_N 0
+#define PRCI_RST_DDR_AXI_N 1
+#define PRCI_RST_DDR_AHB_N 2
+#define PRCI_RST_DDR_PHY_N 3
+/* bit 4 is reserved bit */
+#define PRCI_RST_RSVD_N 4
+#define PRCI_RST_GEMGXL_N 5
+
+#endif
diff --git a/include/efi_driver.h b/include/efi_driver.h
index 840483a..2b62219 100644
--- a/include/efi_driver.h
+++ b/include/efi_driver.h
@@ -8,8 +8,6 @@
#ifndef _EFI_DRIVER_H
#define _EFI_DRIVER_H 1
-#include <common.h>
-#include <dm.h>
#include <efi_loader.h>
/*
diff --git a/include/efi_variable.h b/include/efi_variable.h
index 2c629e4..60491cb 100644
--- a/include/efi_variable.h
+++ b/include/efi_variable.h
@@ -143,6 +143,22 @@
efi_status_t efi_var_to_file(void);
/**
+ * efi_var_collect() - collect variables in buffer
+ *
+ * A buffer is allocated and filled with variables in a format ready to be
+ * written to disk.
+ *
+ * @bufp: pointer to pointer of buffer with collected variables
+ * @lenp: pointer to length of buffer
+ * @check_attr_mask: bitmask with required attributes of variables to be collected.
+ * variables are only collected if all of the required
+ * attributes are set.
+ * Return: status code
+ */
+efi_status_t __maybe_unused efi_var_collect(struct efi_var_file **bufp, loff_t *lenp,
+ u32 check_attr_mask);
+
+/**
* efi_var_restore() - restore EFI variables from buffer
*
* @buf: buffer
@@ -233,4 +249,62 @@
*/
enum efi_auth_var_type efi_auth_var_get_type(u16 *name, const efi_guid_t *guid);
+/**
+ * efi_get_next_variable_name_mem() - Runtime common code across efi variable
+ * implementations for GetNextVariable()
+ * from the cached memory copy
+ * @variable_name_size: size of variable_name buffer in byte
+ * @variable_name: name of uefi variable's name in u16
+ * @vendor: vendor's guid
+ *
+ * Return: status code
+ */
+efi_status_t __efi_runtime
+efi_get_next_variable_name_mem(efi_uintn_t *variable_name_size, u16 *variable_name,
+ efi_guid_t *vendor);
+/**
+ * efi_get_variable_mem() - Runtime common code across efi variable
+ * implementations for GetVariable() from
+ * the cached memory copy
+ *
+ * @variable_name: name of the variable
+ * @vendor: vendor GUID
+ * @attributes: attributes of the variable
+ * @data_size: size of the buffer to which the variable value is copied
+ * @data: buffer to which the variable value is copied
+ * @timep: authentication time (seconds since start of epoch)
+ * Return: status code
+
+ */
+efi_status_t __efi_runtime
+efi_get_variable_mem(u16 *variable_name, const efi_guid_t *vendor, u32 *attributes,
+ efi_uintn_t *data_size, void *data, u64 *timep);
+
+/**
+ * efi_get_variable_runtime() - runtime implementation of GetVariable()
+ *
+ * @variable_name: name of the variable
+ * @guid: vendor GUID
+ * @attributes: attributes of the variable
+ * @data_size: size of the buffer to which the variable value is copied
+ * @data: buffer to which the variable value is copied
+ * Return: status code
+ */
+efi_status_t __efi_runtime EFIAPI
+efi_get_variable_runtime(u16 *variable_name, const efi_guid_t *guid,
+ u32 *attributes, efi_uintn_t *data_size, void *data);
+
+/**
+ * efi_get_next_variable_name_runtime() - runtime implementation of
+ * GetNextVariable()
+ *
+ * @variable_name_size: size of variable_name buffer in byte
+ * @variable_name: name of uefi variable's name in u16
+ * @guid: vendor's guid
+ * Return: status code
+ */
+efi_status_t __efi_runtime EFIAPI
+efi_get_next_variable_name_runtime(efi_uintn_t *variable_name_size,
+ u16 *variable_name, efi_guid_t *guid);
+
#endif
diff --git a/include/eth_phy.h b/include/eth_phy.h
index 19c4965..be6c881 100644
--- a/include/eth_phy.h
+++ b/include/eth_phy.h
@@ -6,9 +6,10 @@
#ifndef _eth_phy_h_
#define _eth_phy_h_
-#include <dm.h>
#include <phy.h>
+struct udevice;
+
int eth_phy_binds_nodes(struct udevice *eth_dev);
int eth_phy_set_mdio_bus(struct udevice *eth_dev, struct mii_dev *mdio_bus);
struct mii_dev *eth_phy_get_mdio_bus(struct udevice *eth_dev);
diff --git a/include/fs_loader.h b/include/fs_loader.h
index b728c06..1b3c580 100644
--- a/include/fs_loader.h
+++ b/include/fs_loader.h
@@ -6,7 +6,7 @@
#ifndef _FS_LOADER_H_
#define _FS_LOADER_H_
-#include <dm.h>
+struct udevice;
/**
* struct phandle_part - A place for storing phandle of node and its partition
diff --git a/include/kendryte/bypass.h b/include/kendryte/bypass.h
index a081cbd..ab85bbc 100644
--- a/include/kendryte/bypass.h
+++ b/include/kendryte/bypass.h
@@ -5,7 +5,7 @@
#ifndef K210_BYPASS_H
#define K210_BYPASS_H
-#include <clk.h>
+struct clk;
struct k210_bypass {
struct clk clk;
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index 8a20743..79dce8f 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -9,12 +9,13 @@
#ifndef __LINUX_CLK_PROVIDER_H
#define __LINUX_CLK_PROVIDER_H
-#include <dm.h>
#include <linux/bitops.h>
#include <linux/err.h>
#include <clk-uclass.h>
#include <linux/err.h>
+struct udevice;
+
static inline void clk_dm(ulong id, struct clk *clk)
{
if (!IS_ERR(clk))
@@ -188,8 +189,5 @@
const char *clk_hw_get_name(const struct clk *hw);
ulong clk_generic_get_rate(struct clk *clk);
-static inline struct clk *dev_get_clk_ptr(struct udevice *dev)
-{
- return (struct clk *)dev_get_uclass_priv(dev);
-}
+struct clk *dev_get_clk_ptr(struct udevice *dev);
#endif /* __LINUX_CLK_PROVIDER_H */
diff --git a/include/lmb.h b/include/lmb.h
index 73b7a5c..e9f19b16 100644
--- a/include/lmb.h
+++ b/include/lmb.h
@@ -49,6 +49,7 @@
extern long lmb_free(struct lmb *lmb, phys_addr_t base, phys_size_t size);
extern void lmb_dump_all(struct lmb *lmb);
+extern void lmb_dump_all_force(struct lmb *lmb);
static inline phys_size_t
lmb_size_bytes(struct lmb_region *type, unsigned long region_nr)
diff --git a/include/phy.h b/include/phy.h
index fedd146..1dbbf65 100644
--- a/include/phy.h
+++ b/include/phy.h
@@ -9,14 +9,17 @@
#ifndef _PHY_H
#define _PHY_H
-#include <dm.h>
+#include <log.h>
+#include <phy_interface.h>
+#include <dm/ofnode.h>
+#include <dm/read.h>
#include <linux/errno.h>
#include <linux/list.h>
#include <linux/mii.h>
#include <linux/ethtool.h>
#include <linux/mdio.h>
-#include <log.h>
-#include <phy_interface.h>
+
+struct udevice;
#define PHY_FIXED_ID 0xa5a55a5a
#define PHY_NCSI_ID 0xbeefcafe
diff --git a/include/phy_interface.h b/include/phy_interface.h
index 882e4af..841ade3 100644
--- a/include/phy_interface.h
+++ b/include/phy_interface.h
@@ -10,6 +10,8 @@
#ifndef _PHY_INTERFACE_H
#define _PHY_INTERFACE_H
+#include <string.h>
+
typedef enum {
PHY_INTERFACE_MODE_MII,
PHY_INTERFACE_MODE_GMII,
diff --git a/include/spi-mem.h b/include/spi-mem.h
index 893f7bd..ca0f55c 100644
--- a/include/spi-mem.h
+++ b/include/spi-mem.h
@@ -11,10 +11,7 @@
#ifndef __UBOOT_SPI_MEM_H
#define __UBOOT_SPI_MEM_H
-#include <common.h>
-#include <dm.h>
-#include <errno.h>
-#include <spi.h>
+struct udevice;
#define SPI_MEM_OP_CMD(__opcode, __buswidth) \
{ \
diff --git a/include/spi.h b/include/spi.h
index 98ba9e7..ef8c1f6 100644
--- a/include/spi.h
+++ b/include/spi.h
@@ -146,8 +146,6 @@
#define SPI_XFER_BEGIN BIT(0) /* Assert CS before transfer */
#define SPI_XFER_END BIT(1) /* Deassert CS after transfer */
#define SPI_XFER_ONCE (SPI_XFER_BEGIN | SPI_XFER_END)
-#define SPI_XFER_MMAP BIT(2) /* Memory Mapped start */
-#define SPI_XFER_MMAP_END BIT(3) /* Memory Mapped End */
};
/**
diff --git a/include/spi_flash.h b/include/spi_flash.h
index b336619..85cae32 100644
--- a/include/spi_flash.h
+++ b/include/spi_flash.h
@@ -9,10 +9,11 @@
#ifndef _SPI_FLASH_H_
#define _SPI_FLASH_H_
-#include <dm.h> /* Because we dereference struct udevice here */
#include <linux/types.h>
#include <linux/mtd/spi-nor.h>
+struct udevice;
+
/* by default ENV use the same parameters than SF command */
#ifndef CONFIG_ENV_SPI_BUS
# define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
diff --git a/include/test/ut.h b/include/test/ut.h
index 99bbb12..6ab2f88 100644
--- a/include/test/ut.h
+++ b/include/test/ut.h
@@ -11,6 +11,7 @@
#include <command.h>
#include <hexdump.h>
#include <linux/err.h>
+#include <test/test.h>
struct unit_test_state;
diff --git a/include/thermal.h b/include/thermal.h
index 11d7525..52a3317 100644
--- a/include/thermal.h
+++ b/include/thermal.h
@@ -7,7 +7,7 @@
#ifndef _THERMAL_H_
#define _THERMAL_H_
-#include <dm.h>
+struct udevice;
int thermal_get_temp(struct udevice *dev, int *temp);
diff --git a/include/w1.h b/include/w1.h
index b958b1c..77f439e 100644
--- a/include/w1.h
+++ b/include/w1.h
@@ -8,7 +8,7 @@
#ifndef __W1_H
#define __W1_H
-#include <dm.h>
+struct udevice;
#define W1_FAMILY_DS24B33 0x23
#define W1_FAMILY_DS2431 0x2d
diff --git a/include/wdt.h b/include/wdt.h
index d2ccfbc..bc242c2 100644
--- a/include/wdt.h
+++ b/include/wdt.h
@@ -6,9 +6,7 @@
#ifndef _WDT_H_
#define _WDT_H_
-#include <dm.h>
-#include <log.h>
-#include <dm/read.h>
+struct udevice;
/*
* Implement a simple watchdog uclass. Watchdog is basically a timer that
diff --git a/lib/efi_driver/efi_block_device.c b/lib/efi_driver/efi_block_device.c
index e7d8745..0e72a68 100644
--- a/lib/efi_driver/efi_block_device.c
+++ b/lib/efi_driver/efi_block_device.c
@@ -30,6 +30,7 @@
#include <common.h>
#include <blk.h>
+#include <dm.h>
#include <efi_driver.h>
#include <malloc.h>
#include <dm/device-internal.h>
diff --git a/lib/efi_driver/efi_uclass.c b/lib/efi_driver/efi_uclass.c
index 04e4e45..0cf74b0 100644
--- a/lib/efi_driver/efi_uclass.c
+++ b/lib/efi_driver/efi_uclass.c
@@ -17,6 +17,8 @@
* controllers.
*/
+#include <common.h>
+#include <dm.h>
#include <efi_driver.h>
#include <log.h>
#include <malloc.h>
diff --git a/lib/efi_loader/Makefile b/lib/efi_loader/Makefile
index 441ac94..9bad1d1 100644
--- a/lib/efi_loader/Makefile
+++ b/lib/efi_loader/Makefile
@@ -37,11 +37,11 @@
obj-$(CONFIG_EFI_UNICODE_COLLATION_PROTOCOL2) += efi_unicode_collation.o
obj-y += efi_var_common.o
obj-y += efi_var_mem.o
+obj-y += efi_var_file.o
ifeq ($(CONFIG_EFI_MM_COMM_TEE),y)
obj-y += efi_variable_tee.o
else
obj-y += efi_variable.o
-obj-y += efi_var_file.o
obj-$(CONFIG_EFI_VARIABLES_PRESEED) += efi_var_seed.o
endif
obj-y += efi_watchdog.o
diff --git a/lib/efi_loader/efi_memory.c b/lib/efi_loader/efi_memory.c
index 44b8a2e..7be756e 100644
--- a/lib/efi_loader/efi_memory.c
+++ b/lib/efi_loader/efi_memory.c
@@ -762,7 +762,7 @@
unsigned long runtime_start, runtime_end, runtime_pages;
unsigned long runtime_mask = EFI_PAGE_MASK;
unsigned long uboot_start, uboot_pages;
- unsigned long uboot_stack_size = 16 * 1024 * 1024;
+ unsigned long uboot_stack_size = CONFIG_STACK_SIZE;
/* Add U-Boot */
uboot_start = ((uintptr_t)map_sysmem(gd->start_addr_sp, 0) -
diff --git a/lib/efi_loader/efi_var_common.c b/lib/efi_loader/efi_var_common.c
index ee2e67b..453cbce5 100644
--- a/lib/efi_loader/efi_var_common.c
+++ b/lib/efi_loader/efi_var_common.c
@@ -166,6 +166,28 @@
return EFI_EXIT(ret);
}
+efi_status_t __efi_runtime EFIAPI
+efi_get_variable_runtime(u16 *variable_name, const efi_guid_t *guid,
+ u32 *attributes, efi_uintn_t *data_size, void *data)
+{
+ efi_status_t ret;
+
+ ret = efi_get_variable_mem(variable_name, guid, attributes, data_size, data, NULL);
+
+ /* Remove EFI_VARIABLE_READ_ONLY flag */
+ if (attributes)
+ *attributes &= EFI_VARIABLE_MASK;
+
+ return ret;
+}
+
+efi_status_t __efi_runtime EFIAPI
+efi_get_next_variable_name_runtime(efi_uintn_t *variable_name_size,
+ u16 *variable_name, efi_guid_t *guid)
+{
+ return efi_get_next_variable_name_mem(variable_name_size, variable_name, guid);
+}
+
/**
* efi_set_secure_state - modify secure boot state variables
* @secure_boot: value of SecureBoot
diff --git a/lib/efi_loader/efi_var_file.c b/lib/efi_loader/efi_var_file.c
index 6f9d76f..b171d2d 100644
--- a/lib/efi_loader/efi_var_file.c
+++ b/lib/efi_loader/efi_var_file.c
@@ -46,18 +46,8 @@
return EFI_SUCCESS;
}
-/**
- * efi_var_collect() - collect non-volatile variables in buffer
- *
- * A buffer is allocated and filled with all non-volatile variables in a
- * format ready to be written to disk.
- *
- * @bufp: pointer to pointer of buffer with collected variables
- * @lenp: pointer to length of buffer
- * Return: status code
- */
-static efi_status_t __maybe_unused efi_var_collect(struct efi_var_file **bufp,
- loff_t *lenp)
+efi_status_t __maybe_unused efi_var_collect(struct efi_var_file **bufp, loff_t *lenp,
+ u32 check_attr_mask)
{
size_t len = EFI_VAR_BUF_SIZE;
struct efi_var_file *buf;
@@ -102,11 +92,10 @@
free(buf);
return ret;
}
- if (!(var->attr & EFI_VARIABLE_NON_VOLATILE))
- continue;
- var->length = data_length;
- var = (struct efi_var_entry *)
- ALIGN((uintptr_t)data + data_length, 8);
+ if ((var->attr & check_attr_mask) == check_attr_mask) {
+ var->length = data_length;
+ var = (struct efi_var_entry *)ALIGN((uintptr_t)data + data_length, 8);
+ }
}
buf->reserved = 0;
@@ -137,7 +126,7 @@
loff_t actlen;
int r;
- ret = efi_var_collect(&buf, &len);
+ ret = efi_var_collect(&buf, &len, EFI_VARIABLE_NON_VOLATILE);
if (ret != EFI_SUCCESS)
goto error;
diff --git a/lib/efi_loader/efi_var_mem.c b/lib/efi_loader/efi_var_mem.c
index bfa8a56..8f4a5a5 100644
--- a/lib/efi_loader/efi_var_mem.c
+++ b/lib/efi_loader/efi_var_mem.c
@@ -10,7 +10,7 @@
#include <efi_variable.h>
#include <u-boot/crc.h>
-static struct efi_var_file __efi_runtime_data *efi_var_buf;
+struct efi_var_file __efi_runtime_data *efi_var_buf;
static struct efi_var_entry __efi_runtime_data *efi_current_var;
/**
@@ -266,3 +266,71 @@
return ret;
return ret;
}
+
+efi_status_t __efi_runtime
+efi_get_variable_mem(u16 *variable_name, const efi_guid_t *vendor, u32 *attributes,
+ efi_uintn_t *data_size, void *data, u64 *timep)
+{
+ efi_uintn_t old_size;
+ struct efi_var_entry *var;
+ u16 *pdata;
+
+ if (!variable_name || !vendor || !data_size)
+ return EFI_INVALID_PARAMETER;
+ var = efi_var_mem_find(vendor, variable_name, NULL);
+ if (!var)
+ return EFI_NOT_FOUND;
+
+ if (attributes)
+ *attributes = var->attr;
+ if (timep)
+ *timep = var->time;
+
+ old_size = *data_size;
+ *data_size = var->length;
+ if (old_size < var->length)
+ return EFI_BUFFER_TOO_SMALL;
+
+ if (!data)
+ return EFI_INVALID_PARAMETER;
+
+ for (pdata = var->name; *pdata; ++pdata)
+ ;
+ ++pdata;
+
+ efi_memcpy_runtime(data, pdata, var->length);
+
+ return EFI_SUCCESS;
+}
+
+efi_status_t __efi_runtime
+efi_get_next_variable_name_mem(efi_uintn_t *variable_name_size, u16 *variable_name,
+ efi_guid_t *vendor)
+{
+ struct efi_var_entry *var;
+ efi_uintn_t old_size;
+ u16 *pdata;
+
+ if (!variable_name_size || !variable_name || !vendor)
+ return EFI_INVALID_PARAMETER;
+
+ efi_var_mem_find(vendor, variable_name, &var);
+
+ if (!var)
+ return EFI_NOT_FOUND;
+
+ for (pdata = var->name; *pdata; ++pdata)
+ ;
+ ++pdata;
+
+ old_size = *variable_name_size;
+ *variable_name_size = (uintptr_t)pdata - (uintptr_t)var->name;
+
+ if (old_size < *variable_name_size)
+ return EFI_BUFFER_TOO_SMALL;
+
+ efi_memcpy_runtime(variable_name, var->name, *variable_name_size);
+ efi_memcpy_runtime(vendor, &var->guid, sizeof(efi_guid_t));
+
+ return EFI_SUCCESS;
+}
diff --git a/lib/efi_loader/efi_variable.c b/lib/efi_loader/efi_variable.c
index 39a8482..e509d6d 100644
--- a/lib/efi_loader/efi_variable.c
+++ b/lib/efi_loader/efi_variable.c
@@ -282,68 +282,14 @@
u32 *attributes, efi_uintn_t *data_size, void *data,
u64 *timep)
{
- efi_uintn_t old_size;
- struct efi_var_entry *var;
- u16 *pdata;
-
- if (!variable_name || !vendor || !data_size)
- return EFI_INVALID_PARAMETER;
- var = efi_var_mem_find(vendor, variable_name, NULL);
- if (!var)
- return EFI_NOT_FOUND;
-
- if (attributes)
- *attributes = var->attr;
- if (timep)
- *timep = var->time;
-
- old_size = *data_size;
- *data_size = var->length;
- if (old_size < var->length)
- return EFI_BUFFER_TOO_SMALL;
-
- if (!data)
- return EFI_INVALID_PARAMETER;
-
- for (pdata = var->name; *pdata; ++pdata)
- ;
- ++pdata;
-
- efi_memcpy_runtime(data, pdata, var->length);
-
- return EFI_SUCCESS;
+ return efi_get_variable_mem(variable_name, vendor, attributes, data_size, data, timep);
}
efi_status_t __efi_runtime
efi_get_next_variable_name_int(efi_uintn_t *variable_name_size,
u16 *variable_name, efi_guid_t *vendor)
{
- struct efi_var_entry *var;
- efi_uintn_t old_size;
- u16 *pdata;
-
- if (!variable_name_size || !variable_name || !vendor)
- return EFI_INVALID_PARAMETER;
-
- efi_var_mem_find(vendor, variable_name, &var);
-
- if (!var)
- return EFI_NOT_FOUND;
-
- for (pdata = var->name; *pdata; ++pdata)
- ;
- ++pdata;
-
- old_size = *variable_name_size;
- *variable_name_size = (uintptr_t)pdata - (uintptr_t)var->name;
-
- if (old_size < *variable_name_size)
- return EFI_BUFFER_TOO_SMALL;
-
- efi_memcpy_runtime(variable_name, var->name, *variable_name_size);
- efi_memcpy_runtime(vendor, &var->guid, sizeof(efi_guid_t));
-
- return EFI_SUCCESS;
+ return efi_get_next_variable_name_mem(variable_name_size, variable_name, vendor);
}
efi_status_t efi_set_variable_int(u16 *variable_name, const efi_guid_t *vendor,
@@ -505,49 +451,6 @@
}
/**
- * efi_get_variable_runtime() - runtime implementation of GetVariable()
- *
- * @variable_name: name of the variable
- * @vendor: vendor GUID
- * @attributes: attributes of the variable
- * @data_size: size of the buffer to which the variable value is copied
- * @data: buffer to which the variable value is copied
- * Return: status code
- */
-static efi_status_t __efi_runtime EFIAPI
-efi_get_variable_runtime(u16 *variable_name, const efi_guid_t *vendor,
- u32 *attributes, efi_uintn_t *data_size, void *data)
-{
- efi_status_t ret;
-
- ret = efi_get_variable_int(variable_name, vendor, attributes,
- data_size, data, NULL);
-
- /* Remove EFI_VARIABLE_READ_ONLY flag */
- if (attributes)
- *attributes &= EFI_VARIABLE_MASK;
-
- return ret;
-}
-
-/**
- * efi_get_next_variable_name_runtime() - runtime implementation of
- * GetNextVariable()
- *
- * @variable_name_size: size of variable_name buffer in byte
- * @variable_name: name of uefi variable's name in u16
- * @vendor: vendor's guid
- * Return: status code
- */
-static efi_status_t __efi_runtime EFIAPI
-efi_get_next_variable_name_runtime(efi_uintn_t *variable_name_size,
- u16 *variable_name, efi_guid_t *vendor)
-{
- return efi_get_next_variable_name_int(variable_name_size, variable_name,
- vendor);
-}
-
-/**
* efi_set_variable_runtime() - runtime implementation of SetVariable()
*
* @variable_name: name of the variable
diff --git a/lib/efi_loader/efi_variable_tee.c b/lib/efi_loader/efi_variable_tee.c
index 94c4de8..be6f3df 100644
--- a/lib/efi_loader/efi_variable_tee.c
+++ b/lib/efi_loader/efi_variable_tee.c
@@ -15,6 +15,8 @@
#include <malloc.h>
#include <mm_communication.h>
+#define OPTEE_PAGE_SIZE BIT(12)
+extern struct efi_var_file __efi_runtime_data *efi_var_buf;
static efi_uintn_t max_buffer_size; /* comm + var + func + data */
static efi_uintn_t max_payload_size; /* func + data */
@@ -237,8 +239,32 @@
if (ret != EFI_SUCCESS)
goto out;
+ /* Make sure the buffer is big enough for storing variables */
+ if (var_payload->size < MM_VARIABLE_ACCESS_HEADER_SIZE + 0x20) {
+ ret = EFI_DEVICE_ERROR;
+ goto out;
+ }
*size = var_payload->size;
-
+ /*
+ * Although the max payload is configurable on StMM, we only share a
+ * single page from OP-TEE for the non-secure buffer used to communicate
+ * with StMM. Since OP-TEE will reject to map anything bigger than that,
+ * make sure we are in bounds.
+ */
+ if (*size > OPTEE_PAGE_SIZE)
+ *size = OPTEE_PAGE_SIZE - MM_COMMUNICATE_HEADER_SIZE -
+ MM_VARIABLE_COMMUNICATE_SIZE;
+ /*
+ * There seems to be a bug in EDK2 miscalculating the boundaries and
+ * size checks, so deduct 2 more bytes to fulfill this requirement. Fix
+ * it up here to ensure backwards compatibility with older versions
+ * (cf. StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/EventHandle.c.
+ * sizeof (EFI_MM_COMMUNICATE_HEADER) instead the size minus the
+ * flexible array member).
+ *
+ * size is guaranteed to be > 2 due to checks on the beginning.
+ */
+ *size -= 2;
out:
free(comm_buf);
return ret;
@@ -410,7 +436,6 @@
efi_uintn_t payload_size;
efi_uintn_t out_name_size;
efi_uintn_t in_name_size;
- efi_uintn_t tmp_dsize;
u8 *comm_buf = NULL;
efi_status_t ret;
@@ -433,13 +458,8 @@
}
/* Trim output buffer size */
- tmp_dsize = *variable_name_size;
- if (in_name_size + tmp_dsize >
- max_payload_size - MM_VARIABLE_GET_NEXT_HEADER_SIZE) {
- tmp_dsize = max_payload_size -
- MM_VARIABLE_GET_NEXT_HEADER_SIZE -
- in_name_size;
- }
+ if (out_name_size > max_payload_size - MM_VARIABLE_GET_NEXT_HEADER_SIZE)
+ out_name_size = max_payload_size - MM_VARIABLE_GET_NEXT_HEADER_SIZE;
payload_size = MM_VARIABLE_GET_NEXT_HEADER_SIZE + out_name_size;
comm_buf = setup_mm_hdr((void **)&var_getnext, payload_size,
@@ -465,8 +485,7 @@
goto out;
guidcpy(guid, &var_getnext->guid);
- memcpy(variable_name, (u8 *)var_getnext->name,
- var_getnext->name_size);
+ memcpy(variable_name, var_getnext->name, var_getnext->name_size);
out:
free(comm_buf);
@@ -600,39 +619,6 @@
}
/**
- * efi_get_variable_runtime() - runtime implementation of GetVariable()
- *
- * @variable_name: name of the variable
- * @guid: vendor GUID
- * @attributes: attributes of the variable
- * @data_size: size of the buffer to which the variable value is copied
- * @data: buffer to which the variable value is copied
- * Return: status code
- */
-static efi_status_t __efi_runtime EFIAPI
-efi_get_variable_runtime(u16 *variable_name, const efi_guid_t *guid,
- u32 *attributes, efi_uintn_t *data_size, void *data)
-{
- return EFI_UNSUPPORTED;
-}
-
-/**
- * efi_get_next_variable_name_runtime() - runtime implementation of
- * GetNextVariable()
- *
- * @variable_name_size: size of variable_name buffer in byte
- * @variable_name: name of uefi variable's name in u16
- * @guid: vendor's guid
- * Return: status code
- */
-static efi_status_t __efi_runtime EFIAPI
-efi_get_next_variable_name_runtime(efi_uintn_t *variable_name_size,
- u16 *variable_name, efi_guid_t *guid)
-{
- return EFI_UNSUPPORTED;
-}
-
-/**
* efi_query_variable_info() - get information about EFI variables
*
* This function implements the QueryVariableInfo() runtime service.
@@ -681,8 +667,10 @@
*/
void efi_variables_boot_exit_notify(void)
{
- u8 *comm_buf;
efi_status_t ret;
+ u8 *comm_buf;
+ loff_t len;
+ struct efi_var_file *var_buf;
comm_buf = setup_mm_hdr(NULL, 0,
SMM_VARIABLE_FUNCTION_EXIT_BOOT_SERVICE, &ret);
@@ -695,6 +683,18 @@
log_err("Unable to notify StMM for ExitBootServices\n");
free(comm_buf);
+ /*
+ * Populate the list for runtime variables.
+ * asking EFI_VARIABLE_RUNTIME_ACCESS is redundant, since
+ * efi_var_mem_notify_exit_boot_services will clean those, but that's fine
+ */
+ ret = efi_var_collect(&var_buf, &len, EFI_VARIABLE_RUNTIME_ACCESS);
+ if (ret != EFI_SUCCESS)
+ log_err("Can't populate EFI variables. No runtime variables will be available\n");
+ else
+ memcpy(efi_var_buf, var_buf, len);
+ free(var_buf);
+
/* Update runtime service table */
efi_runtime_services.query_variable_info =
efi_query_variable_info_runtime;
@@ -714,6 +714,11 @@
{
efi_status_t ret;
+ /* Create a cached copy of the variables that will be enabled on ExitBootServices() */
+ ret = efi_var_mem_init();
+ if (ret != EFI_SUCCESS)
+ return ret;
+
ret = get_max_payload(&max_payload_size);
if (ret != EFI_SUCCESS)
return ret;
diff --git a/lib/efi_selftest/Kconfig b/lib/efi_selftest/Kconfig
index 4781403..ca62436 100644
--- a/lib/efi_selftest/Kconfig
+++ b/lib/efi_selftest/Kconfig
@@ -1,6 +1,8 @@
config CMD_BOOTEFI_SELFTEST
bool "UEFI unit tests"
depends on CMD_BOOTEFI
+ imply PARTITIONS
+ imply DOS_PARTITION
imply FAT
imply FAT_WRITE
imply CMD_POWEROFF if PSCI_RESET || SYSRESET_PSCI
diff --git a/lib/efi_selftest/Makefile b/lib/efi_selftest/Makefile
index e9baa64..45ce685 100644
--- a/lib/efi_selftest/Makefile
+++ b/lib/efi_selftest/Makefile
@@ -32,7 +32,6 @@
efi_selftest_open_protocol.o \
efi_selftest_register_notify.o \
efi_selftest_set_virtual_address_map.o \
-efi_selftest_snp.o \
efi_selftest_textinput.o \
efi_selftest_textinputex.o \
efi_selftest_textoutput.o \
@@ -42,6 +41,8 @@
efi_selftest_variables_runtime.o \
efi_selftest_watchdog.o
+obj-$(CONFIG_NET) += efi_selftest_snp.o
+
obj-$(CONFIG_EFI_DEVICE_PATH_TO_TEXT) += efi_selftest_devicepath.o
obj-$(CONFIG_EFI_UNICODE_COLLATION_PROTOCOL2) += \
efi_selftest_unicode_collation.o
@@ -56,7 +57,7 @@
obj-y += efi_selftest_fdt.o
endif
-ifeq ($(CONFIG_BLK)$(CONFIG_PARTITIONS),yy)
+ifeq ($(CONFIG_BLK)$(CONFIG_DOS_PARTITION),yy)
obj-y += efi_selftest_block_device.o
endif
diff --git a/lib/lmb.c b/lib/lmb.c
index 2d680d8..75082f3 100644
--- a/lib/lmb.c
+++ b/lib/lmb.c
@@ -14,33 +14,37 @@
#define LMB_ALLOC_ANYWHERE 0
-void lmb_dump_all(struct lmb *lmb)
+void lmb_dump_all_force(struct lmb *lmb)
{
-#ifdef DEBUG
unsigned long i;
- debug("lmb_dump_all:\n");
- debug(" memory.cnt = 0x%lx\n", lmb->memory.cnt);
- debug(" memory.size = 0x%llx\n",
- (unsigned long long)lmb->memory.size);
+ printf("lmb_dump_all:\n");
+ printf(" memory.cnt = 0x%lx\n", lmb->memory.cnt);
+ printf(" memory.size = 0x%llx\n",
+ (unsigned long long)lmb->memory.size);
for (i = 0; i < lmb->memory.cnt; i++) {
- debug(" memory.reg[0x%lx].base = 0x%llx\n", i,
- (unsigned long long)lmb->memory.region[i].base);
- debug(" .size = 0x%llx\n",
- (unsigned long long)lmb->memory.region[i].size);
+ printf(" memory.reg[0x%lx].base = 0x%llx\n", i,
+ (unsigned long long)lmb->memory.region[i].base);
+ printf(" .size = 0x%llx\n",
+ (unsigned long long)lmb->memory.region[i].size);
}
- debug("\n reserved.cnt = 0x%lx\n",
- lmb->reserved.cnt);
- debug(" reserved.size = 0x%llx\n",
- (unsigned long long)lmb->reserved.size);
+ printf("\n reserved.cnt = 0x%lx\n", lmb->reserved.cnt);
+ printf(" reserved.size = 0x%llx\n",
+ (unsigned long long)lmb->reserved.size);
for (i = 0; i < lmb->reserved.cnt; i++) {
- debug(" reserved.reg[0x%lx].base = 0x%llx\n", i,
- (unsigned long long)lmb->reserved.region[i].base);
- debug(" .size = 0x%llx\n",
- (unsigned long long)lmb->reserved.region[i].size);
+ printf(" reserved.reg[0x%lx].base = 0x%llx\n", i,
+ (unsigned long long)lmb->reserved.region[i].base);
+ printf(" .size = 0x%llx\n",
+ (unsigned long long)lmb->reserved.region[i].size);
}
-#endif /* DEBUG */
+}
+
+void lmb_dump_all(struct lmb *lmb)
+{
+#ifdef DEBUG
+ lmb_dump_all_force(lmb);
+#endif
}
static long lmb_addrs_overlap(phys_addr_t base1, phys_size_t size1,
diff --git a/net/Kconfig b/net/Kconfig
index 6c47b7d..6874b55 100644
--- a/net/Kconfig
+++ b/net/Kconfig
@@ -59,4 +59,13 @@
almost-MTU block sizes.
You can also activate CONFIG_IP_DEFRAG to set a larger block.
+config TFTP_WINDOWSIZE
+ int "TFTP window size"
+ default 1
+ help
+ Default TFTP window size.
+ RFC7440 defines an optional window size of transmits,
+ before an ack response is required.
+ The default TFTP implementation implies a window size of 1.
+
endif # if NET
diff --git a/net/eth_legacy.c b/net/eth_legacy.c
index 340469b..992d188 100644
--- a/net/eth_legacy.c
+++ b/net/eth_legacy.c
@@ -8,6 +8,7 @@
#include <common.h>
#include <bootstage.h>
#include <command.h>
+#include <dm.h>
#include <env.h>
#include <log.h>
#include <net.h>
diff --git a/net/net.c b/net/net.c
index 1e7f633..28d9eeb 100644
--- a/net/net.c
+++ b/net/net.c
@@ -409,6 +409,10 @@
int ret = -EINVAL;
enum net_loop_state prev_net_state = net_state;
+#if defined(CONFIG_CMD_PING)
+ if (protocol != PING)
+ net_ping_ip.s_addr = 0;
+#endif
net_restarted = 0;
net_dev_exists = 0;
net_try_count = 1;
diff --git a/net/tftp.c b/net/tftp.c
index c05b7b5..84e970b 100644
--- a/net/tftp.c
+++ b/net/tftp.c
@@ -5,7 +5,6 @@
* Copyright 2011 Comelit Group SpA,
* Luca Ceresoli <luca.ceresoli@comelit.it>
*/
-
#include <common.h>
#include <command.h>
#include <efi_loader.h>
@@ -98,6 +97,12 @@
/* The number of hashes we printed */
static short tftp_tsize_num_hash;
#endif
+/* The window size negotiated */
+static ushort tftp_windowsize;
+/* Next block to send ack to */
+static ushort tftp_next_ack;
+/* Last nack block we send */
+static ushort tftp_last_nack;
#ifdef CONFIG_CMD_TFTPPUT
/* 1 if writing, else 0 */
static int tftp_put_active;
@@ -137,9 +142,20 @@
* almost-MTU block sizes. At least try... fall back to 512 if need be.
* (but those using CONFIG_IP_DEFRAG may want to set a larger block in cfg file)
*/
+
+/* When windowsize is defined to 1,
+ * tftp behaves the same way as it was
+ * never declared
+ */
+#ifdef CONFIG_TFTP_WINDOWSIZE
+#define TFTP_WINDOWSIZE CONFIG_TFTP_WINDOWSIZE
+#else
+#define TFTP_WINDOWSIZE 1
+#endif
static unsigned short tftp_block_size = TFTP_BLOCK_SIZE;
static unsigned short tftp_block_size_option = CONFIG_TFTP_BLOCKSIZE;
+static unsigned short tftp_window_size_option = TFTP_WINDOWSIZE;
static inline int store_block(int block, uchar *src, unsigned int len)
{
@@ -356,6 +372,14 @@
/* try for more effic. blk size */
pkt += sprintf((char *)pkt, "blksize%c%d%c",
0, tftp_block_size_option, 0);
+
+ /* try for more effic. window size.
+ * Implemented only for tftp get.
+ * Don't bother sending if it's 1
+ */
+ if (tftp_state == STATE_SEND_RRQ && tftp_window_size_option > 1)
+ pkt += sprintf((char *)pkt, "windowsize%c%d%c",
+ 0, tftp_window_size_option, 0);
len = pkt - xp;
break;
@@ -550,7 +574,17 @@
(char *)pkt + i + 6, tftp_tsize);
}
#endif
+ if (strcasecmp((char *)pkt + i, "windowsize") == 0) {
+ tftp_windowsize =
+ simple_strtoul((char *)pkt + i + 11,
+ NULL, 10);
+ debug("windowsize = %s, %d\n",
+ (char *)pkt + i + 11, tftp_windowsize);
+ }
}
+
+ tftp_next_ack = tftp_windowsize;
+
#ifdef CONFIG_CMD_TFTPPUT
if (tftp_put_active && tftp_state == STATE_OACK) {
/* Get ready to send the first block */
@@ -564,7 +598,28 @@
if (len < 2)
return;
len -= 2;
- tftp_cur_block = ntohs(*(__be16 *)pkt);
+
+ if (ntohs(*(__be16 *)pkt) != (ushort)(tftp_cur_block + 1)) {
+ debug("Received unexpected block: %d, expected: %d\n",
+ ntohs(*(__be16 *)pkt),
+ (ushort)(tftp_cur_block + 1));
+ /*
+ * If one packet is dropped most likely
+ * all other buffers in the window
+ * that will arrive will cause a sending NACK.
+ * This just overwellms the server, let's just send one.
+ */
+ if (tftp_last_nack != tftp_cur_block) {
+ tftp_send();
+ tftp_last_nack = tftp_cur_block;
+ tftp_next_ack = (ushort)(tftp_cur_block +
+ tftp_windowsize);
+ }
+ break;
+ }
+
+ tftp_cur_block++;
+ tftp_cur_block %= TFTP_SEQUENCE_SIZE;
if (tftp_state == STATE_SEND_RRQ)
debug("Server did not acknowledge any options!\n");
@@ -606,10 +661,15 @@
* Acknowledge the block just received, which will prompt
* the remote for the next one.
*/
- tftp_send();
+ if (tftp_cur_block == tftp_next_ack) {
+ tftp_send();
+ tftp_next_ack += tftp_windowsize;
+ }
- if (len < tftp_block_size)
+ if (len < tftp_block_size) {
+ tftp_send();
tftp_complete();
+ }
break;
case TFTP_ERROR:
@@ -683,6 +743,10 @@
if (ep != NULL)
tftp_block_size_option = simple_strtol(ep, NULL, 10);
+ ep = env_get("tftpwindowsize");
+ if (ep != NULL)
+ tftp_window_size_option = simple_strtol(ep, NULL, 10);
+
ep = env_get("tftptimeout");
if (ep != NULL)
timeout_ms = simple_strtol(ep, NULL, 10);
@@ -704,8 +768,8 @@
}
#endif
- debug("TFTP blocksize = %i, timeout = %ld ms\n",
- tftp_block_size_option, timeout_ms);
+ debug("TFTP blocksize = %i, TFTP windowsize = %d timeout = %ld ms\n",
+ tftp_block_size_option, tftp_window_size_option, timeout_ms);
tftp_remote_ip = net_server_ip;
if (!net_parse_bootfile(&tftp_remote_ip, tftp_filename, MAX_LEN)) {
@@ -801,7 +865,8 @@
tftp_our_port = simple_strtol(ep, NULL, 10);
#endif
tftp_cur_block = 0;
-
+ tftp_windowsize = 1;
+ tftp_last_nack = 0;
/* zero out server ether in case the server ip has changed */
memset(net_server_ethaddr, 0, 6);
/* Revert tftp_block_size to dflt */
diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index 734001c..56e9d54 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -311,7 +311,7 @@
$(obj)/%.dtb.S: $(obj)/%.dtb
$(call cmd,dt_S_dtb)
-ifeq ($(CONFIG_SPL_LOAD_FIT_APPLY_OVERLAY),y)
+ifeq ($(CONFIG_OF_LIBFDT_OVERLAY),y)
DTC_FLAGS += -@
endif
diff --git a/scripts/basic/fixdep.c b/scripts/basic/fixdep.c
index 958668d..6d59cf8 100644
--- a/scripts/basic/fixdep.c
+++ b/scripts/basic/fixdep.c
@@ -266,7 +266,7 @@
(q - p == 9 && !memcmp(p, "IS_MODULE(", 10)) ||
(q - p == 3 && !memcmp(p, "VAL(", 4))) {
p = q + 1;
- q = p;
+ q = p;
while (isalnum(*q) || *q == '_')
q++;
r = q;
diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl
index 238f12c..3932362 100755
--- a/scripts/checkpatch.pl
+++ b/scripts/checkpatch.pl
@@ -2322,7 +2322,7 @@
# Checks specific to U-Boot
sub u_boot_line {
- my ($realfile, $line, $herecurr) = @_;
+ my ($realfile, $line, $rawline, $herecurr) = @_;
# ask for a test if a new uclass ID is added
if ($realfile =~ /uclass-id.h/ && $line =~ /^\+/) {
@@ -2353,6 +2353,12 @@
ERROR("DEFINE_CONFIG_CMD",
"All commands are managed by Kconfig\n" . $herecurr);
}
+
+ # Don't put common.h and dm.h in header files
+ if ($realfile =~ /\.h$/ && $rawline =~ /^\+#include\s*<(common|dm)\.h>*/) {
+ ERROR("BARRED_INCLUDE_IN_HDR",
+ "Avoid including common.h and dm.h in header files\n" . $herecurr);
+ }
}
sub process {
@@ -3296,7 +3302,7 @@
}
if ($u_boot) {
- u_boot_line($realfile, $line, $herecurr);
+ u_boot_line($realfile, $line, $rawline, $herecurr);
}
# check we are in a valid source file C or perl if not then ignore this hunk
diff --git a/test/dm/adc.c b/test/dm/adc.c
index da7bd4b..7fa1d48 100644
--- a/test/dm/adc.c
+++ b/test/dm/adc.c
@@ -17,6 +17,7 @@
#include <power/regulator.h>
#include <power/sandbox_pmic.h>
#include <sandbox-adc.h>
+#include <test/test.h>
#include <test/ut.h>
static int dm_test_adc_bind(struct unit_test_state *uts)
diff --git a/test/dm/audio.c b/test/dm/audio.c
index 77c3a36..4bb86e3 100644
--- a/test/dm/audio.c
+++ b/test/dm/audio.c
@@ -8,6 +8,7 @@
#include <audio_codec.h>
#include <dm.h>
#include <dm/test.h>
+#include <test/test.h>
#include <test/ut.h>
#include <asm/test.h>
diff --git a/test/dm/axi.c b/test/dm/axi.c
index e1155a5..5b1bbab 100644
--- a/test/dm/axi.c
+++ b/test/dm/axi.c
@@ -8,9 +8,10 @@
#include <axi.h>
#include <dm.h>
#include <log.h>
+#include <asm/axi.h>
#include <dm/test.h>
+#include <test/test.h>
#include <test/ut.h>
-#include <asm/axi.h>
/* Test that sandbox AXI works correctly */
static int dm_test_axi_base(struct unit_test_state *uts)
diff --git a/test/dm/blk.c b/test/dm/blk.c
index 94b2855..80d671e 100644
--- a/test/dm/blk.c
+++ b/test/dm/blk.c
@@ -9,6 +9,7 @@
#include <usb.h>
#include <asm/state.h>
#include <dm/test.h>
+#include <test/test.h>
#include <test/ut.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/test/dm/board.c b/test/dm/board.c
index 5472c65..ff50d6c 100644
--- a/test/dm/board.c
+++ b/test/dm/board.c
@@ -9,6 +9,7 @@
#include <log.h>
#include <dm/test.h>
#include <board.h>
+#include <test/test.h>
#include <test/ut.h>
#include "../../drivers/board/sandbox.h"
diff --git a/test/dm/bootcount.c b/test/dm/bootcount.c
index be0c278..9fd3751 100644
--- a/test/dm/bootcount.c
+++ b/test/dm/bootcount.c
@@ -9,6 +9,7 @@
#include <log.h>
#include <asm/test.h>
#include <dm/test.h>
+#include <test/test.h>
#include <test/ut.h>
static int dm_test_bootcount(struct unit_test_state *uts)
diff --git a/test/dm/bus.c b/test/dm/bus.c
index 73eb3ae..0707267 100644
--- a/test/dm/bus.c
+++ b/test/dm/bus.c
@@ -14,6 +14,7 @@
#include <dm/test.h>
#include <dm/uclass-internal.h>
#include <dm/util.h>
+#include <test/test.h>
#include <test/ut.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/test/dm/clk.c b/test/dm/clk.c
index 48fc3dd..7a39760 100644
--- a/test/dm/clk.c
+++ b/test/dm/clk.c
@@ -12,6 +12,7 @@
#include <dm/test.h>
#include <dm/device-internal.h>
#include <linux/err.h>
+#include <test/test.h>
#include <test/ut.h>
/* Base test of the clk uclass */
diff --git a/test/dm/clk_ccf.c b/test/dm/clk_ccf.c
index ae3a4d8..da2292a 100644
--- a/test/dm/clk_ccf.c
+++ b/test/dm/clk_ccf.c
@@ -11,6 +11,7 @@
#include <dm/test.h>
#include <dm/uclass.h>
#include <linux/err.h>
+#include <test/test.h>
#include <test/ut.h>
#include <sandbox-clk.h>
diff --git a/test/dm/core.c b/test/dm/core.c
index d20c484..9b73ec3 100644
--- a/test/dm/core.c
+++ b/test/dm/core.c
@@ -16,6 +16,7 @@
#include <dm/util.h>
#include <dm/test.h>
#include <dm/uclass-internal.h>
+#include <test/test.h>
#include <test/ut.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/test/dm/cpu.c b/test/dm/cpu.c
index 46683d8..0a75c91 100644
--- a/test/dm/cpu.c
+++ b/test/dm/cpu.c
@@ -10,6 +10,7 @@
#include <dm/test.h>
#include <dm/uclass-internal.h>
#include <cpu.h>
+#include <test/test.h>
#include <test/ut.h>
static int dm_test_cpu(struct unit_test_state *uts)
diff --git a/test/dm/dma.c b/test/dm/dma.c
index 317ed4f..1cdc813 100644
--- a/test/dm/dma.c
+++ b/test/dm/dma.c
@@ -11,6 +11,7 @@
#include <malloc.h>
#include <dm/test.h>
#include <dma.h>
+#include <test/test.h>
#include <test/ut.h>
static int dm_test_dma_m2m(struct unit_test_state *uts)
diff --git a/test/dm/dsi_host.c b/test/dm/dsi_host.c
index 59fcd55..97917a1 100644
--- a/test/dm/dsi_host.c
+++ b/test/dm/dsi_host.c
@@ -10,6 +10,7 @@
#include <asm/state.h>
#include <asm/test.h>
#include <dm/test.h>
+#include <test/test.h>
#include <test/ut.h>
static int dm_test_dsi_host_phy_init(void *priv_data)
diff --git a/test/dm/eth.c b/test/dm/eth.c
index b58c964..1a3eb18 100644
--- a/test/dm/eth.c
+++ b/test/dm/eth.c
@@ -13,10 +13,11 @@
#include <log.h>
#include <malloc.h>
#include <net.h>
+#include <asm/eth.h>
#include <dm/test.h>
#include <dm/device-internal.h>
#include <dm/uclass-internal.h>
-#include <asm/eth.h>
+#include <test/test.h>
#include <test/ut.h>
#define DM_TEST_ETH_NUM 4
diff --git a/test/dm/firmware.c b/test/dm/firmware.c
index 60fdcbb..2b4f49a 100644
--- a/test/dm/firmware.c
+++ b/test/dm/firmware.c
@@ -8,6 +8,7 @@
#include <syscon.h>
#include <asm/test.h>
#include <dm/test.h>
+#include <test/test.h>
#include <test/ut.h>
/* Base test of firmware probe */
diff --git a/test/dm/gpio.c b/test/dm/gpio.c
index b7ee8fc..f3c467e 100644
--- a/test/dm/gpio.c
+++ b/test/dm/gpio.c
@@ -9,10 +9,11 @@
#include <log.h>
#include <malloc.h>
#include <acpi/acpi_device.h>
+#include <asm/gpio.h>
#include <dm/root.h>
#include <dm/test.h>
#include <dm/util.h>
-#include <asm/gpio.h>
+#include <test/test.h>
#include <test/ut.h>
/* Test that sandbox GPIOs work correctly */
diff --git a/test/dm/hwspinlock.c b/test/dm/hwspinlock.c
index 09ec38b..49c52bc 100644
--- a/test/dm/hwspinlock.c
+++ b/test/dm/hwspinlock.c
@@ -9,6 +9,7 @@
#include <asm/state.h>
#include <asm/test.h>
#include <dm/test.h>
+#include <test/test.h>
#include <test/ut.h>
/* Test that hwspinlock driver functions are called */
diff --git a/test/dm/i2c.c b/test/dm/i2c.c
index 2025c42..25b2c7c 100644
--- a/test/dm/i2c.c
+++ b/test/dm/i2c.c
@@ -16,6 +16,7 @@
#include <dm/uclass-internal.h>
#include <dm/util.h>
#include <hexdump.h>
+#include <test/test.h>
#include <test/ut.h>
static const int busnum;
diff --git a/test/dm/i2s.c b/test/dm/i2s.c
index 49ebc35..7a017be 100644
--- a/test/dm/i2s.c
+++ b/test/dm/i2s.c
@@ -7,9 +7,10 @@
#include <common.h>
#include <dm.h>
#include <i2s.h>
+#include <asm/test.h>
#include <dm/test.h>
+#include <test/test.h>
#include <test/ut.h>
-#include <asm/test.h>
/* Basic test of the i2s codec uclass */
static int dm_test_i2s(struct unit_test_state *uts)
diff --git a/test/dm/led.c b/test/dm/led.c
index 00de7b3..3d5ad93 100644
--- a/test/dm/led.c
+++ b/test/dm/led.c
@@ -8,6 +8,7 @@
#include <led.h>
#include <asm/gpio.h>
#include <dm/test.h>
+#include <test/test.h>
#include <test/ut.h>
/* Base test of the led uclass */
diff --git a/test/dm/mailbox.c b/test/dm/mailbox.c
index e6c521b..e9c8ab1 100644
--- a/test/dm/mailbox.c
+++ b/test/dm/mailbox.c
@@ -8,6 +8,7 @@
#include <malloc.h>
#include <dm/test.h>
#include <asm/mbox.h>
+#include <test/test.h>
#include <test/ut.h>
static int dm_test_mailbox(struct unit_test_state *uts)
diff --git a/test/dm/mdio.c b/test/dm/mdio.c
index ba1b54f..758bbb2 100644
--- a/test/dm/mdio.c
+++ b/test/dm/mdio.c
@@ -7,10 +7,11 @@
#include <common.h>
#include <dm.h>
#include <log.h>
-#include <dm/test.h>
+#include <miiphy.h>
#include <misc.h>
+#include <dm/test.h>
+#include <test/test.h>
#include <test/ut.h>
-#include <miiphy.h>
/* macros copied over from mdio_sandbox.c */
#define SANDBOX_PHY_ADDR 5
diff --git a/test/dm/mdio_mux.c b/test/dm/mdio_mux.c
index f962e09..0b3f85a 100644
--- a/test/dm/mdio_mux.c
+++ b/test/dm/mdio_mux.c
@@ -6,10 +6,11 @@
#include <common.h>
#include <dm.h>
-#include <dm/test.h>
+#include <miiphy.h>
#include <misc.h>
+#include <dm/test.h>
+#include <test/test.h>
#include <test/ut.h>
-#include <miiphy.h>
/* macros copied over from mdio_sandbox.c */
#define SANDBOX_PHY_ADDR 5
diff --git a/test/dm/misc.c b/test/dm/misc.c
index 26fd6ac..6410709 100644
--- a/test/dm/misc.c
+++ b/test/dm/misc.c
@@ -8,6 +8,7 @@
#include <dm.h>
#include <dm/test.h>
#include <misc.h>
+#include <test/test.h>
#include <test/ut.h>
static int dm_test_misc(struct unit_test_state *uts)
diff --git a/test/dm/mmc.c b/test/dm/mmc.c
index 49402b9..8e1fd3f 100644
--- a/test/dm/mmc.c
+++ b/test/dm/mmc.c
@@ -8,6 +8,7 @@
#include <mmc.h>
#include <part.h>
#include <dm/test.h>
+#include <test/test.h>
#include <test/ut.h>
/*
diff --git a/test/dm/nop.c b/test/dm/nop.c
index 2df29f3..8b3b646 100644
--- a/test/dm/nop.c
+++ b/test/dm/nop.c
@@ -13,6 +13,7 @@
#include <dm/device.h>
#include <dm/test.h>
#include <misc.h>
+#include <test/test.h>
#include <test/ut.h>
static int noptest_bind(struct udevice *parent)
diff --git a/test/dm/ofnode.c b/test/dm/ofnode.c
index 1114f34..e01acc4 100644
--- a/test/dm/ofnode.c
+++ b/test/dm/ofnode.c
@@ -5,6 +5,7 @@
#include <log.h>
#include <dm/of_extra.h>
#include <dm/test.h>
+#include <test/test.h>
#include <test/ut.h>
static int dm_test_ofnode_compatible(struct unit_test_state *uts)
diff --git a/test/dm/osd.c b/test/dm/osd.c
index 5739dfa..8784867 100644
--- a/test/dm/osd.c
+++ b/test/dm/osd.c
@@ -7,10 +7,11 @@
#include <common.h>
#include <display_options.h>
#include <dm.h>
-#include <dm/test.h>
-#include <test/ut.h>
#include <video_osd.h>
#include <asm/test.h>
+#include <dm/test.h>
+#include <test/test.h>
+#include <test/ut.h>
#include "../../drivers/video/sandbox_osd.h"
diff --git a/test/dm/panel.c b/test/dm/panel.c
index 7e4ebd6..410e8f3 100644
--- a/test/dm/panel.c
+++ b/test/dm/panel.c
@@ -14,8 +14,9 @@
#include <asm/gpio.h>
#include <asm/test.h>
#include <dm/test.h>
-#include <test/ut.h>
#include <power/regulator.h>
+#include <test/test.h>
+#include <test/ut.h>
/* Basic test of the panel uclass */
static int dm_test_panel(struct unit_test_state *uts)
diff --git a/test/dm/pch.c b/test/dm/pch.c
index 54e33d1..bf17a31 100644
--- a/test/dm/pch.c
+++ b/test/dm/pch.c
@@ -8,6 +8,7 @@
#include <pch.h>
#include <asm/test.h>
#include <dm/test.h>
+#include <test/test.h>
#include <test/ut.h>
/* Test that sandbox PCH works correctly */
diff --git a/test/dm/pci.c b/test/dm/pci.c
index 39e82b3..a492fc0 100644
--- a/test/dm/pci.c
+++ b/test/dm/pci.c
@@ -8,6 +8,7 @@
#include <asm/io.h>
#include <asm/test.h>
#include <dm/test.h>
+#include <test/test.h>
#include <test/ut.h>
/* Test that sandbox PCI works correctly */
diff --git a/test/dm/pci_ep.c b/test/dm/pci_ep.c
index 101f861..a29d00e 100644
--- a/test/dm/pci_ep.c
+++ b/test/dm/pci_ep.c
@@ -5,12 +5,13 @@
#include <common.h>
#include <dm.h>
+#include <hexdump.h>
+#include <pci_ep.h>
#include <asm/io.h>
#include <asm/test.h>
#include <dm/test.h>
+#include <test/test.h>
#include <test/ut.h>
-#include <hexdump.h>
-#include <pci_ep.h>
/* Test that sandbox PCI EP works correctly */
static int dm_test_pci_ep_base(struct unit_test_state *uts)
diff --git a/test/dm/phy.c b/test/dm/phy.c
index 99f0119..1a59899 100644
--- a/test/dm/phy.c
+++ b/test/dm/phy.c
@@ -9,6 +9,7 @@
#include <generic-phy.h>
#include <log.h>
#include <dm/test.h>
+#include <test/test.h>
#include <test/ut.h>
/* Base test of the phy uclass */
diff --git a/test/dm/pmic.c b/test/dm/pmic.c
index b582329..8c2766a 100644
--- a/test/dm/pmic.c
+++ b/test/dm/pmic.c
@@ -10,16 +10,17 @@
#include <errno.h>
#include <dm.h>
#include <fdtdec.h>
+#include <fsl_pmic.h>
#include <malloc.h>
#include <dm/device-internal.h>
#include <dm/root.h>
-#include <dm/util.h>
#include <dm/test.h>
#include <dm/uclass-internal.h>
+#include <dm/util.h>
#include <power/pmic.h>
#include <power/sandbox_pmic.h>
+#include <test/test.h>
#include <test/ut.h>
-#include <fsl_pmic.h>
/* Test PMIC get method */
diff --git a/test/dm/power-domain.c b/test/dm/power-domain.c
index 8baf5d0..52f88c5 100644
--- a/test/dm/power-domain.c
+++ b/test/dm/power-domain.c
@@ -8,6 +8,7 @@
#include <malloc.h>
#include <dm/test.h>
#include <asm/power-domain.h>
+#include <test/test.h>
#include <test/ut.h>
/* This must match the specifier for power-domains in the DT node */
diff --git a/test/dm/pwm.c b/test/dm/pwm.c
index b52ee21..8cc911e 100644
--- a/test/dm/pwm.c
+++ b/test/dm/pwm.c
@@ -7,6 +7,7 @@
#include <dm.h>
#include <pwm.h>
#include <dm/test.h>
+#include <test/test.h>
#include <test/ut.h>
/* Basic test of the pwm uclass */
diff --git a/test/dm/ram.c b/test/dm/ram.c
index 3efdb6b..2456466 100644
--- a/test/dm/ram.c
+++ b/test/dm/ram.c
@@ -7,6 +7,7 @@
#include <dm.h>
#include <ram.h>
#include <dm/test.h>
+#include <test/test.h>
#include <test/ut.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/test/dm/regmap.c b/test/dm/regmap.c
index 809494d..42cc4cb 100644
--- a/test/dm/regmap.c
+++ b/test/dm/regmap.c
@@ -12,6 +12,7 @@
#include <asm/test.h>
#include <dm/test.h>
#include <linux/err.h>
+#include <test/test.h>
#include <test/ut.h>
/* Base test of register maps */
diff --git a/test/dm/regulator.c b/test/dm/regulator.c
index ca916ee..f412ec2 100644
--- a/test/dm/regulator.c
+++ b/test/dm/regulator.c
@@ -20,6 +20,7 @@
#include <power/pmic.h>
#include <power/regulator.h>
#include <power/sandbox_pmic.h>
+#include <test/test.h>
#include <test/ut.h>
enum {
diff --git a/test/dm/remoteproc.c b/test/dm/remoteproc.c
index 9511c7d..c6bf2c4 100644
--- a/test/dm/remoteproc.c
+++ b/test/dm/remoteproc.c
@@ -10,7 +10,9 @@
#include <remoteproc.h>
#include <asm/io.h>
#include <dm/test.h>
+#include <test/test.h>
#include <test/ut.h>
+
/**
* dm_test_remoteproc_base() - test the operations after initializations
* @uts: unit test state
diff --git a/test/dm/reset.c b/test/dm/reset.c
index 871d640..8232807 100644
--- a/test/dm/reset.c
+++ b/test/dm/reset.c
@@ -10,6 +10,7 @@
#include <reset.h>
#include <dm/test.h>
#include <asm/reset.h>
+#include <test/test.h>
#include <test/ut.h>
/* This must match the specifier for mbox-names="test" in the DT node */
diff --git a/test/dm/rtc.c b/test/dm/rtc.c
index dd037a6..42a9195 100644
--- a/test/dm/rtc.c
+++ b/test/dm/rtc.c
@@ -14,6 +14,7 @@
#include <asm/rtc.h>
#include <asm/test.h>
#include <dm/test.h>
+#include <test/test.h>
#include <test/ut.h>
/* Simple RTC sanity check */
diff --git a/test/dm/serial.c b/test/dm/serial.c
index 6237693..a1b122e 100644
--- a/test/dm/serial.c
+++ b/test/dm/serial.c
@@ -8,6 +8,7 @@
#include <serial.h>
#include <dm.h>
#include <dm/test.h>
+#include <test/test.h>
#include <test/ut.h>
static int dm_test_serial(struct unit_test_state *uts)
diff --git a/test/dm/sf.c b/test/dm/sf.c
index 9e7dead..0f2808f 100644
--- a/test/dm/sf.c
+++ b/test/dm/sf.c
@@ -15,6 +15,7 @@
#include <asm/test.h>
#include <dm/test.h>
#include <dm/util.h>
+#include <test/test.h>
#include <test/ut.h>
/* Simple test of sandbox SPI flash */
diff --git a/test/dm/smem.c b/test/dm/smem.c
index 4099a5f..21dd96e 100644
--- a/test/dm/smem.c
+++ b/test/dm/smem.c
@@ -7,6 +7,7 @@
#include <dm.h>
#include <smem.h>
#include <dm/test.h>
+#include <test/test.h>
#include <test/ut.h>
/* Basic test of the smem uclass */
diff --git a/test/dm/sound.c b/test/dm/sound.c
index aa5368f..9cb9961 100644
--- a/test/dm/sound.c
+++ b/test/dm/sound.c
@@ -9,6 +9,7 @@
#include <sound.h>
#include <dm/test.h>
#include <test/ut.h>
+#include <test/test.h>
#include <asm/test.h>
/* Basic test of the sound codec uclass */
diff --git a/test/dm/spi.c b/test/dm/spi.c
index ff2cddd..10b89e7 100644
--- a/test/dm/spi.c
+++ b/test/dm/spi.c
@@ -13,6 +13,7 @@
#include <dm/test.h>
#include <dm/uclass-internal.h>
#include <dm/util.h>
+#include <test/test.h>
#include <test/ut.h>
/* Test that we can find buses and chip-selects */
diff --git a/test/dm/spmi.c b/test/dm/spmi.c
index 668b7e1..4aae1f1 100644
--- a/test/dm/spmi.c
+++ b/test/dm/spmi.c
@@ -14,6 +14,7 @@
#include <power/pmic.h>
#include <spmi/spmi.h>
#include <asm/gpio.h>
+#include <test/test.h>
#include <test/ut.h>
/* Test if bus childs got probed propperly*/
diff --git a/test/dm/syscon.c b/test/dm/syscon.c
index 06a1c69..b2d0ade 100644
--- a/test/dm/syscon.c
+++ b/test/dm/syscon.c
@@ -11,6 +11,7 @@
#include <asm/test.h>
#include <dm/test.h>
#include <linux/err.h>
+#include <test/test.h>
#include <test/ut.h>
/* Base test of system controllers */
diff --git a/test/dm/sysreset.c b/test/dm/sysreset.c
index 5b2358e..e5cd18c 100644
--- a/test/dm/sysreset.c
+++ b/test/dm/sysreset.c
@@ -9,6 +9,7 @@
#include <asm/state.h>
#include <asm/test.h>
#include <dm/test.h>
+#include <test/test.h>
#include <test/ut.h>
/* Test that we can use particular sysreset devices */
diff --git a/test/dm/tee.c b/test/dm/tee.c
index 632e996..fec9551 100644
--- a/test/dm/tee.c
+++ b/test/dm/tee.c
@@ -10,6 +10,7 @@
#include <dm/test.h>
#include <sandboxtee.h>
#include <tee.h>
+#include <test/test.h>
#include <test/ut.h>
#include <tee/optee_ta_avb.h>
diff --git a/test/dm/test-driver.c b/test/dm/test-driver.c
index ba85fa3..08bdf01 100644
--- a/test/dm/test-driver.c
+++ b/test/dm/test-driver.c
@@ -11,9 +11,10 @@
#include <errno.h>
#include <log.h>
#include <malloc.h>
+#include <asm/io.h>
#include <dm/test.h>
+#include <test/test.h>
#include <test/ut.h>
-#include <asm/io.h>
int dm_testdrv_op_count[DM_TEST_OP_COUNT];
static struct unit_test_state *uts = &global_dm_test_state;
diff --git a/test/dm/test-fdt.c b/test/dm/test-fdt.c
index 8ef7c7a..c64ac40 100644
--- a/test/dm/test-fdt.c
+++ b/test/dm/test-fdt.c
@@ -18,6 +18,7 @@
#include <dm/util.h>
#include <dm/lists.h>
#include <dm/of_access.h>
+#include <test/test.h>
#include <test/ut.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/test/dm/test-main.c b/test/dm/test-main.c
index 53e5ca3..6d197d0 100644
--- a/test/dm/test-main.c
+++ b/test/dm/test-main.c
@@ -14,6 +14,8 @@
#include <dm/test.h>
#include <dm/root.h>
#include <dm/uclass-internal.h>
+#include <test/test.h>
+#include <test/test.h>
#include <test/ut.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/test/dm/test-uclass.c b/test/dm/test-uclass.c
index b6d629a..760731b 100644
--- a/test/dm/test-uclass.c
+++ b/test/dm/test-uclass.c
@@ -14,6 +14,7 @@
#include <asm/io.h>
#include <dm/test.h>
#include <linux/list.h>
+#include <test/test.h>
#include <test/ut.h>
static struct unit_test_state *uts = &global_dm_test_state;
diff --git a/test/dm/timer.c b/test/dm/timer.c
index 9367dab..4aa5eea 100644
--- a/test/dm/timer.c
+++ b/test/dm/timer.c
@@ -7,6 +7,7 @@
#include <dm.h>
#include <timer.h>
#include <dm/test.h>
+#include <test/test.h>
#include <test/ut.h>
/*
diff --git a/test/dm/usb.c b/test/dm/usb.c
index b273a51..6cbb66c 100644
--- a/test/dm/usb.c
+++ b/test/dm/usb.c
@@ -14,6 +14,7 @@
#include <dm/device-internal.h>
#include <dm/test.h>
#include <dm/uclass-internal.h>
+#include <test/test.h>
#include <test/ut.h>
struct keyboard_test_data {
diff --git a/test/dm/video.c b/test/dm/video.c
index 19f78b6..9523a01 100644
--- a/test/dm/video.c
+++ b/test/dm/video.c
@@ -15,6 +15,7 @@
#include <video_console.h>
#include <dm/test.h>
#include <dm/uclass-internal.h>
+#include <test/test.h>
#include <test/ut.h>
/*
diff --git a/test/dm/virtio.c b/test/dm/virtio.c
index 4a0c0b2..6361cd5 100644
--- a/test/dm/virtio.c
+++ b/test/dm/virtio.c
@@ -9,9 +9,10 @@
#include <virtio.h>
#include <virtio_ring.h>
#include <dm/device-internal.h>
-#include <dm/uclass-internal.h>
#include <dm/root.h>
#include <dm/test.h>
+#include <dm/uclass-internal.h>
+#include <test/test.h>
#include <test/ut.h>
/* Basic test of the virtio uclass */
diff --git a/test/dm/wdt.c b/test/dm/wdt.c
index 1d31ec5..c704098 100644
--- a/test/dm/wdt.c
+++ b/test/dm/wdt.c
@@ -9,6 +9,7 @@
#include <asm/state.h>
#include <asm/test.h>
#include <dm/test.h>
+#include <test/test.h>
#include <test/ut.h>
/* Test that watchdog driver functions are called */
diff --git a/test/lib/lmb.c b/test/lib/lmb.c
index a0fe0f6..a344987 100644
--- a/test/lib/lmb.c
+++ b/test/lib/lmb.c
@@ -4,10 +4,12 @@
*/
#include <common.h>
+#include <dm.h>
#include <lmb.h>
#include <log.h>
#include <malloc.h>
#include <dm/test.h>
+#include <test/test.h>
#include <test/ut.h>
static int check_lmb(struct unit_test_state *uts, struct lmb *lmb,
diff --git a/test/py/u_boot_console_base.py b/test/py/u_boot_console_base.py
index 326b2ac..1db5da4 100644
--- a/test/py/u_boot_console_base.py
+++ b/test/py/u_boot_console_base.py
@@ -17,6 +17,7 @@
# Regexes for text we expect U-Boot to send to the console.
pattern_u_boot_spl_signon = re.compile('(U-Boot SPL \\d{4}\\.\\d{2}[^\r\n]*\\))')
+pattern_u_boot_spl2_signon = re.compile('(U-Boot SPL \\d{4}\\.\\d{2}[^\r\n]*\\))')
pattern_u_boot_main_signon = re.compile('(U-Boot \\d{4}\\.\\d{2}[^\r\n]*\\))')
pattern_stop_autoboot_prompt = re.compile('Hit any key to stop autoboot: ')
pattern_unknown_command = re.compile('Unknown command \'.*\' - try \'help\'')
@@ -28,6 +29,7 @@
bad_pattern_defs = (
('spl_signon', pattern_u_boot_spl_signon),
+ ('spl2_signon', pattern_u_boot_spl2_signon),
('main_signon', pattern_u_boot_main_signon),
('stop_autoboot_prompt', pattern_stop_autoboot_prompt),
('unknown_command', pattern_unknown_command),
@@ -353,12 +355,20 @@
'n') == 'y'
env_spl_skipped = self.config.env.get('env__spl_skipped',
False)
+ env_spl2_skipped = self.config.env.get('env__spl2_skipped',
+ True)
if config_spl and config_spl_serial_support and not env_spl_skipped:
m = self.p.expect([pattern_u_boot_spl_signon] +
self.bad_patterns)
if m != 0:
raise Exception('Bad pattern found on SPL console: ' +
self.bad_pattern_ids[m - 1])
+ if not env_spl2_skipped:
+ m = self.p.expect([pattern_u_boot_spl2_signon] +
+ self.bad_patterns)
+ if m != 0:
+ raise Exception('Bad pattern found on SPL2 console: ' +
+ self.bad_pattern_ids[m - 1])
m = self.p.expect([pattern_u_boot_main_signon] + self.bad_patterns)
if m != 0:
raise Exception('Bad pattern found on console: ' +
diff --git a/tools/env/fw_env.c b/tools/env/fw_env.c
index 3ab1ae6..66cb9d2 100644
--- a/tools/env/fw_env.c
+++ b/tools/env/fw_env.c
@@ -952,8 +952,8 @@
return -1;
}
if (rc != readlen) {
- fprintf(stderr, "Read error on %s: "
- "Attempted to read %d bytes but got %d\n",
+ fprintf(stderr,
+ "Read error on %s: Attempted to read %zd bytes but got %d\n",
DEVNAME(dev), readlen, rc);
return -1;
}
@@ -995,7 +995,7 @@
of the data */
loff_t blockstart; /* running start of the current block -
MEMGETBADBLOCK needs 64 bits */
- int was_locked; /* flash lock flag */
+ int was_locked = 0; /* flash lock flag */
int rc;
/*
diff --git a/tools/fit_image.c b/tools/fit_image.c
index df310b5..f7d2f56 100644
--- a/tools/fit_image.c
+++ b/tools/fit_image.c
@@ -388,7 +388,7 @@
size = fit_calc_size(params);
if (size < 0)
return -1;
- buf = malloc(size);
+ buf = calloc(1, size);
if (!buf) {
fprintf(stderr, "%s: Out of memory (%d bytes)\n",
params->cmdname, size);
@@ -467,7 +467,7 @@
* Allocate space to hold the image data we will extract,
* extral space allocate for image alignment to prevent overflow.
*/
- buf = malloc(fit_size + (align_size * image_number));
+ buf = calloc(1, fit_size + (align_size * image_number));
if (!buf) {
ret = -ENOMEM;
goto err_munmap;
@@ -572,7 +572,7 @@
/* Allocate space to hold the new FIT */
size = sbuf.st_size + 16384;
- fdt = malloc(size);
+ fdt = calloc(1, size);
if (!fdt) {
fprintf(stderr, "%s: Failed to allocate memory (%d bytes)\n",
__func__, size);
@@ -673,7 +673,7 @@
goto out;
}
- buf = malloc(512);
+ buf = calloc(1, 512);
if (!buf) {
printf("Can't allocate buffer to copy file\n");
goto out;
diff --git a/tools/patman/test_checkpatch.py b/tools/patman/test_checkpatch.py
index c9580ad..792196e 100644
--- a/tools/patman/test_checkpatch.py
+++ b/tools/patman/test_checkpatch.py
@@ -373,19 +373,19 @@
self.checkSingleMessage(pm, 'NEW_UCLASS')
def testLivetree(self):
- """Test for Use the livetree API"""
+ """Test for using the livetree API"""
pm = PatchMaker()
pm.add_line('common/main.c', 'fdtdec_do_something()')
self.checkSingleMessage(pm, 'LIVETREE')
def testNewCommand(self):
- """Test for Use the livetree API"""
+ """Test for adding a new command"""
pm = PatchMaker()
pm.add_line('common/main.c', 'do_wibble(struct cmd_tbl *cmd_tbl)')
self.checkSingleMessage(pm, 'CMD_TEST')
- def testNewCommand(self):
- """Test for Use the livetree API"""
+ def testPreferIf(self):
+ """Test for using #ifdef"""
pm = PatchMaker()
pm.add_line('common/main.c', '#ifdef CONFIG_YELLOW')
pm.add_line('common/init.h', '#ifdef CONFIG_YELLOW')
@@ -393,11 +393,18 @@
self.checkSingleMessage(pm, "PREFER_IF")
def testCommandUseDefconfig(self):
- """Test for Use the livetree API"""
+ """Test for enabling/disabling commands using preprocesor"""
pm = PatchMaker()
pm.add_line('common/main.c', '#undef CONFIG_CMD_WHICH')
self.checkSingleMessage(pm, 'DEFINE_CONFIG_CMD', 'error')
+ def testBarredIncludeInHdr(self):
+ """Test for using a barred include in a header file"""
+ pm = PatchMaker()
+ #pm.add_line('include/myfile.h', '#include <common.h>')
+ pm.add_line('include/myfile.h', '#include <dm.h>')
+ self.checkSingleMessage(pm, 'BARRED_INCLUDE_IN_HDR', 'error')
+
if __name__ == "__main__":
unittest.main()