diff --git a/arch/powerpc/dts/Makefile b/arch/powerpc/dts/Makefile
index 3ecda36..ceaa8ce 100644
--- a/arch/powerpc/dts/Makefile
+++ b/arch/powerpc/dts/Makefile
@@ -7,6 +7,7 @@
 dtb-$(CONFIG_TARGET_KMSUPX5) += kmsupc5.dtb kmsupm5.dtb
 dtb-$(CONFIG_TARGET_KMTEGR1) += kmtegr1.dtb
 dtb-$(CONFIG_TARGET_KMTEPR2) += kmtepr2.dtb
+dtb-$(CONFIG_TARGET_MPC837XERDB) += mpc8379erdb.dtb
 dtb-$(CONFIG_TARGET_MPC8548CDS) += mpc8548cds.dtb mpc8548cds_36b.dtb
 dtb-$(CONFIG_TARGET_P1010RDB_PA) += p1010rdb-pa.dtb p1010rdb-pa_36b.dtb
 dtb-$(CONFIG_TARGET_P1010RDB_PB) += p1010rdb-pb.dtb p1010rdb-pb_36b.dtb
diff --git a/arch/powerpc/dts/mpc8379erdb.dts b/arch/powerpc/dts/mpc8379erdb.dts
new file mode 100644
index 0000000..b1881b1
--- /dev/null
+++ b/arch/powerpc/dts/mpc8379erdb.dts
@@ -0,0 +1,74 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * MPC8379E RDB Device Tree Source
+ *
+ * Copyright 2020 NXP
+ */
+
+/dts-v1/;
+
+/ {
+	compatible = "fsl,mpc8379erdb";
+
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		PowerPC,8379@0 {
+			device_type = "cpu";
+			reg = <0x0>;
+			d-cache-line-size = <32>;
+			i-cache-line-size = <32>;
+			d-cache-size = <32768>;
+			i-cache-size = <32768>;
+			timebase-frequency = <0>;
+			bus-frequency = <0>;
+			clock-frequency = <0>;
+		};
+	};
+
+	memory {
+		device_type = "memory";
+		reg = <0x00000000 0x10000000>;  // 256MB at 0
+	};
+
+	localbus@e0005000 {
+		#address-cells = <2>;
+		#size-cells = <1>;
+		compatible = "fsl,elbc", "simple-bus";
+		reg = <0xe0005000 0x1000>;
+		interrupts = <77 0x8>;
+		interrupt-parent = <&ipic>;
+	};
+
+	immr@e0000000 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		device_type = "soc";
+		compatible = "simple-bus";
+		ranges = <0 0xe0000000 0x00100000>;
+		reg = <0xe0000000 0x00000200>;
+		bus-frequency = <0>;
+
+		sdhc@2e000 {
+			compatible = "fsl,esdhc";
+			reg = <0x2e000 0x1000>;
+			bus-width = <0x4>;
+			clock-frequency = <0>;
+		};
+
+		ipic: interrupt-controller@700 {
+			compatible = "fsl,ipic";
+			interrupt-controller;
+			#address-cells = <0>;
+			#interrupt-cells = <2>;
+			reg = <0x700 0x100>;
+			device_type = "ipic";
+		};
+
+	};
+
+};
diff --git a/board/freescale/mpc837xerdb/mpc837xerdb.c b/board/freescale/mpc837xerdb/mpc837xerdb.c
index 81d31f1..624e92e 100644
--- a/board/freescale/mpc837xerdb/mpc837xerdb.c
+++ b/board/freescale/mpc837xerdb/mpc837xerdb.c
@@ -139,8 +139,8 @@
 
 int board_early_init_f(void)
 {
-#ifdef CONFIG_FSL_SERDES
 	immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
+#ifdef CONFIG_FSL_SERDES
 	u32 spridr = in_be32(&immr->sysconf.spridr);
 
 	/* we check only part num, and don't look for CPU revisions */
@@ -167,10 +167,16 @@
 		break;
 	}
 #endif /* CONFIG_FSL_SERDES */
+
+#ifdef CONFIG_FSL_ESDHC
+	clrsetbits_be32(&immr->sysconf.sicrl, SICRL_USB_B, SICRL_USB_B_SD);
+	clrsetbits_be32(&immr->sysconf.sicrh, SICRH_SPI, SICRH_SPI_SD);
+#endif
 	return 0;
 }
 
 #ifdef CONFIG_FSL_ESDHC
+#if !(CONFIG_IS_ENABLED(DM_MMC))
 int board_mmc_init(struct bd_info *bd)
 {
 	struct immap __iomem *im = (struct immap __iomem *)CONFIG_SYS_IMMR;
@@ -189,6 +195,7 @@
 	return fsl_esdhc_mmc_init(bd);
 }
 #endif
+#endif
 
 /*
  * Miscellaneous late-boot configurations
diff --git a/configs/MPC837XERDB_defconfig b/configs/MPC837XERDB_defconfig
index 0d8ec8e..0e61c59 100644
--- a/configs/MPC837XERDB_defconfig
+++ b/configs/MPC837XERDB_defconfig
@@ -161,7 +161,11 @@
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_ENV_OVERWRITE=y
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="mpc8379erdb"
 CONFIG_ENV_ADDR=0xFE080000
+CONFIG_DM=y
+CONFIG_DM_MMC=y
 CONFIG_FSL_SATA=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD_NOR_FLASH=y
@@ -183,4 +187,3 @@
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y
diff --git a/configs/kmeter1_defconfig b/configs/kmeter1_defconfig
index 3812776..aadcbf47 100644
--- a/configs/kmeter1_defconfig
+++ b/configs/kmeter1_defconfig
@@ -1,5 +1,6 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xF0000000
+CONFIG_SYS_MALLOC_F_LEN=0x800
 CONFIG_KM_DEF_NETDEV="eth2"
 CONFIG_ENV_SIZE=0x4000
 CONFIG_ENV_SECT_SIZE=0x20000
@@ -60,6 +61,12 @@
 CONFIG_BAT3_DCACHE_GUARDED=y
 CONFIG_BAT3_USER_MODE_VALID=y
 CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT4=y
+CONFIG_BAT4_NAME="STACK_IN_DCACHE"
+CONFIG_BAT4_BASE=0xE6000000
+CONFIG_BAT4_ACCESS_RW=y
+CONFIG_BAT4_USER_MODE_VALID=y
+CONFIG_BAT4_SUPERVISOR_MODE_VALID=y
 CONFIG_BAT5=y
 CONFIG_BAT5_NAME="PAXE"
 CONFIG_BAT5_BASE=0xA0000000
diff --git a/drivers/net/qe/dm_qe_uec.c b/drivers/net/qe/dm_qe_uec.c
index b08c792..eb0501b 100644
--- a/drivers/net/qe/dm_qe_uec.c
+++ b/drivers/net/qe/dm_qe_uec.c
@@ -172,8 +172,8 @@
 			break;
 		default:
 			return -EINVAL;
-	}
-	break;
+		}
+		break;
 	case SPEED_1000:
 		maccfg2 |= MACCFG2_INTERFACE_MODE_BYTE;
 		switch (enet_if_mode) {
diff --git a/drivers/net/qe/uec.h b/drivers/net/qe/uec.h
index 7cd4b87..32b7d3e 100644
--- a/drivers/net/qe/uec.h
+++ b/drivers/net/qe/uec.h
@@ -678,7 +678,7 @@
 	int				grace_stopped_tx;
 	int				grace_stopped_rx;
 	int				the_first_run;
-#if !defined(COFIG_DM)
+#if !defined(CONFIG_DM)
 	/* PHY specific */
 	struct uec_mii_info		*mii_info;
 	int				oldspeed;
diff --git a/net/mdio-uclass.c b/net/mdio-uclass.c
index 697e5f8..5da984c 100644
--- a/net/mdio-uclass.c
+++ b/net/mdio-uclass.c
@@ -139,6 +139,12 @@
 	struct ofnode_phandle_args phandle = {.node = ofnode_null()};
 	int i;
 
+	if (CONFIG_IS_ENABLED(PHY_FIXED) &&
+	    ofnode_valid(dev_read_subnode(ethdev, "fixed-link"))) {
+		phy = phy_connect(NULL, -1, ethdev, interface);
+		goto out;
+	}
+
 	for (i = 0; i < PHY_HANDLE_STR_CNT; i++)
 		if (!dev_read_phandle_with_args(ethdev, phy_handle_str[i], NULL,
 						0, 0, &phandle))
@@ -168,6 +174,7 @@
 
 	phy = dm_mdio_phy_connect(mdiodev, phy_addr, ethdev, interface);
 
+out:
 	if (phy)
 		phy->node = phandle.node;