rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
diff --git a/post/board/lwmon/sysmon.c b/post/board/lwmon/sysmon.c
index ea8b5a9..79a5151 100644
--- a/post/board/lwmon/sysmon.c
+++ b/post/board/lwmon/sysmon.c
@@ -48,7 +48,7 @@
#include <watchdog.h>
#include <i2c.h>
-#if CONFIG_POST & CFG_POST_SYSMON
+#if CONFIG_POST & CONFIG_SYS_POST_SYSMON
DECLARE_GLOBAL_DATA_PTR;
@@ -76,11 +76,11 @@
};
static sysmon_t sysmon_lm87 =
- {CFG_I2C_SYSMON_ADDR, sysmon_lm87_init, sysmon_i2c_read};
+ {CONFIG_SYS_I2C_SYSMON_ADDR, sysmon_lm87_init, sysmon_i2c_read};
static sysmon_t sysmon_lm87_sgn =
- {CFG_I2C_SYSMON_ADDR, sysmon_lm87_init, sysmon_i2c_read_sgn};
+ {CONFIG_SYS_I2C_SYSMON_ADDR, sysmon_lm87_init, sysmon_i2c_read_sgn};
static sysmon_t sysmon_pic =
- {CFG_I2C_PICIO_ADDR, sysmon_pic_init, sysmon_i2c_read};
+ {CONFIG_SYS_I2C_PICIO_ADDR, sysmon_pic_init, sysmon_i2c_read};
static sysmon_t * sysmon_list[] =
{
@@ -325,4 +325,4 @@
return res;
}
-#endif /* CONFIG_POST & CFG_POST_SYSMON */
+#endif /* CONFIG_POST & CONFIG_SYS_POST_SYSMON */
diff --git a/post/board/lwmon5/dsp.c b/post/board/lwmon5/dsp.c
index a96ac7d..0e6d908 100644
--- a/post/board/lwmon5/dsp.c
+++ b/post/board/lwmon5/dsp.c
@@ -26,7 +26,7 @@
#include <post.h>
-#if CONFIG_POST & CFG_POST_DSP
+#if CONFIG_POST & CONFIG_SYS_POST_DSP
#include <asm/io.h>
/* This test verifies DSP status bits in FPGA */
@@ -50,4 +50,4 @@
return ret;
}
-#endif /* CONFIG_POST & CFG_POST_DSP */
+#endif /* CONFIG_POST & CONFIG_SYS_POST_DSP */
diff --git a/post/board/lwmon5/dspic.c b/post/board/lwmon5/dspic.c
index eb1c31c..ff2ed05 100644
--- a/post/board/lwmon5/dspic.c
+++ b/post/board/lwmon5/dspic.c
@@ -40,12 +40,12 @@
#define DSPIC_SYS_ERROR_REG 0x802
#define DSPIC_VERSION_REG 0x804
-#if CONFIG_POST & CFG_POST_BSPEC1
+#if CONFIG_POST & CONFIG_SYS_POST_BSPEC1
/* Verify that dsPIC ready test done early at hw init passed ok */
int dspic_init_post_test(int flags)
{
- if (in_be32((void *)CFG_DSPIC_TEST_ADDR) & CFG_DSPIC_TEST_MASK) {
+ if (in_be32((void *)CONFIG_SYS_DSPIC_TEST_ADDR) & CONFIG_SYS_DSPIC_TEST_MASK) {
post_log("dsPIC init test failed\n");
return 1;
}
@@ -53,15 +53,15 @@
return 0;
}
-#endif /* CONFIG_POST & CFG_POST_BSPEC1 */
+#endif /* CONFIG_POST & CONFIG_SYS_POST_BSPEC1 */
-#if CONFIG_POST & CFG_POST_BSPEC2
+#if CONFIG_POST & CONFIG_SYS_POST_BSPEC2
/* Read a register from the dsPIC. */
int dspic_read(ushort reg)
{
uchar buf[2];
- if (i2c_read(CFG_I2C_DSPIC_IO_ADDR, reg, 2, buf, 2))
+ if (i2c_read(CONFIG_SYS_I2C_DSPIC_IO_ADDR, reg, 2, buf, 2))
return -1;
return (uint)((buf[0] << 8) | buf[1]);
@@ -102,4 +102,4 @@
return ret;
}
-#endif /* CONFIG_POST & CFG_POST_BSPEC2 */
+#endif /* CONFIG_POST & CONFIG_SYS_POST_BSPEC2 */
diff --git a/post/board/lwmon5/fpga.c b/post/board/lwmon5/fpga.c
index ef641d7..2b84290 100644
--- a/post/board/lwmon5/fpga.c
+++ b/post/board/lwmon5/fpga.c
@@ -39,7 +39,7 @@
#define FPGA_RAM_END 0xC4203FFF
#define FPGA_STAT 0xC400000C
-#if CONFIG_POST & CFG_POST_BSPEC3
+#if CONFIG_POST & CONFIG_SYS_POST_BSPEC3
/* Testpattern for fpga memorytest */
static uint pattern[] = {
@@ -127,7 +127,7 @@
/* Enable write to FPGA RAM */
out_be32((void *)FPGA_STAT, in_be32((void *)FPGA_STAT) | 0x1000);
- read_value = get_ram_size((void *)CFG_FPGA_BASE_1, 0x4000);
+ read_value = get_ram_size((void *)CONFIG_SYS_FPGA_BASE_1, 0x4000);
post_log("FPGA RAM size: %d bytes\n", read_value);
for (address = 0; address < 0x1000; address++) {
@@ -141,4 +141,4 @@
return ret;
}
-#endif /* CONFIG_POST & CFG_POST_BSPEC3 */
+#endif /* CONFIG_POST & CONFIG_SYS_POST_BSPEC3 */
diff --git a/post/board/lwmon5/gdc.c b/post/board/lwmon5/gdc.c
index bc16685..eb16e36 100644
--- a/post/board/lwmon5/gdc.c
+++ b/post/board/lwmon5/gdc.c
@@ -38,7 +38,7 @@
#define GDC_RAM_START 0xC0000000
#define GDC_RAM_END 0xC2000000
-#if CONFIG_POST & CFG_POST_BSPEC4
+#if CONFIG_POST & CONFIG_SYS_POST_BSPEC4
static int gdc_test_reg_one(uint value)
{
@@ -93,4 +93,4 @@
return ret;
}
-#endif /* CONFIG_POST & CFG_POST_BSPEC4 */
+#endif /* CONFIG_POST & CONFIG_SYS_POST_BSPEC4 */
diff --git a/post/board/lwmon5/sysmon.c b/post/board/lwmon5/sysmon.c
index 2766224..aef5bd0 100644
--- a/post/board/lwmon5/sysmon.c
+++ b/post/board/lwmon5/sysmon.c
@@ -51,7 +51,7 @@
#include <mb862xx.h>
#endif
-#if CONFIG_POST & CFG_POST_SYSMON
+#if CONFIG_POST & CONFIG_SYS_POST_SYSMON
DECLARE_GLOBAL_DATA_PTR;
@@ -90,7 +90,7 @@
};
static sysmon_t sysmon_dspic =
- {CFG_I2C_DSPIC_IO_ADDR, sysmon_dspic_init, sysmon_dspic_read};
+ {CONFIG_SYS_I2C_DSPIC_IO_ADDR, sysmon_dspic_init, sysmon_dspic_read};
static sysmon_t * sysmon_list[] =
{
@@ -267,4 +267,4 @@
return res;
}
-#endif /* CONFIG_POST & CFG_POST_SYSMON */
+#endif /* CONFIG_POST & CONFIG_SYS_POST_SYSMON */
diff --git a/post/board/lwmon5/watchdog.c b/post/board/lwmon5/watchdog.c
index 1246278..44f0488 100644
--- a/post/board/lwmon5/watchdog.c
+++ b/post/board/lwmon5/watchdog.c
@@ -31,7 +31,7 @@
#include <post.h>
-#if CONFIG_POST & CFG_POST_WATCHDOG
+#if CONFIG_POST & CONFIG_SYS_POST_WATCHDOG
#include <watchdog.h>
#include <asm/gpio.h>
@@ -39,20 +39,20 @@
static uint watchdog_magic_read(void)
{
- return in_be32((void *)CFG_WATCHDOG_FLAGS_ADDR) &
- CFG_WATCHDOG_MAGIC_MASK;
+ return in_be32((void *)CONFIG_SYS_WATCHDOG_FLAGS_ADDR) &
+ CONFIG_SYS_WATCHDOG_MAGIC_MASK;
}
static void watchdog_magic_write(uint value)
{
- out_be32((void *)CFG_WATCHDOG_FLAGS_ADDR, value |
- (in_be32((void *)CFG_WATCHDOG_FLAGS_ADDR) &
- ~CFG_WATCHDOG_MAGIC_MASK));
+ out_be32((void *)CONFIG_SYS_WATCHDOG_FLAGS_ADDR, value |
+ (in_be32((void *)CONFIG_SYS_WATCHDOG_FLAGS_ADDR) &
+ ~CONFIG_SYS_WATCHDOG_MAGIC_MASK));
}
int sysmon1_post_test(int flags)
{
- if (gpio_read_in_bit(CFG_GPIO_SYSMON_STATUS) == 0) {
+ if (gpio_read_in_bit(CONFIG_SYS_GPIO_SYSMON_STATUS) == 0) {
/*
* 3.1. GPIO62 is low
* Assuming system voltage failure.
@@ -79,7 +79,7 @@
return 1;
}
- if (watchdog_magic_read() != CFG_WATCHDOG_MAGIC) {
+ if (watchdog_magic_read() != CONFIG_SYS_WATCHDOG_MAGIC) {
/* 3.2. Scratch register 1 differs from magic value 0x1248xxxx
* Assuming PowerOn
*/
@@ -88,18 +88,18 @@
ulong time;
/* 3.2.1. Set magic value to scratch register */
- watchdog_magic_write(CFG_WATCHDOG_MAGIC);
+ watchdog_magic_write(CONFIG_SYS_WATCHDOG_MAGIC);
ints = disable_interrupts ();
/* 3.2.2. strobe watchdog once */
WATCHDOG_RESET();
- out_be32((void *)CFG_WATCHDOG_TIME_ADDR, 0);
+ out_be32((void *)CONFIG_SYS_WATCHDOG_TIME_ADDR, 0);
/* 3.2.3. save time of strobe in scratch register 2 */
base = post_time_ms (0);
/* 3.2.4. Wait for 150 ms (enough for reset to happen) */
while ((time = post_time_ms (base)) < 150)
- out_be32((void *)CFG_WATCHDOG_TIME_ADDR, time);
+ out_be32((void *)CONFIG_SYS_WATCHDOG_TIME_ADDR, time);
if (ints)
enable_interrupts ();
@@ -116,7 +116,7 @@
*/
ulong time;
/* 3.3.1. So, the test succeed, save measured time to syslog. */
- time = in_be32((void *)CFG_WATCHDOG_TIME_ADDR);
+ time = in_be32((void *)CONFIG_SYS_WATCHDOG_TIME_ADDR);
post_log("hw watchdog time : %u ms, passed ", time);
/* 3.3.2. Set scratch register 1 to 0x0000xxxx */
watchdog_magic_write(0);
@@ -125,4 +125,4 @@
return -1;
}
-#endif /* CONFIG_POST & CFG_POST_WATCHDOG */
+#endif /* CONFIG_POST & CONFIG_SYS_POST_WATCHDOG */
diff --git a/post/board/netta/codec.c b/post/board/netta/codec.c
index 115e331..a095a91 100644
--- a/post/board/netta/codec.c
+++ b/post/board/netta/codec.c
@@ -33,7 +33,7 @@
#include <post.h>
-#if CONFIG_POST & CFG_POST_CODEC
+#if CONFIG_POST & CONFIG_SYS_POST_CODEC
extern int board_post_codec(int flags);
@@ -42,4 +42,4 @@
return board_post_codec(flags);
}
-#endif /* CONFIG_POST & CFG_POST_CODEC */
+#endif /* CONFIG_POST & CONFIG_SYS_POST_CODEC */
diff --git a/post/board/netta/dsp.c b/post/board/netta/dsp.c
index dcef4e8..438ced5 100644
--- a/post/board/netta/dsp.c
+++ b/post/board/netta/dsp.c
@@ -33,7 +33,7 @@
#include <post.h>
-#if CONFIG_POST & CFG_POST_DSP
+#if CONFIG_POST & CONFIG_SYS_POST_DSP
extern int board_post_dsp(int flags);
@@ -42,4 +42,4 @@
return board_post_dsp(flags);
}
-#endif /* CONFIG_POST & CFG_POST_DSP */
+#endif /* CONFIG_POST & CONFIG_SYS_POST_DSP */
diff --git a/post/cpu/mpc8xx/cache.c b/post/cpu/mpc8xx/cache.c
index 36965a1..06cb501 100644
--- a/post/cpu/mpc8xx/cache.c
+++ b/post/cpu/mpc8xx/cache.c
@@ -32,7 +32,7 @@
#include <post.h>
#include <watchdog.h>
-#if CONFIG_POST & CFG_POST_CACHE
+#if CONFIG_POST & CONFIG_SYS_POST_CACHE
#define CACHE_POST_SIZE 1024
@@ -75,4 +75,4 @@
return res;
}
-#endif /* CONFIG_POST & CFG_POST_CACHE */
+#endif /* CONFIG_POST & CONFIG_SYS_POST_CACHE */
diff --git a/post/cpu/mpc8xx/cache_8xx.S b/post/cpu/mpc8xx/cache_8xx.S
index a3fc39b..097eedb 100644
--- a/post/cpu/mpc8xx/cache_8xx.S
+++ b/post/cpu/mpc8xx/cache_8xx.S
@@ -33,7 +33,7 @@
#include <ppc_defs.h>
#include <asm/cache.h>
-#if CONFIG_POST & CFG_POST_CACHE
+#if CONFIG_POST & CONFIG_SYS_POST_CACHE
.text
@@ -490,4 +490,4 @@
blr
#endif /* CONFIG_MPC823 || MPC850 || MPC855 || MPC860 */
-#endif /* CONFIG_POST & CFG_POST_CACHE */
+#endif /* CONFIG_POST & CONFIG_SYS_POST_CACHE */
diff --git a/post/cpu/mpc8xx/ether.c b/post/cpu/mpc8xx/ether.c
index 2fa5cf4..5622cb7 100644
--- a/post/cpu/mpc8xx/ether.c
+++ b/post/cpu/mpc8xx/ether.c
@@ -36,7 +36,7 @@
*/
#include <post.h>
-#if CONFIG_POST & CFG_POST_ETHER
+#if CONFIG_POST & CONFIG_SYS_POST_ETHER
#if defined(CONFIG_8xx)
#include <commproc.h>
#elif defined(CONFIG_MPC8260)
@@ -120,7 +120,7 @@
int i;
scc_enet_t *pram_ptr;
- volatile immap_t *immr = (immap_t *) CFG_IMMR;
+ volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
immr->im_cpm.cp_scc[scc_index].scc_gsmrl &=
~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
@@ -143,7 +143,7 @@
rxIdx = 0;
txIdx = 0;
-#ifdef CFG_ALLOC_DPRAM
+#ifdef CONFIG_SYS_ALLOC_DPRAM
rtx = (RTXBD *) (immr->im_cpm.cp_dpmem +
dpram_alloc_align (sizeof (RTXBD), 8));
#else
@@ -452,7 +452,7 @@
static void scc_halt (int scc_index)
{
- volatile immap_t *immr = (immap_t *) CFG_IMMR;
+ volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
immr->im_cpm.cp_scc[scc_index].scc_gsmrl &=
~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
@@ -624,4 +624,4 @@
return res;
}
-#endif /* CONFIG_POST & CFG_POST_ETHER */
+#endif /* CONFIG_POST & CONFIG_SYS_POST_ETHER */
diff --git a/post/cpu/mpc8xx/spr.c b/post/cpu/mpc8xx/spr.c
index 83f04da..db84dbe 100644
--- a/post/cpu/mpc8xx/spr.c
+++ b/post/cpu/mpc8xx/spr.c
@@ -35,7 +35,7 @@
#include <post.h>
-#if CONFIG_POST & CFG_POST_SPR
+#if CONFIG_POST & CONFIG_SYS_POST_SPR
static struct
{
@@ -80,7 +80,7 @@
{159, "BAR", 0x00000000, 0x00000000},
{630, "DPDR", 0x00000000, 0x00000000},
{631, "DPIR", 0x00000000, 0x00000000},
- {638, "IMMR", 0xFFFF0000, CFG_IMMR },
+ {638, "IMMR", 0xFFFF0000, CONFIG_SYS_IMMR },
{560, "IC_CST", 0x8E380000, 0x00000000},
{561, "IC_ADR", 0x00000000, 0x00000000},
{562, "IC_DAT", 0x00000000, 0x00000000},
@@ -146,4 +146,4 @@
return ret;
}
-#endif /* CONFIG_POST & CFG_POST_SPR */
+#endif /* CONFIG_POST & CONFIG_SYS_POST_SPR */
diff --git a/post/cpu/mpc8xx/uart.c b/post/cpu/mpc8xx/uart.c
index 635debe..f351ac0 100644
--- a/post/cpu/mpc8xx/uart.c
+++ b/post/cpu/mpc8xx/uart.c
@@ -37,7 +37,7 @@
*/
#include <post.h>
-#if CONFIG_POST & CFG_POST_UART
+#if CONFIG_POST & CONFIG_SYS_POST_UART
#if defined(CONFIG_8xx)
#include <commproc.h>
#elif defined(CONFIG_MPC8260)
@@ -84,7 +84,7 @@
{
static int cpm_cr_ch[] = { CPM_CR_CH_SMC1, CPM_CR_CH_SMC2 };
- volatile immap_t *im = (immap_t *) CFG_IMMR;
+ volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
volatile smc_t *sp;
volatile smc_uart_t *up;
volatile cbd_t *tbdf, *rbdf;
@@ -105,15 +105,15 @@
im->im_siu_conf.sc_sdcr = 1;
/* clear error conditions */
-#ifdef CFG_SDSR
- im->im_sdma.sdma_sdsr = CFG_SDSR;
+#ifdef CONFIG_SYS_SDSR
+ im->im_sdma.sdma_sdsr = CONFIG_SYS_SDSR;
#else
im->im_sdma.sdma_sdsr = 0x83;
#endif
/* clear SDMA interrupt mask */
-#ifdef CFG_SDMR
- im->im_sdma.sdma_sdmr = CFG_SDMR;
+#ifdef CONFIG_SYS_SDMR
+ im->im_sdma.sdma_sdmr = CONFIG_SYS_SDMR;
#else
im->im_sdma.sdma_sdmr = 0x00;
#endif
@@ -133,7 +133,7 @@
* the buffer descriptors.
*/
-#ifdef CFG_ALLOC_DPRAM
+#ifdef CONFIG_SYS_ALLOC_DPRAM
dpaddr = dpram_alloc_align (sizeof (cbd_t) * 2 + 2, 8);
#else
dpaddr = CPM_POST_BASE;
@@ -218,7 +218,7 @@
volatile cbd_t *tbdf;
volatile char *buf;
volatile smc_uart_t *up;
- volatile immap_t *im = (immap_t *) CFG_IMMR;
+ volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
volatile cpm8xx_t *cpmp = &(im->im_cpm);
up = (smc_uart_t *) & cpmp->cp_dparam[proff_smc[smc_index]];
@@ -250,7 +250,7 @@
volatile cbd_t *rbdf;
volatile unsigned char *buf;
volatile smc_uart_t *up;
- volatile immap_t *im = (immap_t *) CFG_IMMR;
+ volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
volatile cpm8xx_t *cpmp = &(im->im_cpm);
unsigned char c;
int i;
@@ -293,7 +293,7 @@
CPM_CR_CH_SCC4,
};
- volatile immap_t *im = (immap_t *) CFG_IMMR;
+ volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
volatile scc_t *sp;
volatile scc_uart_t *up;
volatile cbd_t *tbdf, *rbdf;
@@ -313,7 +313,7 @@
/* Allocate space for two buffer descriptors in the DP ram.
*/
-#ifdef CFG_ALLOC_DPRAM
+#ifdef CONFIG_SYS_ALLOC_DPRAM
dpaddr = dpram_alloc_align (sizeof (cbd_t) * 2 + 2, 8);
#else
dpaddr = CPM_POST_BASE;
@@ -420,7 +420,7 @@
static void scc_halt(int scc_index)
{
- volatile immap_t *im = (immap_t *) CFG_IMMR;
+ volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
volatile cpm8xx_t *cp = &(im->im_cpm);
volatile scc_t *sp = (scc_t *) & (cp->cp_scc[scc_index]);
@@ -432,7 +432,7 @@
volatile cbd_t *tbdf;
volatile char *buf;
volatile scc_uart_t *up;
- volatile immap_t *im = (immap_t *) CFG_IMMR;
+ volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
volatile cpm8xx_t *cpmp = &(im->im_cpm);
up = (scc_uart_t *) & cpmp->cp_dparam[proff_scc[scc_index]];
@@ -464,7 +464,7 @@
volatile cbd_t *rbdf;
volatile unsigned char *buf;
volatile scc_uart_t *up;
- volatile immap_t *im = (immap_t *) CFG_IMMR;
+ volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
volatile cpm8xx_t *cpmp = &(im->im_cpm);
unsigned char c;
int i;
@@ -553,4 +553,4 @@
return res;
}
-#endif /* CONFIG_POST & CFG_POST_UART */
+#endif /* CONFIG_POST & CONFIG_SYS_POST_UART */
diff --git a/post/cpu/mpc8xx/usb.c b/post/cpu/mpc8xx/usb.c
index 5877981..e3fe075 100644
--- a/post/cpu/mpc8xx/usb.c
+++ b/post/cpu/mpc8xx/usb.c
@@ -36,7 +36,7 @@
#include <post.h>
-#if CONFIG_POST & CFG_POST_USB
+#if CONFIG_POST & CONFIG_SYS_POST_USB
#include <commproc.h>
#include <command.h>
@@ -105,7 +105,7 @@
int usb_post_test (int flags)
{
int res = -1;
- volatile immap_t *im = (immap_t *) CFG_IMMR;
+ volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
volatile cpm8xx_t *cp = &(im->im_cpm);
volatile usb_param_t *pram_ptr;
uint dpram;
@@ -262,4 +262,4 @@
return res;
}
-#endif /* CONFIG_POST & CFG_POST_USB */
+#endif /* CONFIG_POST & CONFIG_SYS_POST_USB */
diff --git a/post/cpu/mpc8xx/watchdog.c b/post/cpu/mpc8xx/watchdog.c
index f94158a..da191c2 100644
--- a/post/cpu/mpc8xx/watchdog.c
+++ b/post/cpu/mpc8xx/watchdog.c
@@ -36,7 +36,7 @@
#include <post.h>
#include <watchdog.h>
-#if CONFIG_POST & CFG_POST_WATCHDOG
+#if CONFIG_POST & CONFIG_SYS_POST_WATCHDOG
static ulong gettbl (void)
{
@@ -72,4 +72,4 @@
}
}
-#endif /* CONFIG_POST & CFG_POST_WATCHDOG */
+#endif /* CONFIG_POST & CONFIG_SYS_POST_WATCHDOG */
diff --git a/post/cpu/ppc4xx/cache.c b/post/cpu/ppc4xx/cache.c
index be6a2bf..482f819 100644
--- a/post/cpu/ppc4xx/cache.c
+++ b/post/cpu/ppc4xx/cache.c
@@ -33,7 +33,7 @@
#include <post.h>
-#if CONFIG_POST & CFG_POST_CACHE
+#if CONFIG_POST & CONFIG_SYS_POST_CACHE
#include <asm/mmu.h>
#include <watchdog.h>
@@ -54,7 +54,7 @@
int cache_post_test (int flags)
{
- void *virt = (void *)CFG_POST_CACHE_ADDR;
+ void *virt = (void *)CONFIG_SYS_POST_CACHE_ADDR;
int ints;
int res = 0;
int tlb = -1; /* index to the victim TLB entry */
@@ -119,4 +119,4 @@
return res;
}
-#endif /* CONFIG_POST & CFG_POST_CACHE */
+#endif /* CONFIG_POST & CONFIG_SYS_POST_CACHE */
diff --git a/post/cpu/ppc4xx/cache_4xx.S b/post/cpu/ppc4xx/cache_4xx.S
index 455ffa0..3f3e585 100644
--- a/post/cpu/ppc4xx/cache_4xx.S
+++ b/post/cpu/ppc4xx/cache_4xx.S
@@ -31,7 +31,7 @@
#include <asm/cache.h>
#include <asm/mmu.h>
-#if CONFIG_POST & CFG_POST_CACHE
+#if CONFIG_POST & CONFIG_SYS_POST_CACHE
.text
@@ -115,8 +115,8 @@
*/
cache_post_dinvalidate:
dcbi r0, r3
- addi r3, r3, CFG_CACHELINE_SIZE
- subic. r4, r4, CFG_CACHELINE_SIZE
+ addi r3, r3, CONFIG_SYS_CACHELINE_SIZE
+ subic. r4, r4, CONFIG_SYS_CACHELINE_SIZE
bgt cache_post_dinvalidate
sync
blr
@@ -125,8 +125,8 @@
*/
cache_post_dstore:
dcbst r0, r3
- addi r3, r3, CFG_CACHELINE_SIZE
- subic. r4, r4, CFG_CACHELINE_SIZE
+ addi r3, r3, CONFIG_SYS_CACHELINE_SIZE
+ subic. r4, r4, CONFIG_SYS_CACHELINE_SIZE
bgt cache_post_dstore
sync
blr
@@ -135,8 +135,8 @@
*/
cache_post_dtouch:
dcbt r0, r3
- addi r3, r3, CFG_CACHELINE_SIZE
- subic. r4, r4, CFG_CACHELINE_SIZE
+ addi r3, r3, CONFIG_SYS_CACHELINE_SIZE
+ subic. r4, r4, CONFIG_SYS_CACHELINE_SIZE
bgt cache_post_dtouch
sync
blr
@@ -486,4 +486,4 @@
li r3, -1
blr
-#endif /* CONFIG_POST & CFG_POST_CACHE */
+#endif /* CONFIG_POST & CONFIG_SYS_POST_CACHE */
diff --git a/post/cpu/ppc4xx/denali_ecc.c b/post/cpu/ppc4xx/denali_ecc.c
index 12a1bbf..6ab1593 100644
--- a/post/cpu/ppc4xx/denali_ecc.c
+++ b/post/cpu/ppc4xx/denali_ecc.c
@@ -35,7 +35,7 @@
#include <post.h>
-#if CONFIG_POST & CFG_POST_ECC
+#if CONFIG_POST & CONFIG_SYS_POST_ECC
/*
* MEMORY ECC test
@@ -267,5 +267,5 @@
debug("ecc_post_test() returning %d\n", ret);
return ret;
}
-#endif /* CONFIG_POST & CFG_POST_ECC */
+#endif /* CONFIG_POST & CONFIG_SYS_POST_ECC */
#endif /* defined(CONFIG_440EPX) || defined(CONFIG_440GRX) */
diff --git a/post/cpu/ppc4xx/ether.c b/post/cpu/ppc4xx/ether.c
index ccbfcf9..e40e19b 100644
--- a/post/cpu/ppc4xx/ether.c
+++ b/post/cpu/ppc4xx/ether.c
@@ -39,7 +39,7 @@
#include <post.h>
-#if CONFIG_POST & CFG_POST_ETHER
+#if CONFIG_POST & CONFIG_SYS_POST_ETHER
#include <asm/cache.h>
#include <asm/io.h>
@@ -209,7 +209,7 @@
mtdcr (malrxcasr, (MAL_TXRX_CASR >> devnum));
/* set internal loopback mode */
-#ifdef CFG_POST_ETHER_EXT_LOOPBACK
+#ifdef CONFIG_SYS_POST_ETHER_EXT_LOOPBACK
out_be32 ((void*)(EMAC_M1 + hw_addr), EMAC_M1_FDE | 0 |
EMAC_M1_RFS_4K | EMAC_M1_TX_FIFO_2K |
EMAC_M1_MF_100MBPS | EMAC_M1_IST |
@@ -406,8 +406,8 @@
int i;
/* Allocate tx & rx packet buffers */
- tx_buf = malloc (PKTSIZE_ALIGN + CFG_CACHELINE_SIZE);
- rx_buf = malloc (PKTSIZE_ALIGN + CFG_CACHELINE_SIZE);
+ tx_buf = malloc (PKTSIZE_ALIGN + CONFIG_SYS_CACHELINE_SIZE);
+ rx_buf = malloc (PKTSIZE_ALIGN + CONFIG_SYS_CACHELINE_SIZE);
if (!tx_buf || !rx_buf) {
printf ("Failed to allocate packet buffers\n");
@@ -427,4 +427,4 @@
return res;
}
-#endif /* CONFIG_POST & CFG_POST_ETHER */
+#endif /* CONFIG_POST & CONFIG_SYS_POST_ETHER */
diff --git a/post/cpu/ppc4xx/ocm.c b/post/cpu/ppc4xx/ocm.c
index 88aa93e..584e30c 100644
--- a/post/cpu/ppc4xx/ocm.c
+++ b/post/cpu/ppc4xx/ocm.c
@@ -38,19 +38,19 @@
#define OCM_TEST_PATTERN1 0x55555555
#define OCM_TEST_PATTERN2 0xAAAAAAAA
-#if CONFIG_POST & CFG_POST_OCM
+#if CONFIG_POST & CONFIG_SYS_POST_OCM
static uint ocm_status_read(void)
{
- return in_be32((void *)CFG_OCM_STATUS_ADDR) &
- CFG_OCM_STATUS_MASK;
+ return in_be32((void *)CONFIG_SYS_OCM_STATUS_ADDR) &
+ CONFIG_SYS_OCM_STATUS_MASK;
}
static void ocm_status_write(uint value)
{
- out_be32((void *)CFG_OCM_STATUS_ADDR, value |
- (in_be32((void *)CFG_OCM_STATUS_ADDR) &
- ~CFG_OCM_STATUS_MASK));
+ out_be32((void *)CONFIG_SYS_OCM_STATUS_ADDR, value |
+ (in_be32((void *)CONFIG_SYS_OCM_STATUS_ADDR) &
+ ~CONFIG_SYS_OCM_STATUS_MASK));
}
static inline int ocm_test_word(uint value, uint *address)
@@ -68,11 +68,11 @@
{
uint old_value;
int ret = 0;
- uint *address = (uint*)CFG_OCM_BASE;
+ uint *address = (uint*)CONFIG_SYS_OCM_BASE;
- if (ocm_status_read() == CFG_OCM_STATUS_OK)
+ if (ocm_status_read() == CONFIG_SYS_OCM_STATUS_OK)
return 0;
- for (; address < (uint*)(CFG_OCM_BASE + CFG_OCM_SIZE); address++) {
+ for (; address < (uint*)(CONFIG_SYS_OCM_BASE + CONFIG_SYS_OCM_SIZE); address++) {
old_value = *address;
if (ocm_test_word(OCM_TEST_PATTERN1, address) ||
ocm_test_word(OCM_TEST_PATTERN2, address)) {
@@ -83,7 +83,7 @@
}
*address = old_value;
}
- ocm_status_write(ret ? CFG_OCM_STATUS_FAIL : CFG_OCM_STATUS_OK);
+ ocm_status_write(ret ? CONFIG_SYS_OCM_STATUS_FAIL : CONFIG_SYS_OCM_STATUS_OK);
return ret;
}
-#endif /* CONFIG_POST & CFG_POST_OCM */
+#endif /* CONFIG_POST & CONFIG_SYS_POST_OCM */
diff --git a/post/cpu/ppc4xx/spr.c b/post/cpu/ppc4xx/spr.c
index 110df6e..ecb87b5 100644
--- a/post/cpu/ppc4xx/spr.c
+++ b/post/cpu/ppc4xx/spr.c
@@ -37,7 +37,7 @@
#include <post.h>
-#if CONFIG_POST & CFG_POST_SPR
+#if CONFIG_POST & CONFIG_SYS_POST_SPR
#include <asm/processor.h>
@@ -198,4 +198,4 @@
return ret;
}
-#endif /* CONFIG_POST & CFG_POST_SPR */
+#endif /* CONFIG_POST & CONFIG_SYS_POST_SPR */
diff --git a/post/cpu/ppc4xx/uart.c b/post/cpu/ppc4xx/uart.c
index 1a57c3d..84a4d0a 100644
--- a/post/cpu/ppc4xx/uart.c
+++ b/post/cpu/ppc4xx/uart.c
@@ -34,14 +34,14 @@
#include <post.h>
-#if CONFIG_POST & CFG_POST_UART
+#if CONFIG_POST & CONFIG_SYS_POST_UART
/*
* This table defines the UART's that should be tested and can
* be overridden in the board config file
*/
-#ifndef CFG_POST_UART_TABLE
-#define CFG_POST_UART_TABLE {UART0_BASE, UART1_BASE, UART2_BASE, UART3_BASE}
+#ifndef CONFIG_SYS_POST_UART_TABLE
+#define CONFIG_SYS_POST_UART_TABLE {UART0_BASE, UART1_BASE, UART2_BASE, UART3_BASE}
#endif
#include <asm/processor.h>
@@ -50,17 +50,17 @@
#if defined(CONFIG_440)
#if defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
-#define UART0_BASE CFG_PERIPHERAL_BASE + 0x00000300
-#define UART1_BASE CFG_PERIPHERAL_BASE + 0x00000400
-#define UART2_BASE CFG_PERIPHERAL_BASE + 0x00000500
-#define UART3_BASE CFG_PERIPHERAL_BASE + 0x00000600
+#define UART0_BASE CONFIG_SYS_PERIPHERAL_BASE + 0x00000300
+#define UART1_BASE CONFIG_SYS_PERIPHERAL_BASE + 0x00000400
+#define UART2_BASE CONFIG_SYS_PERIPHERAL_BASE + 0x00000500
+#define UART3_BASE CONFIG_SYS_PERIPHERAL_BASE + 0x00000600
#else
-#define UART0_BASE CFG_PERIPHERAL_BASE + 0x00000200
-#define UART1_BASE CFG_PERIPHERAL_BASE + 0x00000300
+#define UART0_BASE CONFIG_SYS_PERIPHERAL_BASE + 0x00000200
+#define UART1_BASE CONFIG_SYS_PERIPHERAL_BASE + 0x00000300
#endif
#if defined(CONFIG_440SP) || defined(CONFIG_440SPE)
-#define UART2_BASE CFG_PERIPHERAL_BASE + 0x00000600
+#define UART2_BASE CONFIG_SYS_PERIPHERAL_BASE + 0x00000600
#endif
#if defined(CONFIG_440GP)
@@ -147,7 +147,7 @@
DECLARE_GLOBAL_DATA_PTR;
#if defined(CONFIG_440) || defined(CONFIG_405EX)
-#if !defined(CFG_EXT_SERIAL_CLOCK)
+#if !defined(CONFIG_SYS_EXT_SERIAL_CLOCK)
static void serial_divs (int baudrate, unsigned long *pudiv,
unsigned short *pbdiv)
{
@@ -196,7 +196,7 @@
unsigned long udiv;
unsigned short bdiv;
volatile char val;
-#ifdef CFG_EXT_SERIAL_CLOCK
+#ifdef CONFIG_SYS_EXT_SERIAL_CLOCK
unsigned long tmp;
#endif
int i;
@@ -209,11 +209,11 @@
MFREG(UART0_SDR, reg);
reg &= ~CR0_MASK;
-#ifdef CFG_EXT_SERIAL_CLOCK
+#ifdef CONFIG_SYS_EXT_SERIAL_CLOCK
reg |= CR0_EXTCLK_ENA;
udiv = 1;
tmp = gd->baudrate * 16;
- bdiv = (CFG_EXT_SERIAL_CLOCK + tmp / 2) / tmp;
+ bdiv = (CONFIG_SYS_EXT_SERIAL_CLOCK + tmp / 2) / tmp;
#else
/* For 440, the cpu clock is on divider chain A, UART on divider
* chain B ... so cpu clock is irrelevant. Get the "optimized"
@@ -278,7 +278,7 @@
#ifdef CONFIG_405EP
reg = mfdcr(cpc0_ucr) & ~(UCR0_MASK | UCR1_MASK);
clk = gd->cpu_clk;
- tmp = CFG_BASE_BAUD * 16;
+ tmp = CONFIG_SYS_BASE_BAUD * 16;
udiv = (clk + tmp / 2) / tmp;
if (udiv > UDIV_MAX) /* max. n bits for udiv */
udiv = UDIV_MAX;
@@ -287,16 +287,16 @@
mtdcr (cpc0_ucr, reg);
#else /* CONFIG_405EP */
reg = mfdcr(cntrl0) & ~CR0_MASK;
-#ifdef CFG_EXT_SERIAL_CLOCK
- clk = CFG_EXT_SERIAL_CLOCK;
+#ifdef CONFIG_SYS_EXT_SERIAL_CLOCK
+ clk = CONFIG_SYS_EXT_SERIAL_CLOCK;
udiv = 1;
reg |= CR0_EXTCLK_ENA;
#else
clk = gd->cpu_clk;
-#ifdef CFG_405_UART_ERRATA_59
+#ifdef CONFIG_SYS_405_UART_ERRATA_59
udiv = 31; /* Errata 59: stuck at 31 */
#else
- tmp = CFG_BASE_BAUD * 16;
+ tmp = CONFIG_SYS_BASE_BAUD * 16;
udiv = (clk + tmp / 2) / tmp;
if (udiv > UDIV_MAX) /* max. n bits for udiv */
udiv = UDIV_MAX;
@@ -375,7 +375,7 @@
int uart_post_test (int flags)
{
int i, res = 0;
- static unsigned long base[] = CFG_POST_UART_TABLE;
+ static unsigned long base[] = CONFIG_SYS_POST_UART_TABLE;
for (i = 0; i < sizeof (base) / sizeof (base[0]); i++) {
if (test_ctlr (base[i], i))
@@ -386,4 +386,4 @@
return res;
}
-#endif /* CONFIG_POST & CFG_POST_UART */
+#endif /* CONFIG_POST & CONFIG_SYS_POST_UART */
diff --git a/post/cpu/ppc4xx/watchdog.c b/post/cpu/ppc4xx/watchdog.c
index 7fdecb4..221adfc 100644
--- a/post/cpu/ppc4xx/watchdog.c
+++ b/post/cpu/ppc4xx/watchdog.c
@@ -37,7 +37,7 @@
#include <post.h>
-#if CONFIG_POST & CFG_POST_WATCHDOG
+#if CONFIG_POST & CONFIG_SYS_POST_WATCHDOG
#include <watchdog.h>
@@ -65,4 +65,4 @@
}
}
-#endif /* CONFIG_POST & CFG_POST_WATCHDOG */
+#endif /* CONFIG_POST & CONFIG_SYS_POST_WATCHDOG */
diff --git a/post/drivers/i2c.c b/post/drivers/i2c.c
index f54fe99..b152dea 100644
--- a/post/drivers/i2c.c
+++ b/post/drivers/i2c.c
@@ -39,7 +39,7 @@
#include <post.h>
#include <i2c.h>
-#if CONFIG_POST & CFG_POST_I2C
+#if CONFIG_POST & CONFIG_SYS_POST_I2C
int i2c_post_test (int flags)
{
@@ -88,4 +88,4 @@
#endif
}
-#endif /* CONFIG_POST & CFG_POST_I2C */
+#endif /* CONFIG_POST & CONFIG_SYS_POST_I2C */
diff --git a/post/drivers/memory.c b/post/drivers/memory.c
index e32020f..0062360 100644
--- a/post/drivers/memory.c
+++ b/post/drivers/memory.c
@@ -153,7 +153,7 @@
#include <post.h>
#include <watchdog.h>
-#if CONFIG_POST & CFG_POST_MEMORY
+#if CONFIG_POST & CONFIG_SYS_POST_MEMORY
DECLARE_GLOBAL_DATA_PTR;
@@ -460,11 +460,11 @@
256 << 20 : bd->bi_memsize) - (1 << 20);
/* Limit area to be tested with the board info struct */
- if (CFG_SDRAM_BASE + memsize > (ulong)bd)
- memsize = (ulong)bd - CFG_SDRAM_BASE;
+ if (CONFIG_SYS_SDRAM_BASE + memsize > (ulong)bd)
+ memsize = (ulong)bd - CONFIG_SYS_SDRAM_BASE;
if (flags & POST_SLOWTEST) {
- ret = memory_post_tests (CFG_SDRAM_BASE, memsize);
+ ret = memory_post_tests (CONFIG_SYS_SDRAM_BASE, memsize);
} else { /* POST_NORMAL */
unsigned long i;
@@ -480,4 +480,4 @@
return ret;
}
-#endif /* CONFIG_POST & CFG_POST_MEMORY */
+#endif /* CONFIG_POST & CONFIG_SYS_POST_MEMORY */
diff --git a/post/drivers/rtc.c b/post/drivers/rtc.c
index 66e5265..8b0f463 100644
--- a/post/drivers/rtc.c
+++ b/post/drivers/rtc.c
@@ -43,7 +43,7 @@
#include <post.h>
#include <rtc.h>
-#if CONFIG_POST & CFG_POST_RTC
+#if CONFIG_POST & CONFIG_SYS_POST_RTC
static int rtc_post_skip (ulong * diff)
{
@@ -192,4 +192,4 @@
return 0;
}
-#endif /* CONFIG_POST & CFG_POST_RTC */
+#endif /* CONFIG_POST & CONFIG_SYS_POST_RTC */
diff --git a/post/lib_ppc/andi.c b/post/lib_ppc/andi.c
index 75ba7a6..52ec7c4 100644
--- a/post/lib_ppc/andi.c
+++ b/post/lib_ppc/andi.c
@@ -35,7 +35,7 @@
#include <post.h>
#include "cpu_asm.h"
-#if CONFIG_POST & CFG_POST_CPU
+#if CONFIG_POST & CONFIG_SYS_POST_CPU
extern void cpu_post_exec_21 (ulong *code, ulong *cr, ulong *res, ulong op);
extern ulong cpu_post_makecr (long v);
diff --git a/post/lib_ppc/asm.S b/post/lib_ppc/asm.S
index 6220ed2..f6b329a 100644
--- a/post/lib_ppc/asm.S
+++ b/post/lib_ppc/asm.S
@@ -27,7 +27,7 @@
#include <ppc_defs.h>
#include <asm/cache.h>
-#if CONFIG_POST & CFG_POST_CPU
+#if CONFIG_POST & CONFIG_SYS_POST_CPU
/* void cpu_post_exec_02 (ulong *code, ulong op1, ulong op2); */
.global cpu_post_exec_02
diff --git a/post/lib_ppc/b.c b/post/lib_ppc/b.c
index 7a2583d..492fba4 100644
--- a/post/lib_ppc/b.c
+++ b/post/lib_ppc/b.c
@@ -40,7 +40,7 @@
#include <post.h>
#include "cpu_asm.h"
-#if CONFIG_POST & CFG_POST_CPU
+#if CONFIG_POST & CONFIG_SYS_POST_CPU
extern void cpu_post_exec_11 (ulong *code, ulong *res, ulong op1);
extern void cpu_post_exec_31 (ulong *code, ulong *ctr, ulong *lr, ulong *jump,
diff --git a/post/lib_ppc/cmp.c b/post/lib_ppc/cmp.c
index 13809d4..5f6a3b9 100644
--- a/post/lib_ppc/cmp.c
+++ b/post/lib_ppc/cmp.c
@@ -39,7 +39,7 @@
#include <post.h>
#include "cpu_asm.h"
-#if CONFIG_POST & CFG_POST_CPU
+#if CONFIG_POST & CONFIG_SYS_POST_CPU
extern void cpu_post_exec_12 (ulong *code, ulong *res, ulong op1, ulong op2);
diff --git a/post/lib_ppc/cmpi.c b/post/lib_ppc/cmpi.c
index 5ecfe87..1a2fc3d 100644
--- a/post/lib_ppc/cmpi.c
+++ b/post/lib_ppc/cmpi.c
@@ -39,7 +39,7 @@
#include <post.h>
#include "cpu_asm.h"
-#if CONFIG_POST & CFG_POST_CPU
+#if CONFIG_POST & CONFIG_SYS_POST_CPU
extern void cpu_post_exec_11 (ulong *code, ulong *res, ulong op1);
diff --git a/post/lib_ppc/complex.c b/post/lib_ppc/complex.c
index 4983c51..4a3bc00 100644
--- a/post/lib_ppc/complex.c
+++ b/post/lib_ppc/complex.c
@@ -34,7 +34,7 @@
#include <post.h>
#include "cpu_asm.h"
-#if CONFIG_POST & CFG_POST_CPU
+#if CONFIG_POST & CONFIG_SYS_POST_CPU
extern int cpu_post_complex_1_asm (int a1, int a2, int a3, int a4, int n);
extern int cpu_post_complex_2_asm (int x, int n);
diff --git a/post/lib_ppc/cpu.c b/post/lib_ppc/cpu.c
index 5c7f761..3793a60 100644
--- a/post/lib_ppc/cpu.c
+++ b/post/lib_ppc/cpu.c
@@ -36,7 +36,7 @@
#include <post.h>
#include <asm/mmu.h>
-#if CONFIG_POST & CFG_POST_CPU
+#if CONFIG_POST & CONFIG_SYS_POST_CPU
extern int cpu_post_test_cmp (void);
extern int cpu_post_test_cmpi (void);
@@ -144,4 +144,4 @@
return ret;
}
-#endif /* CONFIG_POST & CFG_POST_CPU */
+#endif /* CONFIG_POST & CONFIG_SYS_POST_CPU */
diff --git a/post/lib_ppc/cr.c b/post/lib_ppc/cr.c
index 2c7976a..fbee6d5 100644
--- a/post/lib_ppc/cr.c
+++ b/post/lib_ppc/cr.c
@@ -49,7 +49,7 @@
#include <post.h>
#include "cpu_asm.h"
-#if CONFIG_POST & CFG_POST_CPU
+#if CONFIG_POST & CONFIG_SYS_POST_CPU
extern void cpu_post_exec_11 (ulong *code, ulong *res, ulong op1);
extern void cpu_post_exec_21x (ulong *code, ulong *op1, ulong *op2, ulong op3);
diff --git a/post/lib_ppc/fpu/20001122-1.c b/post/lib_ppc/fpu/20001122-1.c
index dece614..a8537fa 100644
--- a/post/lib_ppc/fpu/20001122-1.c
+++ b/post/lib_ppc/fpu/20001122-1.c
@@ -28,7 +28,7 @@
#include <post.h>
-#if CONFIG_POST & CFG_POST_FPU
+#if CONFIG_POST & CONFIG_SYS_POST_FPU
int fpu_post_test_math1 (void)
{
@@ -56,4 +56,4 @@
return 0;
}
-#endif /* CONFIG_POST & CFG_POST_FPU */
+#endif /* CONFIG_POST & CONFIG_SYS_POST_FPU */
diff --git a/post/lib_ppc/fpu/20010114-2.c b/post/lib_ppc/fpu/20010114-2.c
index 8a17217..91e3631 100644
--- a/post/lib_ppc/fpu/20010114-2.c
+++ b/post/lib_ppc/fpu/20010114-2.c
@@ -28,7 +28,7 @@
#include <post.h>
-#if CONFIG_POST & CFG_POST_FPU
+#if CONFIG_POST & CONFIG_SYS_POST_FPU
static float rintf (float x)
{
@@ -60,4 +60,4 @@
return 0;
}
-#endif /* CONFIG_POST & CFG_POST_FPU */
+#endif /* CONFIG_POST & CONFIG_SYS_POST_FPU */
diff --git a/post/lib_ppc/fpu/20010226-1.c b/post/lib_ppc/fpu/20010226-1.c
index f366252..b00386b 100644
--- a/post/lib_ppc/fpu/20010226-1.c
+++ b/post/lib_ppc/fpu/20010226-1.c
@@ -28,7 +28,7 @@
#include <post.h>
-#if CONFIG_POST & CFG_POST_FPU
+#if CONFIG_POST & CONFIG_SYS_POST_FPU
int fpu_post_test_math3 (void)
{
@@ -48,4 +48,4 @@
return 0;
}
-#endif /* CONFIG_POST & CFG_POST_FPU */
+#endif /* CONFIG_POST & CONFIG_SYS_POST_FPU */
diff --git a/post/lib_ppc/fpu/980619-1.c b/post/lib_ppc/fpu/980619-1.c
index 7f26482..ceb2b76 100644
--- a/post/lib_ppc/fpu/980619-1.c
+++ b/post/lib_ppc/fpu/980619-1.c
@@ -28,7 +28,7 @@
#include <post.h>
-#if CONFIG_POST & CFG_POST_FPU
+#if CONFIG_POST & CONFIG_SYS_POST_FPU
int fpu_post_test_math4 (void)
{
@@ -54,4 +54,4 @@
return 0;
}
-#endif /* CONFIG_POST & CFG_POST_FPU */
+#endif /* CONFIG_POST & CONFIG_SYS_POST_FPU */
diff --git a/post/lib_ppc/fpu/acc1.c b/post/lib_ppc/fpu/acc1.c
index 921282e..8a65193 100644
--- a/post/lib_ppc/fpu/acc1.c
+++ b/post/lib_ppc/fpu/acc1.c
@@ -28,7 +28,7 @@
#include <post.h>
-#if CONFIG_POST & CFG_POST_FPU
+#if CONFIG_POST & CONFIG_SYS_POST_FPU
static double func (const double *array)
{
@@ -51,4 +51,4 @@
return 0;
}
-#endif /* CONFIG_POST & CFG_POST_FPU */
+#endif /* CONFIG_POST & CONFIG_SYS_POST_FPU */
diff --git a/post/lib_ppc/fpu/compare-fp-1.c b/post/lib_ppc/fpu/compare-fp-1.c
index be8f620..ab47657 100644
--- a/post/lib_ppc/fpu/compare-fp-1.c
+++ b/post/lib_ppc/fpu/compare-fp-1.c
@@ -30,7 +30,7 @@
#include <post.h>
-#if CONFIG_POST & CFG_POST_FPU
+#if CONFIG_POST & CONFIG_SYS_POST_FPU
static int failed;
@@ -219,4 +219,4 @@
return 0;
}
-#endif /* CONFIG_POST & CFG_POST_FPU */
+#endif /* CONFIG_POST & CONFIG_SYS_POST_FPU */
diff --git a/post/lib_ppc/fpu/fpu.c b/post/lib_ppc/fpu/fpu.c
index 9ddb67a..846b76d 100644
--- a/post/lib_ppc/fpu/fpu.c
+++ b/post/lib_ppc/fpu/fpu.c
@@ -36,7 +36,7 @@
#include <post.h>
-#if CONFIG_POST & CFG_POST_FPU
+#if CONFIG_POST & CONFIG_SYS_POST_FPU
#include <watchdog.h>
@@ -86,4 +86,4 @@
return ret;
}
-#endif /* CONFIG_POST & CFG_POST_FPU */
+#endif /* CONFIG_POST & CONFIG_SYS_POST_FPU */
diff --git a/post/lib_ppc/fpu/mul-subnormal-single-1.c b/post/lib_ppc/fpu/mul-subnormal-single-1.c
index 7e6fe87..9c514e1 100644
--- a/post/lib_ppc/fpu/mul-subnormal-single-1.c
+++ b/post/lib_ppc/fpu/mul-subnormal-single-1.c
@@ -30,7 +30,7 @@
#include <post.h>
-#if CONFIG_POST & CFG_POST_FPU
+#if CONFIG_POST & CONFIG_SYS_POST_FPU
union uf
{
@@ -97,4 +97,4 @@
return 0;
}
-#endif /* CONFIG_POST & CFG_POST_FPU */
+#endif /* CONFIG_POST & CONFIG_SYS_POST_FPU */
diff --git a/post/lib_ppc/load.c b/post/lib_ppc/load.c
index eccebb7..98d4373 100644
--- a/post/lib_ppc/load.c
+++ b/post/lib_ppc/load.c
@@ -44,7 +44,7 @@
#include <post.h>
#include "cpu_asm.h"
-#if CONFIG_POST & CFG_POST_CPU
+#if CONFIG_POST & CONFIG_SYS_POST_CPU
extern void cpu_post_exec_22w (ulong *code, ulong *op1, ulong op2, ulong *op3);
extern void cpu_post_exec_21w (ulong *code, ulong *op1, ulong *op2);
diff --git a/post/lib_ppc/multi.c b/post/lib_ppc/multi.c
index 47135ab..e42a7c0 100644
--- a/post/lib_ppc/multi.c
+++ b/post/lib_ppc/multi.c
@@ -36,7 +36,7 @@
#include <post.h>
#include "cpu_asm.h"
-#if CONFIG_POST & CFG_POST_CPU
+#if CONFIG_POST & CONFIG_SYS_POST_CPU
extern void cpu_post_exec_02 (ulong *code, ulong op1, ulong op2);
diff --git a/post/lib_ppc/rlwimi.c b/post/lib_ppc/rlwimi.c
index 8662db1..fd628b3 100644
--- a/post/lib_ppc/rlwimi.c
+++ b/post/lib_ppc/rlwimi.c
@@ -35,7 +35,7 @@
#include <post.h>
#include "cpu_asm.h"
-#if CONFIG_POST & CFG_POST_CPU
+#if CONFIG_POST & CONFIG_SYS_POST_CPU
extern void cpu_post_exec_22 (ulong *code, ulong *cr, ulong *res, ulong op1,
ulong op2);
diff --git a/post/lib_ppc/rlwinm.c b/post/lib_ppc/rlwinm.c
index 4398a10..88a28c6 100644
--- a/post/lib_ppc/rlwinm.c
+++ b/post/lib_ppc/rlwinm.c
@@ -35,7 +35,7 @@
#include <post.h>
#include "cpu_asm.h"
-#if CONFIG_POST & CFG_POST_CPU
+#if CONFIG_POST & CONFIG_SYS_POST_CPU
extern void cpu_post_exec_21 (ulong *code, ulong *cr, ulong *res, ulong op1);
extern ulong cpu_post_makecr (long v);
diff --git a/post/lib_ppc/rlwnm.c b/post/lib_ppc/rlwnm.c
index c547bd7..60bcb6d 100644
--- a/post/lib_ppc/rlwnm.c
+++ b/post/lib_ppc/rlwnm.c
@@ -35,7 +35,7 @@
#include <post.h>
#include "cpu_asm.h"
-#if CONFIG_POST & CFG_POST_CPU
+#if CONFIG_POST & CONFIG_SYS_POST_CPU
extern void cpu_post_exec_22 (ulong *code, ulong *cr, ulong *res, ulong op1,
ulong op2);
diff --git a/post/lib_ppc/srawi.c b/post/lib_ppc/srawi.c
index 4a3dddb..be153ad 100644
--- a/post/lib_ppc/srawi.c
+++ b/post/lib_ppc/srawi.c
@@ -35,7 +35,7 @@
#include <post.h>
#include "cpu_asm.h"
-#if CONFIG_POST & CFG_POST_CPU
+#if CONFIG_POST & CONFIG_SYS_POST_CPU
extern void cpu_post_exec_21 (ulong *code, ulong *cr, ulong *res, ulong op);
extern ulong cpu_post_makecr (long v);
diff --git a/post/lib_ppc/store.c b/post/lib_ppc/store.c
index c96f263..1956f6b 100644
--- a/post/lib_ppc/store.c
+++ b/post/lib_ppc/store.c
@@ -44,7 +44,7 @@
#include <post.h>
#include "cpu_asm.h"
-#if CONFIG_POST & CFG_POST_CPU
+#if CONFIG_POST & CONFIG_SYS_POST_CPU
extern void cpu_post_exec_12w (ulong *code, ulong *op1, ulong op2, ulong op3);
extern void cpu_post_exec_11w (ulong *code, ulong *op1, ulong op2);
diff --git a/post/lib_ppc/string.c b/post/lib_ppc/string.c
index 3683ac9..c0ddeaf 100644
--- a/post/lib_ppc/string.c
+++ b/post/lib_ppc/string.c
@@ -36,7 +36,7 @@
#include <post.h>
#include "cpu_asm.h"
-#if CONFIG_POST & CFG_POST_CPU
+#if CONFIG_POST & CONFIG_SYS_POST_CPU
extern void cpu_post_exec_02 (ulong *code, ulong op1, ulong op2);
extern void cpu_post_exec_04 (ulong *code, ulong op1, ulong op2, ulong op3,
diff --git a/post/lib_ppc/three.c b/post/lib_ppc/three.c
index 3fa513b..7f8c1e2 100644
--- a/post/lib_ppc/three.c
+++ b/post/lib_ppc/three.c
@@ -38,7 +38,7 @@
#include <post.h>
#include "cpu_asm.h"
-#if CONFIG_POST & CFG_POST_CPU
+#if CONFIG_POST & CONFIG_SYS_POST_CPU
extern void cpu_post_exec_22 (ulong *code, ulong *cr, ulong *res, ulong op1,
ulong op2);
diff --git a/post/lib_ppc/threei.c b/post/lib_ppc/threei.c
index 89f8fc8..31953f9 100644
--- a/post/lib_ppc/threei.c
+++ b/post/lib_ppc/threei.c
@@ -37,7 +37,7 @@
#include <post.h>
#include "cpu_asm.h"
-#if CONFIG_POST & CFG_POST_CPU
+#if CONFIG_POST & CONFIG_SYS_POST_CPU
extern void cpu_post_exec_21 (ulong *code, ulong *cr, ulong *res, ulong op);
extern ulong cpu_post_makecr (long v);
diff --git a/post/lib_ppc/threex.c b/post/lib_ppc/threex.c
index 1dfcc2c..350a12a 100644
--- a/post/lib_ppc/threex.c
+++ b/post/lib_ppc/threex.c
@@ -38,7 +38,7 @@
#include <post.h>
#include "cpu_asm.h"
-#if CONFIG_POST & CFG_POST_CPU
+#if CONFIG_POST & CONFIG_SYS_POST_CPU
extern void cpu_post_exec_22 (ulong *code, ulong *cr, ulong *res, ulong op1,
ulong op2);
diff --git a/post/lib_ppc/two.c b/post/lib_ppc/two.c
index 3d6b3c0..2b11147 100644
--- a/post/lib_ppc/two.c
+++ b/post/lib_ppc/two.c
@@ -38,7 +38,7 @@
#include <post.h>
#include "cpu_asm.h"
-#if CONFIG_POST & CFG_POST_CPU
+#if CONFIG_POST & CONFIG_SYS_POST_CPU
extern void cpu_post_exec_21 (ulong *code, ulong *cr, ulong *res, ulong op1);
extern ulong cpu_post_makecr (long v);
diff --git a/post/lib_ppc/twox.c b/post/lib_ppc/twox.c
index 519b432..d6714f9 100644
--- a/post/lib_ppc/twox.c
+++ b/post/lib_ppc/twox.c
@@ -38,7 +38,7 @@
#include <post.h>
#include "cpu_asm.h"
-#if CONFIG_POST & CFG_POST_CPU
+#if CONFIG_POST & CONFIG_SYS_POST_CPU
extern void cpu_post_exec_21 (ulong *code, ulong *cr, ulong *res, ulong op1);
extern ulong cpu_post_makecr (long v);
diff --git a/post/post.c b/post/post.c
index 99dc8c9..c982e27 100644
--- a/post/post.c
+++ b/post/post.c
@@ -372,7 +372,7 @@
{
va_list args;
uint i;
- char printbuffer[CFG_PBSIZE];
+ char printbuffer[CONFIG_SYS_PBSIZE];
va_start (args, format);
@@ -448,7 +448,7 @@
unsigned long post_time_ms (unsigned long base)
{
#ifdef CONFIG_PPC
- return (unsigned long)(get_ticks () / (get_tbclk () / CFG_HZ)) - base;
+ return (unsigned long)(get_ticks () / (get_tbclk () / CONFIG_SYS_HZ)) - base;
#else
#warning "Not implemented yet"
return 0; /* Not implemented yet */
diff --git a/post/tests.c b/post/tests.c
index e88d92e..3224f00 100644
--- a/post/tests.c
+++ b/post/tests.c
@@ -21,7 +21,7 @@
* MA 02111-1307 USA
*
* Be sure to mark tests to be run before relocation as such with the
- * CFG_POST_PREREL flag so that logging is done correctly if the
+ * CONFIG_SYS_POST_PREREL flag so that logging is done correctly if the
* logbuffer support is enabled.
*/
@@ -61,7 +61,7 @@
struct post_test post_list[] =
{
-#if CONFIG_POST & CFG_POST_OCM
+#if CONFIG_POST & CONFIG_SYS_POST_OCM
{
"OCM test",
"ocm",
@@ -70,10 +70,10 @@
&ocm_post_test,
NULL,
NULL,
- CFG_POST_OCM
+ CONFIG_SYS_POST_OCM
},
#endif
-#if CONFIG_POST & CFG_POST_CACHE
+#if CONFIG_POST & CONFIG_SYS_POST_CACHE
{
"Cache test",
"cache",
@@ -82,10 +82,10 @@
&cache_post_test,
NULL,
NULL,
- CFG_POST_CACHE
+ CONFIG_SYS_POST_CACHE
},
#endif
-#if CONFIG_POST & CFG_POST_WATCHDOG
+#if CONFIG_POST & CONFIG_SYS_POST_WATCHDOG
#if defined(CONFIG_POST_WATCHDOG)
CONFIG_POST_WATCHDOG,
#else
@@ -97,11 +97,11 @@
&watchdog_post_test,
NULL,
NULL,
- CFG_POST_WATCHDOG
+ CONFIG_SYS_POST_WATCHDOG
},
#endif
#endif
-#if CONFIG_POST & CFG_POST_I2C
+#if CONFIG_POST & CONFIG_SYS_POST_I2C
{
"I2C test",
"i2c",
@@ -110,10 +110,10 @@
&i2c_post_test,
NULL,
NULL,
- CFG_POST_I2C
+ CONFIG_SYS_POST_I2C
},
#endif
-#if CONFIG_POST & CFG_POST_RTC
+#if CONFIG_POST & CONFIG_SYS_POST_RTC
{
"RTC test",
"rtc",
@@ -122,10 +122,10 @@
&rtc_post_test,
NULL,
NULL,
- CFG_POST_RTC
+ CONFIG_SYS_POST_RTC
},
#endif
-#if CONFIG_POST & CFG_POST_MEMORY
+#if CONFIG_POST & CONFIG_SYS_POST_MEMORY
{
"Memory test",
"memory",
@@ -134,10 +134,10 @@
&memory_post_test,
NULL,
NULL,
- CFG_POST_MEMORY
+ CONFIG_SYS_POST_MEMORY
},
#endif
-#if CONFIG_POST & CFG_POST_CPU
+#if CONFIG_POST & CONFIG_SYS_POST_CPU
{
"CPU test",
"cpu",
@@ -147,10 +147,10 @@
&cpu_post_test,
NULL,
NULL,
- CFG_POST_CPU
+ CONFIG_SYS_POST_CPU
},
#endif
-#if CONFIG_POST & CFG_POST_FPU
+#if CONFIG_POST & CONFIG_SYS_POST_FPU
{
"FPU test",
"fpu",
@@ -160,10 +160,10 @@
&fpu_post_test,
NULL,
NULL,
- CFG_POST_FPU
+ CONFIG_SYS_POST_FPU
},
#endif
-#if CONFIG_POST & CFG_POST_UART
+#if CONFIG_POST & CONFIG_SYS_POST_UART
{
"UART test",
"uart",
@@ -172,10 +172,10 @@
&uart_post_test,
NULL,
NULL,
- CFG_POST_UART
+ CONFIG_SYS_POST_UART
},
#endif
-#if CONFIG_POST & CFG_POST_ETHER
+#if CONFIG_POST & CONFIG_SYS_POST_ETHER
{
"ETHERNET test",
"ethernet",
@@ -184,10 +184,10 @@
ðer_post_test,
NULL,
NULL,
- CFG_POST_ETHER
+ CONFIG_SYS_POST_ETHER
},
#endif
-#if CONFIG_POST & CFG_POST_SPI
+#if CONFIG_POST & CONFIG_SYS_POST_SPI
{
"SPI test",
"spi",
@@ -196,10 +196,10 @@
&spi_post_test,
NULL,
NULL,
- CFG_POST_SPI
+ CONFIG_SYS_POST_SPI
},
#endif
-#if CONFIG_POST & CFG_POST_USB
+#if CONFIG_POST & CONFIG_SYS_POST_USB
{
"USB test",
"usb",
@@ -208,10 +208,10 @@
&usb_post_test,
NULL,
NULL,
- CFG_POST_USB
+ CONFIG_SYS_POST_USB
},
#endif
-#if CONFIG_POST & CFG_POST_SPR
+#if CONFIG_POST & CONFIG_SYS_POST_SPR
{
"SPR test",
"spr",
@@ -220,10 +220,10 @@
&spr_post_test,
NULL,
NULL,
- CFG_POST_SPR
+ CONFIG_SYS_POST_SPR
},
#endif
-#if CONFIG_POST & CFG_POST_SYSMON
+#if CONFIG_POST & CONFIG_SYS_POST_SYSMON
{
"SYSMON test",
"sysmon",
@@ -232,10 +232,10 @@
&sysmon_post_test,
&sysmon_init_f,
&sysmon_reloc,
- CFG_POST_SYSMON
+ CONFIG_SYS_POST_SYSMON
},
#endif
-#if CONFIG_POST & CFG_POST_DSP
+#if CONFIG_POST & CONFIG_SYS_POST_DSP
{
"DSP test",
"dsp",
@@ -244,10 +244,10 @@
&dsp_post_test,
NULL,
NULL,
- CFG_POST_DSP
+ CONFIG_SYS_POST_DSP
},
#endif
-#if CONFIG_POST & CFG_POST_CODEC
+#if CONFIG_POST & CONFIG_SYS_POST_CODEC
{
"CODEC test",
"codec",
@@ -256,10 +256,10 @@
&codec_post_test,
NULL,
NULL,
- CFG_POST_CODEC
+ CONFIG_SYS_POST_CODEC
},
#endif
-#if CONFIG_POST & CFG_POST_ECC
+#if CONFIG_POST & CONFIG_SYS_POST_ECC
{
"ECC test",
"ecc",
@@ -268,22 +268,22 @@
&ecc_post_test,
NULL,
NULL,
- CFG_POST_ECC
+ CONFIG_SYS_POST_ECC
},
#endif
-#if CONFIG_POST & CFG_POST_BSPEC1
+#if CONFIG_POST & CONFIG_SYS_POST_BSPEC1
CONFIG_POST_BSPEC1,
#endif
-#if CONFIG_POST & CFG_POST_BSPEC2
+#if CONFIG_POST & CONFIG_SYS_POST_BSPEC2
CONFIG_POST_BSPEC2,
#endif
-#if CONFIG_POST & CFG_POST_BSPEC3
+#if CONFIG_POST & CONFIG_SYS_POST_BSPEC3
CONFIG_POST_BSPEC3,
#endif
-#if CONFIG_POST & CFG_POST_BSPEC4
+#if CONFIG_POST & CONFIG_SYS_POST_BSPEC4
CONFIG_POST_BSPEC4,
#endif
-#if CONFIG_POST & CFG_POST_BSPEC5
+#if CONFIG_POST & CONFIG_SYS_POST_BSPEC5
CONFIG_POST_BSPEC5,
#endif
};