rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
diff --git a/board/mpl/common/common_util.c b/board/mpl/common/common_util.c
index 8454420..8990fc6 100644
--- a/board/mpl/common/common_util.c
+++ b/board/mpl/common/common_util.c
@@ -53,7 +53,7 @@
extern int mem_test(ulong start, ulong ramsize, int quiet);
#define I2C_BACKUP_ADDR 0x7C00 /* 0x200 bytes for backup */
-#define IMAGE_SIZE CFG_MONITOR_LEN /* ugly, but it works for now */
+#define IMAGE_SIZE CONFIG_SYS_MONITOR_LEN /* ugly, but it works for now */
extern flash_info_t flash_info[]; /* info for FLASH chips */
@@ -270,7 +270,7 @@
#if !defined(CONFIG_PATI)
void get_backup_values(backup_t *buf)
{
- i2c_read(CFG_DEF_EEPROM_ADDR, I2C_BACKUP_ADDR,2,(void *)buf,sizeof(backup_t));
+ i2c_read(CONFIG_SYS_DEF_EEPROM_ADDR, I2C_BACKUP_ADDR,2,(void *)buf,sizeof(backup_t));
}
void set_backup_values(int overwrite)
@@ -298,7 +298,7 @@
return;
}
back.eth_addr[20]=0;
- i2c_write(CFG_DEF_EEPROM_ADDR, I2C_BACKUP_ADDR,2,(void *)&back,sizeof(backup_t));
+ i2c_write(CONFIG_SYS_DEF_EEPROM_ADDR, I2C_BACKUP_ADDR,2,(void *)&back,sizeof(backup_t));
}
void clear_env_values(void)
@@ -308,8 +308,8 @@
memset(&back,0xff,sizeof(backup_t));
memset(env_crc,0x00,4);
- i2c_write(CFG_DEF_EEPROM_ADDR,I2C_BACKUP_ADDR,2,(void *)&back,sizeof(backup_t));
- i2c_write(CFG_DEF_EEPROM_ADDR,CONFIG_ENV_OFFSET,2,(void *)env_crc,4);
+ i2c_write(CONFIG_SYS_DEF_EEPROM_ADDR,I2C_BACKUP_ADDR,2,(void *)&back,sizeof(backup_t));
+ i2c_write(CONFIG_SYS_DEF_EEPROM_ADDR,CONFIG_ENV_OFFSET,2,(void *)env_crc,4);
}
/*
@@ -322,7 +322,7 @@
uchar buf[64];
/* read old CRC */
- eeprom_read (CFG_DEF_EEPROM_ADDR,
+ eeprom_read (CONFIG_SYS_DEF_EEPROM_ADDR,
CONFIG_ENV_OFFSET,
(uchar *)&crc, sizeof(ulong));
@@ -333,7 +333,7 @@
while (len > 0) {
int n = (len > sizeof(buf)) ? sizeof(buf) : len;
- eeprom_read (CFG_DEF_EEPROM_ADDR, CONFIG_ENV_OFFSET+off, buf, n);
+ eeprom_read (CONFIG_SYS_DEF_EEPROM_ADDR, CONFIG_ENV_OFFSET+off, buf, n);
new = crc32 (new, buf, n);
len -= n;
off += n;
@@ -362,7 +362,7 @@
len=size;
off = sizeof(long);
while (len > off) {
- eeprom_read (CFG_DEF_EEPROM_ADDR, CONFIG_ENV_OFFSET+off, &c, 1);
+ eeprom_read (CONFIG_SYS_DEF_EEPROM_ADDR, CONFIG_ENV_OFFSET+off, &c, 1);
if(c != '=') {
*name++=c;
off++;
@@ -371,7 +371,7 @@
*name++='\0';
off++;
do {
- eeprom_read (CFG_DEF_EEPROM_ADDR, CONFIG_ENV_OFFSET+off, &c, 1);
+ eeprom_read (CONFIG_SYS_DEF_EEPROM_ADDR, CONFIG_ENV_OFFSET+off, &c, 1);
*value++=c;
off++;
if(c == '\0')
@@ -485,7 +485,7 @@
}
else {
local_args[1] = NULL;
- ld_addr=CFG_LOAD_ADDR;
+ ld_addr=CONFIG_SYS_LOAD_ADDR;
result=do_fdcboot(cmdtp, 0, 1, local_args);
}
result=mpl_prg_image((uchar *)ld_addr);
@@ -519,14 +519,14 @@
result = (int)simple_strtol(argv[2], NULL, 16);
}
src=(unsigned long)&result;
- src-=CFG_MEMTEST_START;
+ src-=CONFIG_SYS_MEMTEST_START;
src-=(100*1024); /* - 100k */
src&=0xfff00000;
size=0;
do {
size++;
printf("\n\nPass %ld\n",size);
- mem_test(CFG_MEMTEST_START,src,1);
+ mem_test(CONFIG_SYS_MEMTEST_START,src,1);
if(ctrlc())
break;
if(result>0)
diff --git a/board/mpl/common/flash.c b/board/mpl/common/flash.c
index b2d4f6f..302d7a3 100644
--- a/board/mpl/common/flash.c
+++ b/board/mpl/common/flash.c
@@ -52,7 +52,7 @@
#include <mpc5xx.h>
#endif
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
+flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
/*-----------------------------------------------------------------------
* Functions
*/
@@ -89,7 +89,7 @@
* The board_init_r will fill in wrong values in the board init structure,
* but this will be fixed in the misc_init_r routine:
* bd->bi_flashstart=0-flash_info[0].size
- * bd->bi_flashsize=flash_info[0].size-CFG_MONITOR_LEN
+ * bd->bi_flashsize=flash_info[0].size-CONFIG_SYS_MONITOR_LEN
* bd->bi_flashoffset=0
*
*/
@@ -174,13 +174,13 @@
"MPS" : "Flash");
#endif /* #if !defined(CONFIG_PATI) */
/* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
+ for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
flash_info[i].flash_id = FLASH_UNKNOWN;
}
/* Static FLASH Bank configuration here - FIXME XXX */
- size_b0 = flash_get_size((vu_long *)CFG_MONITOR_BASE, &flash_info[0]);
+ size_b0 = flash_get_size((vu_long *)CONFIG_SYS_MONITOR_BASE, &flash_info[0]);
if (flash_info[0].flash_id == FLASH_UNKNOWN) {
printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
@@ -188,10 +188,10 @@
}
/* protect the bootloader */
/* Monitor protection ON by default */
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
+#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
+ CONFIG_SYS_MONITOR_BASE,
+ CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1,
&flash_info[0]);
#endif
#if !defined(CONFIG_PATI)
@@ -555,7 +555,7 @@
start = get_timer (0);
last = start;
while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
+ if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
printf ("Timeout\n");
return ERR_TIMOUT;
}
@@ -576,7 +576,7 @@
start = get_timer (0);
last = start;
while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
+ if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
printf ("Timeout\n");
return ERR_TIMOUT;
}
@@ -848,7 +848,7 @@
udelay(10);
while ((dest2[i] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080)
{
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT)
+ if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT)
return (1);
}
dest2[i] = (FLASH_WORD_SIZE)0x00FF00FF; /* return to read mode */
@@ -869,7 +869,7 @@
start = get_timer (0);
while ((dest2[i] & (FLASH_WORD_SIZE)0x00800080) !=
(data2[i] & (FLASH_WORD_SIZE)0x00800080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
+ if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
return (1);
}
}
diff --git a/board/mpl/common/isa.c b/board/mpl/common/isa.c
index 51b2773..91829d4 100644
--- a/board/mpl/common/isa.c
+++ b/board/mpl/common/isa.c
@@ -113,9 +113,9 @@
********************************************************************************/
unsigned char open_cfg_super_IO(int address)
{
- out8(CFG_ISA_IO_BASE_ADDRESS | address,0x55); /* open config */
- out8(CFG_ISA_IO_BASE_ADDRESS | address,0x20); /* set address to DEV ID */
- if(in8(CFG_ISA_IO_BASE_ADDRESS | address | 0x1)==0x40) /* ok Device ID is correct */
+ out8(CONFIG_SYS_ISA_IO_BASE_ADDRESS | address,0x55); /* open config */
+ out8(CONFIG_SYS_ISA_IO_BASE_ADDRESS | address,0x20); /* set address to DEV ID */
+ if(in8(CONFIG_SYS_ISA_IO_BASE_ADDRESS | address | 0x1)==0x40) /* ok Device ID is correct */
return TRUE;
else
return FALSE;
@@ -123,26 +123,26 @@
void close_cfg_super_IO(int address)
{
- out8(CFG_ISA_IO_BASE_ADDRESS | address,0xAA); /* close config */
+ out8(CONFIG_SYS_ISA_IO_BASE_ADDRESS | address,0xAA); /* close config */
}
unsigned char read_cfg_super_IO(int address, unsigned char function, unsigned char regaddr)
{
/* assuming config reg is open */
- out8(CFG_ISA_IO_BASE_ADDRESS | address,0x7); /* points to the function reg */
- out8(CFG_ISA_IO_BASE_ADDRESS | address | 1,function); /* set the function no */
- out8(CFG_ISA_IO_BASE_ADDRESS | address,regaddr); /* sets the address in the function */
- return in8(CFG_ISA_IO_BASE_ADDRESS | address | 1);
+ out8(CONFIG_SYS_ISA_IO_BASE_ADDRESS | address,0x7); /* points to the function reg */
+ out8(CONFIG_SYS_ISA_IO_BASE_ADDRESS | address | 1,function); /* set the function no */
+ out8(CONFIG_SYS_ISA_IO_BASE_ADDRESS | address,regaddr); /* sets the address in the function */
+ return in8(CONFIG_SYS_ISA_IO_BASE_ADDRESS | address | 1);
}
void write_cfg_super_IO(int address, unsigned char function, unsigned char regaddr, unsigned char data)
{
/* assuming config reg is open */
- out8(CFG_ISA_IO_BASE_ADDRESS | address,0x7); /* points to the function reg */
- out8(CFG_ISA_IO_BASE_ADDRESS | address | 1,function); /* set the function no */
- out8(CFG_ISA_IO_BASE_ADDRESS | address,regaddr); /* sets the address in the function */
- out8(CFG_ISA_IO_BASE_ADDRESS | address | 1,data); /* writes the data */
+ out8(CONFIG_SYS_ISA_IO_BASE_ADDRESS | address,0x7); /* points to the function reg */
+ out8(CONFIG_SYS_ISA_IO_BASE_ADDRESS | address | 1,function); /* set the function no */
+ out8(CONFIG_SYS_ISA_IO_BASE_ADDRESS | address,regaddr); /* sets the address in the function */
+ out8(CONFIG_SYS_ISA_IO_BASE_ADDRESS | address | 1,data); /* writes the data */
}
void isa_write_table(SIO_LOGDEV_TABLE *ldt,unsigned char ldev)
@@ -208,12 +208,12 @@
#define cached_imr1 (unsigned char)cached_irq_mask
#define cached_imr2 (unsigned char)(cached_irq_mask>>8)
-#define IMR_1 CFG_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT1_OCW1
-#define IMR_2 CFG_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT2_OCW1
-#define ICW1_1 CFG_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT1_ICW1
-#define ICW1_2 CFG_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT2_ICW1
-#define ICW2_1 CFG_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT1_ICW2
-#define ICW2_2 CFG_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT2_ICW2
+#define IMR_1 CONFIG_SYS_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT1_OCW1
+#define IMR_2 CONFIG_SYS_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT2_OCW1
+#define ICW1_1 CONFIG_SYS_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT1_ICW1
+#define ICW1_2 CONFIG_SYS_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT2_ICW1
+#define ICW2_1 CONFIG_SYS_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT1_ICW2
+#define ICW2_2 CONFIG_SYS_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT2_ICW2
#define ICW3_1 ICW2_1
#define ICW3_2 ICW2_2
#define ICW4_1 ICW2_1
diff --git a/board/mpl/common/kbd.c b/board/mpl/common/kbd.c
index b20b953..a457635 100644
--- a/board/mpl/common/kbd.c
+++ b/board/mpl/common/kbd.c
@@ -203,7 +203,7 @@
}
}
-#ifdef CFG_CONSOLE_OVERWRITE_ROUTINE
+#ifdef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
extern int overwrite_console (void);
#else
int overwrite_console (void)
@@ -452,22 +452,22 @@
*/
unsigned char kbd_read_status(void)
{
- return(in8(CFG_ISA_IO_BASE_ADDRESS + KDB_COMMAND_PORT));
+ return(in8(CONFIG_SYS_ISA_IO_BASE_ADDRESS + KDB_COMMAND_PORT));
}
unsigned char kbd_read_input(void)
{
- return(in8(CFG_ISA_IO_BASE_ADDRESS + KDB_DATA_PORT));
+ return(in8(CONFIG_SYS_ISA_IO_BASE_ADDRESS + KDB_DATA_PORT));
}
void kbd_write_command(unsigned char cmd)
{
- out8(CFG_ISA_IO_BASE_ADDRESS + KDB_COMMAND_PORT,cmd);
+ out8(CONFIG_SYS_ISA_IO_BASE_ADDRESS + KDB_COMMAND_PORT,cmd);
}
void kbd_write_output(unsigned char data)
{
- out8(CFG_ISA_IO_BASE_ADDRESS + KDB_DATA_PORT, data);
+ out8(CONFIG_SYS_ISA_IO_BASE_ADDRESS + KDB_DATA_PORT, data);
}
int kbd_read_data(void)
diff --git a/board/mpl/common/usb_uhci.c b/board/mpl/common/usb_uhci.c
index 666b999..ad30442 100644
--- a/board/mpl/common/usb_uhci.c
+++ b/board/mpl/common/usb_uhci.c
@@ -621,7 +621,7 @@
pci_read_config_dword(busdevfunc,PCI_BASE_ADDRESS_4,&usb_base_addr);
USB_UHCI_PRINTF("IO Base Address = 0x%lx\n",usb_base_addr);
usb_base_addr&=0xFFFFFFF0;
- usb_base_addr+=CFG_ISA_IO_BASE_ADDRESS;
+ usb_base_addr+=CONFIG_SYS_ISA_IO_BASE_ADDRESS;
rh.devnum = 0;
usb_init_skel();
reset_hc();
diff --git a/board/mpl/mip405/mip405.c b/board/mpl/mip405/mip405.c
index cf0afd1..5eb90e5 100644
--- a/board/mpl/mip405/mip405.c
+++ b/board/mpl/mip405/mip405.c
@@ -250,7 +250,7 @@
unsigned char bc;
unsigned long sdram_tim, sdram_bank;
- /*i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);*/
+ /*i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);*/
(void) get_clocks ();
gd->baudrate = 9600;
serial_init ();
@@ -320,7 +320,7 @@
serial_puts ("\n");
#endif
i = 0;
- baseaddr = CFG_SDRAM_BASE;
+ baseaddr = CONFIG_SYS_SDRAM_BASE;
while (sdram_table[i].sz != 0xff) {
if (sdram_table[i].boardtype == bc)
break;
@@ -679,7 +679,7 @@
{
/* adjust flash start and size as well as the offset */
gd->bd->bi_flashstart=0-flash_info[0].size;
- gd->bd->bi_flashsize=flash_info[0].size-CFG_MONITOR_LEN;
+ gd->bd->bi_flashsize=flash_info[0].size-CONFIG_SYS_MONITOR_LEN;
gd->bd->bi_flashoffset=0;
/* check, if RTC is running */
diff --git a/board/mpl/pati/cmd_pati.c b/board/mpl/pati/cmd_pati.c
index 91683a3..9d9531b 100644
--- a/board/mpl/pati/cmd_pati.c
+++ b/board/mpl/pati/cmd_pati.c
@@ -37,7 +37,7 @@
extern void user_led1(int led_on);
/* ------------------------------------------------------------------------- */
-#if defined(CFG_PCI_CON_DEVICE)
+#if defined(CONFIG_SYS_PCI_CON_DEVICE)
extern void pci_con_disc(void);
extern void pci_con_connect(void);
#endif
@@ -378,7 +378,7 @@
user_led1(led_on);
return 0;
}
-#if defined(CFG_PCI_CON_DEVICE)
+#if defined(CONFIG_SYS_PCI_CON_DEVICE)
if (strcmp(argv[1], "con") == 0) {
pci_con_connect();
return 0;
diff --git a/board/mpl/pati/pati.c b/board/mpl/pati/pati.c
index 0883c42..85c5af9 100644
--- a/board/mpl/pati/pati.c
+++ b/board/mpl/pati/pati.c
@@ -224,7 +224,7 @@
/* rest standard operation programmed write burst length */
/* we have a x32 bit bus to the SDRAM, so shift the addr with 2 */
lmr<<=2;
- in32(CFG_SDRAM_BASE + lmr);
+ in32(CONFIG_SYS_SDRAM_BASE + lmr);
/* ok, we're done, return SDRAM size */
return ((0x400000 << sdram_table[i].sz)); /* log2 value of 4MByte */
}
@@ -287,7 +287,7 @@
****************************************************************/
void init_ios(void)
{
- volatile immap_t * immr = (immap_t *) CFG_IMMR;
+ volatile immap_t * immr = (immap_t *) CONFIG_SYS_IMMR;
volatile sysconf5xx_t *sysconf = &immr->im_siu_conf;
unsigned long reg;
reg=sysconf->sc_sgpiocr; /* Data direction register */
@@ -304,7 +304,7 @@
void user_led0(int led_on)
{
- volatile immap_t * immr = (immap_t *) CFG_IMMR;
+ volatile immap_t * immr = (immap_t *) CONFIG_SYS_IMMR;
volatile sysconf5xx_t *sysconf = &immr->im_siu_conf;
unsigned long reg;
reg=sysconf->sc_sgpiodt2; /* Data register */
@@ -317,7 +317,7 @@
void user_led1(int led_on)
{
- volatile immap_t * immr = (immap_t *) CFG_IMMR;
+ volatile immap_t * immr = (immap_t *) CONFIG_SYS_IMMR;
volatile sysconf5xx_t *sysconf = &immr->im_siu_conf;
unsigned long reg;
reg=sysconf->sc_sgpiodt2; /* Data register */
@@ -370,7 +370,7 @@
}
-#ifdef CFG_PCI_CON_DEVICE
+#ifdef CONFIG_SYS_PCI_CON_DEVICE
/************************************************************************
* PCI Communication
*
@@ -610,9 +610,9 @@
irq_free_handler(0x02);
pci_con_connect();
}
-#endif /* #ifdef CFG_PCI_CON_DEVICE */
+#endif /* #ifdef CONFIG_SYS_PCI_CON_DEVICE */
/*
* Absolute environment address for linker file.
*/
-GEN_ABS(env_start, CONFIG_ENV_OFFSET + CFG_FLASH_BASE);
+GEN_ABS(env_start, CONFIG_ENV_OFFSET + CONFIG_SYS_FLASH_BASE);
diff --git a/board/mpl/pip405/pip405.c b/board/mpl/pip405/pip405.c
index 6cba892..3be0104 100644
--- a/board/mpl/pip405/pip405.c
+++ b/board/mpl/pip405/pip405.c
@@ -208,7 +208,7 @@
#endif
/* Read Serial Presence Detect Information */
- i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
+ i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
dataout[0] = 0;
for (i = 0; i < 128; i++)
datain[i] = 127;
@@ -386,7 +386,7 @@
/* write SDRAM timing register */
mtdcr (memcfga, mem_sdtr1);
mtdcr (memcfgd, tmp);
- baseaddr = CFG_SDRAM_BASE;
+ baseaddr = CONFIG_SYS_SDRAM_BASE;
bank_size = (((unsigned long) density) << 22) / 2;
/* insert AM value */
tmp = ((unsigned long) t->mode - 1) << 13;
@@ -663,7 +663,7 @@
{
/* adjust flash start and size as well as the offset */
gd->bd->bi_flashstart=0-flash_info[0].size;
- gd->bd->bi_flashsize=flash_info[0].size-CFG_MONITOR_LEN;
+ gd->bd->bi_flashsize=flash_info[0].size-CONFIG_SYS_MONITOR_LEN;
gd->bd->bi_flashoffset=0;
/* if PIP405 has booted from PCI, reset CCR0[24] as described in errata PCI_18 */
diff --git a/board/mpl/pip405/pip405.h b/board/mpl/pip405/pip405.h
index 5815786..704ab2c 100644
--- a/board/mpl/pip405/pip405.h
+++ b/board/mpl/pip405/pip405.h
@@ -35,7 +35,7 @@
void user_led1(unsigned char on);
-#define PLD_BASE_ADDRESS CFG_ISA_IO_BASE_ADDRESS + 0x800
+#define PLD_BASE_ADDRESS CONFIG_SYS_ISA_IO_BASE_ADDRESS + 0x800
#define PLD_PART_REG PLD_BASE_ADDRESS + 0
#define PLD_VERS_REG PLD_BASE_ADDRESS + 1
#define PLD_BOARD_CFG_REG PLD_BASE_ADDRESS + 2
diff --git a/board/mpl/vcma9/flash.c b/board/mpl/vcma9/flash.c
index 3895263..7abf9cf 100644
--- a/board/mpl/vcma9/flash.c
+++ b/board/mpl/vcma9/flash.c
@@ -30,7 +30,7 @@
#define FLASH_BANK_SIZE PHYS_FLASH_SIZE
#define MAIN_SECT_SIZE 0x10000 /* 64 KB */
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
+flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
#define CMD_READ_ARRAY 0x000000F0
@@ -41,8 +41,8 @@
#define CMD_PROGRAM 0x000000A0
#define CMD_UNLOCK_BYPASS 0x00000020
-#define MEM_FLASH_ADDR1 (*(volatile u16 *)(CFG_FLASH_BASE + (0x00000555 << 1)))
-#define MEM_FLASH_ADDR2 (*(volatile u16 *)(CFG_FLASH_BASE + (0x000002AA << 1)))
+#define MEM_FLASH_ADDR1 (*(volatile u16 *)(CONFIG_SYS_FLASH_BASE + (0x00000555 << 1)))
+#define MEM_FLASH_ADDR2 (*(volatile u16 *)(CONFIG_SYS_FLASH_BASE + (0x000002AA << 1)))
#define BIT_ERASE_DONE 0x00000080
#define BIT_RDY_MASK 0x00000080
@@ -61,7 +61,7 @@
int i, j;
ulong size = 0;
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
+ for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
ulong flashbase = 0;
flash_info[i].flash_id =
@@ -75,8 +75,8 @@
#error "Unknown flash configured"
#endif
flash_info[i].size = FLASH_BANK_SIZE;
- flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
- memset (flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
+ flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT;
+ memset (flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT);
if (i == 0)
flashbase = PHYS_FLASH_1;
else
@@ -111,8 +111,8 @@
}
flash_protect (FLAG_PROTECT_SET,
- CFG_FLASH_BASE,
- CFG_FLASH_BASE + monitor_flash_len - 1,
+ CONFIG_SYS_FLASH_BASE,
+ CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1,
&flash_info[0]);
flash_protect (FLAG_PROTECT_SET,
@@ -236,7 +236,7 @@
/* check timeout */
if (get_timer_masked () >
- CFG_FLASH_ERASE_TOUT) {
+ CONFIG_SYS_FLASH_ERASE_TOUT) {
MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
chip = TMO;
break;
@@ -331,7 +331,7 @@
result = *addr;
/* check timeout */
- if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) {
+ if (get_timer_masked () > CONFIG_SYS_FLASH_ERASE_TOUT) {
chip = ERR | TMO;
break;
}