rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
diff --git a/board/mbx8xx/csr.h b/board/mbx8xx/csr.h
index 832e924..d1a58b6 100644
--- a/board/mbx8xx/csr.h
+++ b/board/mbx8xx/csr.h
@@ -54,7 +54,7 @@
#define SR2_RDY 0x02 /* Flash programming status bit */
#define SR2_FT 0x01 /* Reserved for Factory test purposes */
-#define MBX_CSR1 (*((uchar *)CFG_CSR_BASE))
-#define MBX_CSR2 (*((uchar *)CFG_CSR_BASE + 1))
+#define MBX_CSR1 (*((uchar *)CONFIG_SYS_CSR_BASE))
+#define MBX_CSR2 (*((uchar *)CONFIG_SYS_CSR_BASE + 1))
#endif /* __csr_h */
diff --git a/board/mbx8xx/flash.c b/board/mbx8xx/flash.c
index a491f7b..2ec420d 100644
--- a/board/mbx8xx/flash.c
+++ b/board/mbx8xx/flash.c
@@ -32,7 +32,7 @@
#include <mpc8xx.h>
#include "vpd.h"
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
+flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
/*-----------------------------------------------------------------------
* Functions
@@ -51,13 +51,13 @@
ulong addr;
/* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
+ for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
flash_info[i].flash_id = FLASH_UNKNOWN;
}
totsize = 0;
addr = 0xfc000000;
- for(i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
+ for(i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
size = flash_get_size((vu_long *)addr, &flash_info[i]);
if (flash_info[i].flash_id == FLASH_UNKNOWN)
break;
@@ -66,7 +66,7 @@
}
addr = 0xfe000000;
- for(i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
+ for(i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
size = flash_get_size((vu_long *)addr, &flash_info[i]);
if (flash_info[i].flash_id == FLASH_UNKNOWN)
@@ -75,11 +75,11 @@
addr += size;
}
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
+#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
/* monitor protection ON by default */
flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
+ CONFIG_SYS_MONITOR_BASE,
+ CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1,
&flash_info[0]);
#endif
@@ -274,7 +274,7 @@
last = start;
addr = (vu_long*)(info->start[l_sect]);
while ((addr[0] & 0x80808080) != 0x80808080) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
+ if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
printf ("Timeout\n");
return 1;
}
@@ -397,7 +397,7 @@
/* data polling for D7 */
start = get_timer (0);
while ((*((vu_long *)dest) & 0x80808080) != (data & 0x80808080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
+ if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
return (1);
}
}
diff --git a/board/mbx8xx/mbx8xx.c b/board/mbx8xx/mbx8xx.c
index 414d879..af4f57d 100644
--- a/board/mbx8xx/mbx8xx.c
+++ b/board/mbx8xx/mbx8xx.c
@@ -121,7 +121,7 @@
void mbx_init (void)
{
- volatile immap_t *immr = (immap_t *) CFG_IMMR;
+ volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
volatile memctl8xx_t *memctl = &immr->im_memctl;
ulong speed, refclock, plprcr, sccr;
ulong br0_32 = memctl->memc_br0 & 0x400;
@@ -147,21 +147,21 @@
immr->im_clkrstk.cark_sccrk = KAPWR_KEY;
sccr = immr->im_clkrst.car_sccr;
sccr &= SCCR_MASK;
- sccr |= CFG_SCCR;
+ sccr |= CONFIG_SYS_SCCR;
immr->im_clkrst.car_sccr = sccr;
speed = board_get_cpufreq ();
refclock = get_reffreq ();
-#if ((CFG_PLPRCR & PLPRCR_MF_MSK) != 0)
- plprcr = CFG_PLPRCR;
+#if ((CONFIG_SYS_PLPRCR & PLPRCR_MF_MSK) != 0)
+ plprcr = CONFIG_SYS_PLPRCR;
#else
plprcr = immr->im_clkrst.car_plprcr;
plprcr &= PLPRCR_MF_MSK; /* isolate MF field */
- plprcr |= CFG_PLPRCR; /* reset control bits */
+ plprcr |= CONFIG_SYS_PLPRCR; /* reset control bits */
#endif
-#ifdef CFG_USE_OSCCLK /* See doc/README.MBX ! */
+#ifdef CONFIG_SYS_USE_OSCCLK /* See doc/README.MBX ! */
plprcr |= ((speed + refclock / 2) / refclock - 1) << 20;
#endif
@@ -181,24 +181,24 @@
case 40:
memctl->memc_br0 = 0xFE000000 | br0_32 | 1;
memctl->memc_or0 = 0xFF800930;
- memctl->memc_or4 = CFG_NVRAM_OR | 0x920;
- memctl->memc_br4 = CFG_NVRAM_BASE | 0x401;
+ memctl->memc_or4 = CONFIG_SYS_NVRAM_OR | 0x920;
+ memctl->memc_br4 = CONFIG_SYS_NVRAM_BASE | 0x401;
break;
case 50:
memctl->memc_br0 = 0xFE000000 | br0_32 | 1;
memctl->memc_or0 = 0xFF800940;
- memctl->memc_or4 = CFG_NVRAM_OR | 0x930;
- memctl->memc_br4 = CFG_NVRAM_BASE | 0x401;
+ memctl->memc_or4 = CONFIG_SYS_NVRAM_OR | 0x930;
+ memctl->memc_br4 = CONFIG_SYS_NVRAM_BASE | 0x401;
break;
default:
hang ();
break;
}
#ifdef CONFIG_USE_PCI
- memctl->memc_or5 = CFG_PCIMEM_OR;
- memctl->memc_br5 = CFG_PCIMEM_BASE | 0x001;
- memctl->memc_or6 = CFG_PCIBRIDGE_OR;
- memctl->memc_br6 = CFG_PCIBRIDGE_BASE | 0x001;
+ memctl->memc_or5 = CONFIG_SYS_PCIMEM_OR;
+ memctl->memc_br5 = CONFIG_SYS_PCIMEM_BASE | 0x001;
+ memctl->memc_or6 = CONFIG_SYS_PCIBRIDGE_OR;
+ memctl->memc_br6 = CONFIG_SYS_PCIBRIDGE_BASE | 0x001;
#endif
/*
* FIXME: I do not understand why I have to call this to
@@ -306,7 +306,7 @@
phys_size_t initdram (int board_type)
{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
+ volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;
unsigned long ram_sz = 0;
unsigned long dimm_sz = 0;
@@ -354,24 +354,24 @@
dimm_bank = dimm_sz / 2;
if (!dimm_sz) {
memctl->memc_or1 = ~(ram_sz - 1) | 0x400;
- memctl->memc_br1 = CFG_SDRAM_BASE | 0x81;
+ memctl->memc_br1 = CONFIG_SYS_SDRAM_BASE | 0x81;
memctl->memc_br2 = 0;
memctl->memc_br3 = 0;
} else if (ram_sz > dimm_bank) {
memctl->memc_or1 = ~(ram_sz - 1) | 0x400;
- memctl->memc_br1 = CFG_SDRAM_BASE | 0x81;
+ memctl->memc_br1 = CONFIG_SYS_SDRAM_BASE | 0x81;
memctl->memc_or2 = ~(dimm_bank - 1) | 0x400;
- memctl->memc_br2 = (CFG_SDRAM_BASE + ram_sz) | 0x81;
+ memctl->memc_br2 = (CONFIG_SYS_SDRAM_BASE + ram_sz) | 0x81;
memctl->memc_or3 = ~(dimm_bank - 1) | 0x400;
- memctl->memc_br3 = (CFG_SDRAM_BASE + ram_sz + dimm_bank) \
+ memctl->memc_br3 = (CONFIG_SYS_SDRAM_BASE + ram_sz + dimm_bank) \
| 0x81;
} else {
memctl->memc_or2 = ~(dimm_bank - 1) | 0x400;
- memctl->memc_br2 = CFG_SDRAM_BASE | 0x81;
+ memctl->memc_br2 = CONFIG_SYS_SDRAM_BASE | 0x81;
memctl->memc_or3 = ~(dimm_bank - 1) | 0x400;
- memctl->memc_br3 = (CFG_SDRAM_BASE + dimm_bank) | 0x81;
+ memctl->memc_br3 = (CONFIG_SYS_SDRAM_BASE + dimm_bank) | 0x81;
memctl->memc_or1 = ~(ram_sz - 1) | 0x400;
- memctl->memc_br1 = (CFG_SDRAM_BASE + dimm_sz) | 0x81;
+ memctl->memc_br1 = (CONFIG_SYS_SDRAM_BASE + dimm_sz) | 0x81;
}
}
diff --git a/board/mbx8xx/pcmcia.c b/board/mbx8xx/pcmcia.c
index a02c848..69368d8 100644
--- a/board/mbx8xx/pcmcia.c
+++ b/board/mbx8xx/pcmcia.c
@@ -88,10 +88,10 @@
udelay (10000);
- immap = (immap_t *) CFG_IMMR;
- sysp = (sysconf8xx_t *) (&(((immap_t *) CFG_IMMR)->im_siu_conf));
- pcmp = (pcmconf8xx_t *) (&(((immap_t *) CFG_IMMR)->im_pcmcia));
- cp = (cpm8xx_t *) (&(((immap_t *) CFG_IMMR)->im_cpm));
+ immap = (immap_t *) CONFIG_SYS_IMMR;
+ sysp = (sysconf8xx_t *) (&(((immap_t *) CONFIG_SYS_IMMR)->im_siu_conf));
+ pcmp = (pcmconf8xx_t *) (&(((immap_t *) CONFIG_SYS_IMMR)->im_pcmcia));
+ cp = (cpm8xx_t *) (&(((immap_t *) CONFIG_SYS_IMMR)->im_cpm));
/* clear interrupt state, and disable interrupts */
pcmp->pcmc_pscr = PCMCIA_MASK (_slot_);
diff --git a/board/mbx8xx/vpd.c b/board/mbx8xx/vpd.c
index 6f88352..3bc251d 100644
--- a/board/mbx8xx/vpd.c
+++ b/board/mbx8xx/vpd.c
@@ -47,7 +47,7 @@
#define IIC_BD_FREE (BD_IIC_START + 3*sizeof(cbd_t))
/* FIXME -- replace 0x2000 with offsetof */
-#define VPD_P ((vpd_t *)(CFG_IMMR + 0x2000 + CFG_DPRAMVPD))
+#define VPD_P ((vpd_t *)(CONFIG_SYS_IMMR + 0x2000 + CONFIG_SYS_DPRAMVPD))
/* transmit/receive buffers */
#define IIC_RX_LENGTH 128
@@ -69,7 +69,7 @@
void vpd_init(void)
{
- volatile immap_t *im = (immap_t *)CFG_IMMR;
+ volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
volatile cpm8xx_t *cp = &(im->im_cpm);
volatile i2c8xx_t *i2c = (i2c8xx_t *)&(im->im_i2c);
volatile iic_t *iip;
@@ -120,7 +120,7 @@
*/
int vpd_read(uint iic_device, uchar *buf, int count, int offset)
{
- volatile immap_t *im = (immap_t *)CFG_IMMR;
+ volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
volatile cpm8xx_t *cp = &(im->im_cpm);
volatile i2c8xx_t *i2c = (i2c8xx_t *)&(im->im_i2c);
volatile iic_t *iip;