rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
diff --git a/board/jse/flash.c b/board/jse/flash.c
index c462fe0..92acdb1 100644
--- a/board/jse/flash.c
+++ b/board/jse/flash.c
@@ -32,10 +32,10 @@
#include <ppc4xx.h>
#include <asm/processor.h>
-#if CFG_MAX_FLASH_BANKS != 1
-#error "CFG_MAX_FLASH_BANKS must be 1"
+#if CONFIG_SYS_MAX_FLASH_BANKS != 1
+#error "CONFIG_SYS_MAX_FLASH_BANKS must be 1"
#endif
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
+flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
/*-----------------------------------------------------------------------
* Functions
@@ -281,7 +281,7 @@
last = start;
while ((addr[0] & (FLASH_WORD_SIZE) 0x00800080) !=
(FLASH_WORD_SIZE) 0x00800080) {
- if ((now = get_timer (start)) > CFG_FLASH_ERASE_TOUT) {
+ if ((now = get_timer (start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
printf ("Timeout\n");
return -1;
}
@@ -510,7 +510,7 @@
while ((dest2[i] & (FLASH_WORD_SIZE) 0x00800080) !=
(data2[i] & (FLASH_WORD_SIZE) 0x00800080)) {
- if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
+ if (get_timer (start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
return (1);
}
}
diff --git a/board/jse/jse.c b/board/jse/jse.c
index 9290814..6a6b9dd 100644
--- a/board/jse/jse.c
+++ b/board/jse/jse.c
@@ -67,7 +67,7 @@
/* EBC0_B1CR: BAS=x, BS=0(1MB), BU=3(R/W), BW=0(8bits) */
mtdcr (ebccfga, pb1cr);
- mtdcr (ebccfgd, CFG_SYSTEMACE_BASE | 0x00018000);
+ mtdcr (ebccfgd, CONFIG_SYS_SYSTEMACE_BASE | 0x00018000);
/* Enable the /PerWE output as /PerWE, instead of /PCIINT. */
/* CPC0_CR1 |= PCIPW */
@@ -95,11 +95,11 @@
/* check that the SystemACE chip is alive. */
printf ("ACE: ");
- vers = readw (CFG_SYSTEMACE_BASE + 0x16);
+ vers = readw (CONFIG_SYS_SYSTEMACE_BASE + 0x16);
printf ("SystemACE %u.%u (build %u)",
(vers >> 12) & 0x0f, (vers >> 8) & 0x0f, vers & 0xff);
- status = readl (CFG_SYSTEMACE_BASE + 0x04);
+ status = readl (CONFIG_SYS_SYSTEMACE_BASE + 0x04);
#ifdef DEBUG
printf (" STATUS=0x%08x", status);
#endif
@@ -110,23 +110,23 @@
if (status & 0x04) {
/* CONTROLREG = CFGPROG */
- writew (0x1000, CFG_SYSTEMACE_BASE + 0x18);
+ writew (0x1000, CONFIG_SYS_SYSTEMACE_BASE + 0x18);
udelay (500);
/* CONTROLREG = CFGRESET */
- writew (0x0080, CFG_SYSTEMACE_BASE + 0x18);
+ writew (0x0080, CONFIG_SYS_SYSTEMACE_BASE + 0x18);
udelay (500);
- writew (0x0000, CFG_SYSTEMACE_BASE + 0x18);
+ writew (0x0000, CONFIG_SYS_SYSTEMACE_BASE + 0x18);
/* CONTROLREG = CFGSTART */
- writew (0x0020, CFG_SYSTEMACE_BASE + 0x18);
+ writew (0x0020, CONFIG_SYS_SYSTEMACE_BASE + 0x18);
- status = readl (CFG_SYSTEMACE_BASE + 0x04);
+ status = readl (CONFIG_SYS_SYSTEMACE_BASE + 0x04);
}
}
/* Wait for the SystemACE to program its chain of devices. */
while ((status & 0x84) == 0x00) {
udelay (500);
- status = readl (CFG_SYSTEMACE_BASE + 0x04);
+ status = readl (CONFIG_SYS_SYSTEMACE_BASE + 0x04);
}
if (status & 0x04)
diff --git a/board/jse/sdram.c b/board/jse/sdram.c
index 8ba6c45..a1f526d 100644
--- a/board/jse/sdram.c
+++ b/board/jse/sdram.c
@@ -151,7 +151,7 @@
/* Start memory test. */
printf ("test: %u MB - ", SDRAM_LEN / 1048576);
- sdram = (unsigned long *) CFG_SDRAM_BASE;
+ sdram = (unsigned long *) CONFIG_SYS_SDRAM_BASE;
printf ("write - ");
for (idx = 2; idx < SDRAM_LEN / 4; idx += 2) {