ARM: DT: stm32f7: add qspi pin contol node
It also removes the qspi pin configuration done during the
board initialization.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
diff --git a/arch/arm/dts/stm32f746-disco.dts b/arch/arm/dts/stm32f746-disco.dts
index 3d6002f..07e0ca7 100644
--- a/arch/arm/dts/stm32f746-disco.dts
+++ b/arch/arm/dts/stm32f746-disco.dts
@@ -93,6 +93,7 @@
};
&qspi {
+ pinctrl-0 = <&qspi_pins>;
status = "okay";
qflash0: n25q128a {
diff --git a/arch/arm/dts/stm32f746.dtsi b/arch/arm/dts/stm32f746.dtsi
index 431e79c..b2b0b5f 100644
--- a/arch/arm/dts/stm32f746.dtsi
+++ b/arch/arm/dts/stm32f746.dtsi
@@ -131,6 +131,17 @@
slew-rate = <2>;
};
};
+ qspi_pins: qspi@0{
+ pins {
+ pinmux = <STM32F746_PB2_FUNC_QUADSPI_CLK>,
+ <STM32F746_PB6_FUNC_QUADSPI_BK1_NCS>,
+ <STM32F746_PD11_FUNC_QUADSPI_BK1_IO0>,
+ <STM32F746_PD12_FUNC_QUADSPI_BK1_IO1>,
+ <STM32F746_PD13_FUNC_QUADSPI_BK1_IO3>,
+ <STM32F746_PE2_FUNC_QUADSPI_BK1_IO2>;
+ slew-rate = <2>;
+ };
+ };
};
};
};