am33xx: Move the call to ddr_pll_config, make it take the frequency
Depending on if we have DDR2 or DDR3 on the board we will need to call
ddr_pll_config with a different value. This call can be delayed
slightly to the point where we know which type of memory we have.
Signed-off-by: Tom Rini <trini@ti.com>
diff --git a/arch/arm/cpu/armv7/am33xx/clock.c b/arch/arm/cpu/armv7/am33xx/clock.c
index f068824..1071f92 100644
--- a/arch/arm/cpu/armv7/am33xx/clock.c
+++ b/arch/arm/cpu/armv7/am33xx/clock.c
@@ -246,7 +246,7 @@
;
}
-static void ddr_pll_config(void)
+void ddr_pll_config(unsigned int ddrpll_m)
{
u32 clkmode, clksel, div_m2;
@@ -264,7 +264,7 @@
;
clksel = clksel & (~CLK_SEL_MASK);
- clksel = clksel | ((DDRPLL_M << CLK_SEL_SHIFT) | DDRPLL_N);
+ clksel = clksel | ((ddrpll_m << CLK_SEL_SHIFT) | DDRPLL_N);
writel(clksel, &cmwkup->clkseldpllddr);
div_m2 = div_m2 & CLK_DIV_SEL;
@@ -298,7 +298,6 @@
mpu_pll_config();
core_pll_config();
per_pll_config();
- ddr_pll_config();
/* Enable the required interconnect clocks */
enable_interface_clocks();