commit 031003a0b18f5c4079959315cc85de37e12b8cb4
author Ed Swarthout <Ed.Swarthout@freescale.com> Fri Apr 25 01:08:32 2008 -0500
committer Wolfgang Denk <wd@denx.de> Sat Apr 26 00:25:30 2008 +0200
tree 889d2084e880f3849054538896c28943b67945a4
parent fd2896b6c08f970e84b9b773707fb15f953b2fcc

MPC8544DS: decode pcie3 end-point configuration correctly.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

board/freescale/mpc8544ds/mpc8544ds.c

diff --git a/board/freescale/mpc8544ds/mpc8544ds.c b/board/freescale/mpc8544ds/mpc8544ds.c
index 8107016..dd10af8 100644
--- a/board/freescale/mpc8544ds/mpc8544ds.c
+++ b/board/freescale/mpc8544ds/mpc8544ds.c
@@ -163,7 +163,7 @@
 	volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CFG_PCIE3_ADDR;
 	extern void fsl_pci_init(struct pci_controller *hose);
 	struct pci_controller *hose = &pcie3_hose;
-	int pcie_ep = (host_agent == 3);
+	int pcie_ep = (host_agent == 1);
 	int pcie_configured  = io_sel >= 1;
 
 	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){