tree e51ad11b501325113b0d0e58756acfbcb523b111
parent 4ff6b10aa9743ad2435889474aeec37939493e2b
author Paul Burton <paul.burton@imgtec.com> 1422494878 +0000
committer Daniel Schwierzeck <daniel.schwierzeck@gmail.com> 1422532501 +0100

MIPS: unify cache initialization code

The mips32 & mips64 cache initialization code differs only in that the
mips32 code supports reading the cache size from coprocessor 0 registers
at runtime. Move the more developed mips32 version to a common
arch/mips/lib/cache_init.S & remove the now-redundant mips64 version in
order to reduce duplication. The temporary registers used are shuffled
slightly in order to work for both mips32 & mips64 builds. The RA
register is defined differently to suit mips32 & mips64, but will be
removed by a later commit in the series after further cleanup.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>