commit 018e737ca70b45584ddb775a457380ec940fa3c4
author Svyatoslav Ryhel <clamor95@gmail.com> Tue Feb 14 19:35:32 2023 +0200
committer Tom <twarren@nvidia.com> Thu Feb 23 12:55:37 2023 -0700
tree 77d5c5984ba8d2c58b54803b5dd1e40f1c38e15c
parent b99f3df37de560018050cfd1ca3fd08c2af4f2a9

ARM: tegra: create common pre-dm i2c write

This implementation allows pwr i2c writing on early SPL
stages when DM is not yet setup.

Such writing is needed to configure main voltages of PMIC
on early SPL for bootloader to boot properly.

Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF T30
Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101 T20
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30
Tested-by: Thierry Reding <treding@nvidia.com> # T30 and T124
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Tom <twarren@nvidia.com>

arch/arm/include/asm/arch-tegra/tegra_i2c.h

diff --git a/arch/arm/include/asm/arch-tegra/tegra_i2c.h b/arch/arm/include/asm/arch-tegra/tegra_i2c.h
index c49f432..afec6bb 100644
--- a/arch/arm/include/asm/arch-tegra/tegra_i2c.h
+++ b/arch/arm/include/asm/arch-tegra/tegra_i2c.h
@@ -8,6 +8,7 @@
 #ifndef _TEGRA_I2C_H_
 #define _TEGRA_I2C_H_
 
+#include <asm/io.h>
 #include <asm/types.h>
 
 struct udevice;
@@ -154,4 +155,20 @@
  */
 int tegra_i2c_get_dvc_bus(struct udevice **busp);
 
+/* Pre-dm section used for initial setup of PMIC */
+#define I2C_SEND_2_BYTES		0x0A02
+
+static inline void tegra_i2c_ll_write(uint addr, uint data)
+{
+	struct i2c_ctlr *reg = (struct i2c_ctlr *)TEGRA_DVC_BASE;
+
+	writel(addr, &reg->cmd_addr0);
+	writel(0x2, &reg->cnfg);
+
+	writel(data, &reg->cmd_data1);
+	writel(I2C_SEND_2_BYTES, &reg->cnfg);
+}
+
+void pmic_enable_cpu_vdd(void);
+
 #endif	/* _TEGRA_I2C_H_ */