Merge patch series "Low Power Mode: Package TIFS Stub in BeaglePlay"
Dhruva Gole <d-gole@ti.com> says:
This series aims to add documentation around the boot flow and tispl
packaging details regarding the TIFS Stub. While at it, also refactors the
k3 common docs to add more labels to provide more granularity on how we
include chunks from common docs into SoC specific docs.
This series also includes the binman related changes required to package
TIFS Stub to support Low Power Modes on BeaglePlay and phycore-am625 SOM.
diff --git a/Makefile b/Makefile
index f0e6f07..2861b4d 100644
--- a/Makefile
+++ b/Makefile
@@ -3,7 +3,7 @@
VERSION = 2024
PATCHLEVEL = 10
SUBLEVEL =
-EXTRAVERSION = -rc1
+EXTRAVERSION = -rc2
NAME =
# *DOCUMENTATION*
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 82d37ad..871cfbb 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -678,6 +678,7 @@
sun50i-h6-tanix-tx6.dtb \
sun50i-h6-tanix-tx6-mini.dtb
dtb-$(CONFIG_MACH_SUN50I_H616) += \
+ sun50i-h313-tanix-tx1.dtb \
sun50i-h616-orangepi-zero2.dtb \
sun50i-h618-orangepi-zero2w.dtb \
sun50i-h618-orangepi-zero3.dtb \
diff --git a/arch/arm/dts/amd-versal2-mini.dts b/arch/arm/dts/amd-versal2-mini.dts
new file mode 100644
index 0000000..ac68577
--- /dev/null
+++ b/arch/arm/dts/amd-versal2-mini.dts
@@ -0,0 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Empty device tree for amd-versal2-mini
+ *
+ * Copyright (C) 2024, Advanced Micro Devices, Inc.
+ */
+
+/dts-v1/;
+
+/ {
+};
diff --git a/arch/arm/dts/sun50i-a64-bananapi-m64.dts b/arch/arm/dts/sun50i-a64-bananapi-m64.dts
index bf66b64..92bc4e7 100644
--- a/arch/arm/dts/sun50i-a64-bananapi-m64.dts
+++ b/arch/arm/dts/sun50i-a64-bananapi-m64.dts
@@ -53,7 +53,7 @@
};
};
- wifi_pwrseq: wifi_pwrseq {
+ wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
clocks = <&rtc CLK_OSC32K_FANOUT>;
diff --git a/arch/arm/dts/sun50i-a64-nanopi-a64.dts b/arch/arm/dts/sun50i-a64-nanopi-a64.dts
index ffc3b4c..69dfe3b 100644
--- a/arch/arm/dts/sun50i-a64-nanopi-a64.dts
+++ b/arch/arm/dts/sun50i-a64-nanopi-a64.dts
@@ -41,7 +41,7 @@
};
};
- wifi_pwrseq: wifi_pwrseq {
+ wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
clocks = <&rtc CLK_OSC32K_FANOUT>;
clock-names = "ext_clock";
diff --git a/arch/arm/dts/sun50i-a64-olinuxino.dts b/arch/arm/dts/sun50i-a64-olinuxino.dts
index 22d3502..7521766 100644
--- a/arch/arm/dts/sun50i-a64-olinuxino.dts
+++ b/arch/arm/dts/sun50i-a64-olinuxino.dts
@@ -52,7 +52,7 @@
status = "okay";
};
- wifi_pwrseq: wifi_pwrseq {
+ wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
};
diff --git a/arch/arm/dts/sun50i-a64-orangepi-win.dts b/arch/arm/dts/sun50i-a64-orangepi-win.dts
index 714a270..a037e15 100644
--- a/arch/arm/dts/sun50i-a64-orangepi-win.dts
+++ b/arch/arm/dts/sun50i-a64-orangepi-win.dts
@@ -68,7 +68,7 @@
status = "okay";
};
- wifi_pwrseq: wifi_pwrseq {
+ wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 8 GPIO_ACTIVE_LOW>; /* PL8 */
clocks = <&rtc CLK_OSC32K_FANOUT>;
diff --git a/arch/arm/dts/sun50i-a64-pinebook.dts b/arch/arm/dts/sun50i-a64-pinebook.dts
index 576eae1..1a85d5f 100644
--- a/arch/arm/dts/sun50i-a64-pinebook.dts
+++ b/arch/arm/dts/sun50i-a64-pinebook.dts
@@ -79,7 +79,7 @@
enable-active-high;
};
- wifi_pwrseq: wifi_pwrseq {
+ wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
};
diff --git a/arch/arm/dts/sun50i-a64-pinephone.dtsi b/arch/arm/dts/sun50i-a64-pinephone.dtsi
index b25e791..c62dc93 100644
--- a/arch/arm/dts/sun50i-a64-pinephone.dtsi
+++ b/arch/arm/dts/sun50i-a64-pinephone.dtsi
@@ -39,25 +39,35 @@
leds {
compatible = "gpio-leds";
- led-0 {
+ led0: led-0 {
function = LED_FUNCTION_INDICATOR;
color = <LED_COLOR_ID_BLUE>;
gpios = <&pio 3 20 GPIO_ACTIVE_HIGH>; /* PD20 */
+ retain-state-suspended;
};
- led-1 {
+ led1: led-1 {
function = LED_FUNCTION_INDICATOR;
color = <LED_COLOR_ID_GREEN>;
gpios = <&pio 3 18 GPIO_ACTIVE_HIGH>; /* PD18 */
+ retain-state-suspended;
};
- led-2 {
+ led2: led-2 {
function = LED_FUNCTION_INDICATOR;
color = <LED_COLOR_ID_RED>;
gpios = <&pio 3 19 GPIO_ACTIVE_HIGH>; /* PD19 */
+ retain-state-suspended;
};
};
+ multi-led {
+ compatible = "leds-group-multicolor";
+ color = <LED_COLOR_ID_RGB>;
+ function = LED_FUNCTION_INDICATOR;
+ leds = <&led0>, <&led1>, <&led2>;
+ };
+
reg_ps: ps-regulator {
compatible = "regulator-fixed";
regulator-name = "ps";
diff --git a/arch/arm/dts/sun50i-a64-pinetab.dts b/arch/arm/dts/sun50i-a64-pinetab.dts
index 0b2258ef..b6f4235 100644
--- a/arch/arm/dts/sun50i-a64-pinetab.dts
+++ b/arch/arm/dts/sun50i-a64-pinetab.dts
@@ -98,7 +98,7 @@
enable-active-high;
};
- wifi_pwrseq: wifi_pwrseq {
+ wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
post-power-on-delay-ms = <200>;
diff --git a/arch/arm/dts/sun50i-a64-teres-i.dts b/arch/arm/dts/sun50i-a64-teres-i.dts
index 945afdb..065b186 100644
--- a/arch/arm/dts/sun50i-a64-teres-i.dts
+++ b/arch/arm/dts/sun50i-a64-teres-i.dts
@@ -74,7 +74,7 @@
status = "okay";
};
- wifi_pwrseq: wifi_pwrseq {
+ wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
};
diff --git a/arch/arm/dts/sun50i-a64.dtsi b/arch/arm/dts/sun50i-a64.dtsi
index 2240eae..b6928cc 100644
--- a/arch/arm/dts/sun50i-a64.dtsi
+++ b/arch/arm/dts/sun50i-a64.dtsi
@@ -107,27 +107,19 @@
gpu_opp_table: opp-table-gpu {
compatible = "operating-points-v2";
- opp-120000000 {
- opp-hz = /bits/ 64 <120000000>;
- };
-
- opp-312000000 {
- opp-hz = /bits/ 64 <312000000>;
- };
-
opp-432000000 {
opp-hz = /bits/ 64 <432000000>;
};
};
- osc24M: osc24M_clk {
+ osc24M: osc24M-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <24000000>;
clock-output-names = "osc24M";
};
- osc32k: osc32k_clk {
+ osc32k: osc32k-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <32768>;
@@ -216,21 +208,21 @@
};
trips {
- cpu_alert0: cpu_alert0 {
+ cpu_alert0: cpu-alert0 {
/* milliCelsius */
temperature = <75000>;
hysteresis = <2000>;
type = "passive";
};
- cpu_alert1: cpu_alert1 {
+ cpu_alert1: cpu-alert1 {
/* milliCelsius */
temperature = <90000>;
hysteresis = <2000>;
type = "hot";
};
- cpu_crit: cpu_crit {
+ cpu_crit: cpu-crit {
/* milliCelsius */
temperature = <110000>;
hysteresis = <2000>;
diff --git a/arch/arm/dts/sun50i-h313-tanix-tx1.dts b/arch/arm/dts/sun50i-h313-tanix-tx1.dts
new file mode 100644
index 0000000..bb2cde5
--- /dev/null
+++ b/arch/arm/dts/sun50i-h313-tanix-tx1.dts
@@ -0,0 +1,183 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2024 Arm Ltd.
+ */
+
+/dts-v1/;
+
+#include "sun50i-h616.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/input/linux-event-codes.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+ model = "Tanix TX1";
+ compatible = "oranth,tanix-tx1", "allwinner,sun50i-h616";
+
+ aliases {
+ serial0 = &uart0;
+ ethernet0 = &sdio_wifi;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+
+ key {
+ label = "hidden";
+ linux,code = <BTN_0>;
+ gpios = <&pio 7 9 GPIO_ACTIVE_LOW>; /* PH9 */
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led-0 {
+ function = LED_FUNCTION_POWER;
+ color = <LED_COLOR_ID_BLUE>;
+ gpios = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */
+ default-state = "on";
+ };
+ };
+
+ wifi_pwrseq: pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ clocks = <&rtc CLK_OSC32K_FANOUT>;
+ clock-names = "ext_clock";
+ pinctrl-0 = <&x32clk_fanout_pin>;
+ pinctrl-names = "default";
+ reset-gpios = <&pio 6 18 GPIO_ACTIVE_LOW>; /* PG18 */
+ };
+
+ reg_vcc5v: vcc5v {
+ /* board wide 5V supply directly from the DC input */
+ compatible = "regulator-fixed";
+ regulator-name = "vcc-5v";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ };
+};
+
+&cpu0 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ir {
+ status = "okay";
+};
+
+&mmc1 {
+ vmmc-supply = <®_dldo1>;
+ vqmmc-supply = <®_aldo1>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ sdio_wifi: wifi@1 {
+ reg = <1>;
+ };
+};
+
+&mmc2 {
+ vmmc-supply = <®_dldo1>;
+ vqmmc-supply = <®_aldo1>;
+ bus-width = <8>;
+ non-removable;
+ max-frequency = <100000000>;
+ cap-mmc-hw-reset;
+ mmc-ddr-1_8v;
+ status = "okay";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&pio {
+ vcc-pc-supply = <®_aldo1>;
+ vcc-pf-supply = <®_dldo1>;
+ vcc-pg-supply = <®_aldo1>;
+ vcc-ph-supply = <®_dldo1>;
+ vcc-pi-supply = <®_dldo1>;
+};
+
+&r_i2c {
+ status = "okay";
+
+ axp313: pmic@36 {
+ compatible = "x-powers,axp313a";
+ reg = <0x36>;
+ #interrupt-cells = <1>;
+ interrupt-controller;
+
+ vin1-supply = <®_vcc5v>;
+ vin2-supply = <®_vcc5v>;
+ vin3-supply = <®_vcc5v>;
+
+ regulators {
+ /* Supplies VCC-PLL, so needs to be always on. */
+ reg_aldo1: aldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc1v8";
+ };
+
+ /* Supplies VCC-IO, so needs to be always on. */
+ reg_dldo1: dldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc3v3";
+ };
+
+ reg_dcdc1: dcdc1 {
+ regulator-always-on;
+ regulator-min-microvolt = <810000>;
+ regulator-max-microvolt = <990000>;
+ regulator-name = "vdd-gpu-sys";
+ };
+
+ reg_dcdc2: dcdc2 {
+ regulator-always-on;
+ regulator-min-microvolt = <810000>;
+ regulator-max-microvolt = <1120000>;
+ regulator-name = "vdd-cpu";
+ };
+
+ reg_dcdc3: dcdc3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-name = "vdd-dram";
+ };
+ };
+ };
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_ph_pins>;
+ status = "okay";
+};
+
+&usbotg {
+ dr_mode = "host"; /* USB A type receptable */
+ status = "okay";
+};
+
+&usbphy {
+ status = "okay";
+};
diff --git a/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts b/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts
index 4c3921a..b69032c 100644
--- a/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts
+++ b/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts
@@ -68,7 +68,7 @@
states = <1100000 0>, <1300000 1>;
};
- wifi_pwrseq: wifi_pwrseq {
+ wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
post-power-on-delay-ms = <200>;
diff --git a/arch/arm/dts/sun50i-h5-nanopi-r1s-h5.dts b/arch/arm/dts/sun50i-h5-nanopi-r1s-h5.dts
index a3e040d..3a7ee44 100644
--- a/arch/arm/dts/sun50i-h5-nanopi-r1s-h5.dts
+++ b/arch/arm/dts/sun50i-h5-nanopi-r1s-h5.dts
@@ -103,7 +103,7 @@
states = <1100000 0x0>, <1300000 0x1>;
};
- wifi_pwrseq: wifi_pwrseq {
+ wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
post-power-on-delay-ms = <200>;
@@ -170,7 +170,7 @@
non-removable;
status = "okay";
- rtl8189etv: sdio_wifi@1 {
+ rtl8189etv: wifi@1 {
reg = <1>;
};
};
diff --git a/arch/arm/dts/sun50i-h5-orangepi-prime.dts b/arch/arm/dts/sun50i-h5-orangepi-prime.dts
index d7f8bad..b699bb9 100644
--- a/arch/arm/dts/sun50i-h5-orangepi-prime.dts
+++ b/arch/arm/dts/sun50i-h5-orangepi-prime.dts
@@ -85,7 +85,7 @@
status = "okay";
};
- wifi_pwrseq: wifi_pwrseq {
+ wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&pio 2 14 GPIO_ACTIVE_LOW>; /* PC14 */
};
diff --git a/arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts b/arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts
index 7ec5ac8..ae85131 100644
--- a/arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts
+++ b/arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts
@@ -97,7 +97,7 @@
* Explicitly define the sdio device, so that we can add an ethernet
* alias for it (which e.g. makes u-boot set a mac-address).
*/
- rtl8189ftv: sdio_wifi@1 {
+ rtl8189ftv: wifi@1 {
reg = <1>;
};
};
diff --git a/arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts b/arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts
index 22530ac..734481e 100644
--- a/arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts
+++ b/arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts
@@ -52,7 +52,7 @@
regulator-max-microvolt = <3300000>;
};
- wifi_pwrseq: wifi_pwrseq {
+ wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&pio 0 9 GPIO_ACTIVE_LOW>; /* PA9 */
post-power-on-delay-ms = <200>;
diff --git a/arch/arm/dts/sun50i-h6-beelink-gs1.dts b/arch/arm/dts/sun50i-h6-beelink-gs1.dts
index 87432c4..529285f 100644
--- a/arch/arm/dts/sun50i-h6-beelink-gs1.dts
+++ b/arch/arm/dts/sun50i-h6-beelink-gs1.dts
@@ -34,7 +34,7 @@
};
};
- ext_osc32k: ext_osc32k_clk {
+ ext_osc32k: ext-osc32k-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <32768>;
diff --git a/arch/arm/dts/sun50i-h6-orangepi-3.dts b/arch/arm/dts/sun50i-h6-orangepi-3.dts
index f1957bb..bdcec46 100644
--- a/arch/arm/dts/sun50i-h6-orangepi-3.dts
+++ b/arch/arm/dts/sun50i-h6-orangepi-3.dts
@@ -33,7 +33,7 @@
};
};
- ext_osc32k: ext_osc32k_clk {
+ ext_osc32k: ext-osc32k-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <32768>;
diff --git a/arch/arm/dts/sun50i-h6-orangepi-lite2.dts b/arch/arm/dts/sun50i-h6-orangepi-lite2.dts
index fb31dcb..a3f65a4 100644
--- a/arch/arm/dts/sun50i-h6-orangepi-lite2.dts
+++ b/arch/arm/dts/sun50i-h6-orangepi-lite2.dts
@@ -11,7 +11,7 @@
serial1 = &uart1; /* BT-UART */
};
- wifi_pwrseq: wifi_pwrseq {
+ wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
clocks = <&rtc CLK_OSC32K_FANOUT>;
clock-names = "ext_clock";
diff --git a/arch/arm/dts/sun50i-h6-orangepi.dtsi b/arch/arm/dts/sun50i-h6-orangepi.dtsi
index a5811d5..4403769 100644
--- a/arch/arm/dts/sun50i-h6-orangepi.dtsi
+++ b/arch/arm/dts/sun50i-h6-orangepi.dtsi
@@ -32,7 +32,7 @@
};
};
- ext_osc32k: ext_osc32k_clk {
+ ext_osc32k: ext-osc32k-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <32768>;
diff --git a/arch/arm/dts/sun50i-h6-pine-h64-model-b.dts b/arch/arm/dts/sun50i-h6-pine-h64-model-b.dts
index b710f1a..66fe039 100644
--- a/arch/arm/dts/sun50i-h6-pine-h64-model-b.dts
+++ b/arch/arm/dts/sun50i-h6-pine-h64-model-b.dts
@@ -5,13 +5,13 @@
#include "sun50i-h6-pine-h64.dts"
+/delete-node/ ®_gmac_3v3;
+
/ {
model = "Pine H64 model B";
compatible = "pine64,pine-h64-model-b", "allwinner,sun50i-h6";
- /delete-node/ reg_gmac_3v3;
-
- wifi_pwrseq: wifi_pwrseq {
+ wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 1 3 GPIO_ACTIVE_LOW>; /* PM3 */
post-power-on-delay-ms = <200>;
diff --git a/arch/arm/dts/sun50i-h6-pine-h64.dts b/arch/arm/dts/sun50i-h6-pine-h64.dts
index b868ad1..bfb4657 100644
--- a/arch/arm/dts/sun50i-h6-pine-h64.dts
+++ b/arch/arm/dts/sun50i-h6-pine-h64.dts
@@ -22,7 +22,7 @@
stdout-path = "serial0:115200n8";
};
- ext_osc32k: ext_osc32k_clk {
+ ext_osc32k: ext-osc32k-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <32768>;
diff --git a/arch/arm/dts/sun50i-h6.dtsi b/arch/arm/dts/sun50i-h6.dtsi
index 09e2168..82aa567 100644
--- a/arch/arm/dts/sun50i-h6.dtsi
+++ b/arch/arm/dts/sun50i-h6.dtsi
@@ -68,7 +68,7 @@
status = "disabled";
};
- osc24M: osc24M_clk {
+ osc24M: osc24M-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <24000000>;
diff --git a/arch/arm/dts/sun50i-h616-bigtreetech-cb1.dtsi b/arch/arm/dts/sun50i-h616-bigtreetech-cb1.dtsi
index af421ba..d12b01c 100644
--- a/arch/arm/dts/sun50i-h616-bigtreetech-cb1.dtsi
+++ b/arch/arm/dts/sun50i-h616-bigtreetech-cb1.dtsi
@@ -6,6 +6,7 @@
/dts-v1/;
#include "sun50i-h616.dtsi"
+#include "sun50i-h616-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
@@ -62,6 +63,10 @@
};
};
+&cpu0 {
+ cpu-supply = <®_dcdc2>;
+};
+
&mmc0 {
vmmc-supply = <®_dldo1>;
/* Card detection pin is not connected */
diff --git a/arch/arm/dts/sun50i-h616-cpu-opp.dtsi b/arch/arm/dts/sun50i-h616-cpu-opp.dtsi
new file mode 100644
index 0000000..aca22a7
--- /dev/null
+++ b/arch/arm/dts/sun50i-h616-cpu-opp.dtsi
@@ -0,0 +1,115 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2023 Martin Botka <martin@somainline.org>
+
+/ {
+ cpu_opp_table: opp-table-cpu {
+ compatible = "allwinner,sun50i-h616-operating-points";
+ nvmem-cells = <&cpu_speed_grade>;
+ opp-shared;
+
+ opp-480000000 {
+ opp-hz = /bits/ 64 <480000000>;
+ opp-microvolt = <900000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ opp-supported-hw = <0x1f>;
+ };
+
+ opp-600000000 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-microvolt = <900000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ opp-supported-hw = <0x12>;
+ };
+
+ opp-720000000 {
+ opp-hz = /bits/ 64 <720000000>;
+ opp-microvolt = <900000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ opp-supported-hw = <0x0d>;
+ };
+
+ opp-792000000 {
+ opp-hz = /bits/ 64 <792000000>;
+ opp-microvolt-speed1 = <900000>;
+ opp-microvolt-speed4 = <940000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ opp-supported-hw = <0x12>;
+ };
+
+ opp-936000000 {
+ opp-hz = /bits/ 64 <936000000>;
+ opp-microvolt = <900000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ opp-supported-hw = <0x0d>;
+ };
+
+ opp-1008000000 {
+ opp-hz = /bits/ 64 <1008000000>;
+ opp-microvolt-speed0 = <950000>;
+ opp-microvolt-speed1 = <940000>;
+ opp-microvolt-speed2 = <950000>;
+ opp-microvolt-speed3 = <950000>;
+ opp-microvolt-speed4 = <1020000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ opp-supported-hw = <0x1f>;
+ };
+
+ opp-1104000000 {
+ opp-hz = /bits/ 64 <1104000000>;
+ opp-microvolt-speed0 = <1000000>;
+ opp-microvolt-speed2 = <1000000>;
+ opp-microvolt-speed3 = <1000000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ opp-supported-hw = <0x0d>;
+ };
+
+ opp-1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt-speed0 = <1050000>;
+ opp-microvolt-speed1 = <1020000>;
+ opp-microvolt-speed2 = <1050000>;
+ opp-microvolt-speed3 = <1050000>;
+ opp-microvolt-speed4 = <1100000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ opp-supported-hw = <0x1f>;
+ };
+
+ opp-1320000000 {
+ opp-hz = /bits/ 64 <1320000000>;
+ opp-microvolt = <1100000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ opp-supported-hw = <0x1d>;
+ };
+
+ opp-1416000000 {
+ opp-hz = /bits/ 64 <1416000000>;
+ opp-microvolt = <1100000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ opp-supported-hw = <0x0d>;
+ };
+
+ opp-1512000000 {
+ opp-hz = /bits/ 64 <1512000000>;
+ opp-microvolt-speed1 = <1100000>;
+ opp-microvolt-speed3 = <1100000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ opp-supported-hw = <0x0a>;
+ };
+ };
+};
+
+&cpu0 {
+ operating-points-v2 = <&cpu_opp_table>;
+};
+
+&cpu1 {
+ operating-points-v2 = <&cpu_opp_table>;
+};
+
+&cpu2 {
+ operating-points-v2 = <&cpu_opp_table>;
+};
+
+&cpu3 {
+ operating-points-v2 = <&cpu_opp_table>;
+};
diff --git a/arch/arm/dts/sun50i-h616-orangepi-zero2.dts b/arch/arm/dts/sun50i-h616-orangepi-zero2.dts
index b5d7139..a360d85 100644
--- a/arch/arm/dts/sun50i-h616-orangepi-zero2.dts
+++ b/arch/arm/dts/sun50i-h616-orangepi-zero2.dts
@@ -6,12 +6,17 @@
/dts-v1/;
#include "sun50i-h616-orangepi-zero.dtsi"
+#include "sun50i-h616-cpu-opp.dtsi"
/ {
model = "OrangePi Zero2";
compatible = "xunlong,orangepi-zero2", "allwinner,sun50i-h616";
};
+&cpu0 {
+ cpu-supply = <®_dcdca>;
+};
+
&emac0 {
allwinner,rx-delay-ps = <3100>;
allwinner,tx-delay-ps = <700>;
diff --git a/arch/arm/dts/sun50i-h616-x96-mate.dts b/arch/arm/dts/sun50i-h616-x96-mate.dts
index 959b6fd..26d25b5 100644
--- a/arch/arm/dts/sun50i-h616-x96-mate.dts
+++ b/arch/arm/dts/sun50i-h616-x96-mate.dts
@@ -6,6 +6,7 @@
/dts-v1/;
#include "sun50i-h616.dtsi"
+#include "sun50i-h616-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
@@ -32,6 +33,10 @@
};
};
+&cpu0 {
+ cpu-supply = <®_dcdca>;
+};
+
&ehci0 {
status = "okay";
};
diff --git a/arch/arm/dts/sun50i-h616.dtsi b/arch/arm/dts/sun50i-h616.dtsi
index b2e85e5..921d5f6 100644
--- a/arch/arm/dts/sun50i-h616.dtsi
+++ b/arch/arm/dts/sun50i-h616.dtsi
@@ -26,6 +26,7 @@
reg = <0>;
enable-method = "psci";
clocks = <&ccu CLK_CPUX>;
+ #cooling-cells = <2>;
};
cpu1: cpu@1 {
@@ -34,6 +35,7 @@
reg = <1>;
enable-method = "psci";
clocks = <&ccu CLK_CPUX>;
+ #cooling-cells = <2>;
};
cpu2: cpu@2 {
@@ -42,6 +44,7 @@
reg = <2>;
enable-method = "psci";
clocks = <&ccu CLK_CPUX>;
+ #cooling-cells = <2>;
};
cpu3: cpu@3 {
@@ -50,6 +53,7 @@
reg = <3>;
enable-method = "psci";
clocks = <&ccu CLK_CPUX>;
+ #cooling-cells = <2>;
};
};
@@ -156,6 +160,10 @@
ths_calibration: thermal-sensor-calibration@14 {
reg = <0x14 0x8>;
};
+
+ cpu_speed_grade: cpu-speed-grade@0 {
+ reg = <0x0 2>;
+ };
};
watchdog: watchdog@30090a0 {
@@ -194,7 +202,7 @@
};
i2c0_pins: i2c0-pins {
- pins = "PI6", "PI7";
+ pins = "PI5", "PI6";
function = "i2c0";
};
@@ -775,6 +783,15 @@
#reset-cells = <1>;
};
+ nmi_intc: interrupt-controller@7010320 {
+ compatible = "allwinner,sun50i-h616-nmi",
+ "allwinner,sun9i-a80-nmi";
+ reg = <0x07010320 0xc>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
r_pio: pinctrl@7022000 {
compatible = "allwinner,sun50i-h616-r-pinctrl";
reg = <0x07022000 0x400>;
diff --git a/arch/arm/dts/sun50i-h618-longan-module-3h.dtsi b/arch/arm/dts/sun50i-h618-longan-module-3h.dtsi
index 8c1263a..e92d150 100644
--- a/arch/arm/dts/sun50i-h618-longan-module-3h.dtsi
+++ b/arch/arm/dts/sun50i-h618-longan-module-3h.dtsi
@@ -4,6 +4,11 @@
*/
#include "sun50i-h616.dtsi"
+#include "sun50i-h616-cpu-opp.dtsi"
+
+&cpu0 {
+ cpu-supply = <®_dcdc2>;
+};
&mmc2 {
pinctrl-names = "default";
diff --git a/arch/arm/dts/sun50i-h618-orangepi-zero2w.dts b/arch/arm/dts/sun50i-h618-orangepi-zero2w.dts
index 21ca197..6a4f0da 100644
--- a/arch/arm/dts/sun50i-h618-orangepi-zero2w.dts
+++ b/arch/arm/dts/sun50i-h618-orangepi-zero2w.dts
@@ -6,6 +6,7 @@
/dts-v1/;
#include "sun50i-h616.dtsi"
+#include "sun50i-h616-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
@@ -53,6 +54,10 @@
};
};
+&cpu0 {
+ cpu-supply = <®_dcdc2>;
+};
+
&ehci1 {
status = "okay";
};
diff --git a/arch/arm/dts/sun50i-h618-orangepi-zero3.dts b/arch/arm/dts/sun50i-h618-orangepi-zero3.dts
index b3b1b86..e1cd757 100644
--- a/arch/arm/dts/sun50i-h618-orangepi-zero3.dts
+++ b/arch/arm/dts/sun50i-h618-orangepi-zero3.dts
@@ -6,12 +6,17 @@
/dts-v1/;
#include "sun50i-h616-orangepi-zero.dtsi"
+#include "sun50i-h616-cpu-opp.dtsi"
/ {
model = "OrangePi Zero3";
compatible = "xunlong,orangepi-zero3", "allwinner,sun50i-h618";
};
+&cpu0 {
+ cpu-supply = <®_dcdc2>;
+};
+
&emac0 {
allwinner,tx-delay-ps = <700>;
phy-mode = "rgmii-rxid";
diff --git a/arch/arm/dts/sun50i-h618-transpeed-8k618-t.dts b/arch/arm/dts/sun50i-h618-transpeed-8k618-t.dts
index ac0a2b7..d6631bf 100644
--- a/arch/arm/dts/sun50i-h618-transpeed-8k618-t.dts
+++ b/arch/arm/dts/sun50i-h618-transpeed-8k618-t.dts
@@ -6,6 +6,7 @@
/dts-v1/;
#include "sun50i-h616.dtsi"
+#include "sun50i-h616-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
@@ -41,7 +42,7 @@
regulator-always-on;
};
- wifi_pwrseq: wifi_pwrseq {
+ wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
clocks = <&rtc CLK_OSC32K_FANOUT>;
clock-names = "ext_clock";
@@ -51,6 +52,10 @@
};
};
+&cpu0 {
+ cpu-supply = <®_dcdc2>;
+};
+
&ehci0 {
status = "okay";
};
diff --git a/arch/arm/dts/sun50i-h64-remix-mini-pc.dts b/arch/arm/dts/sun50i-h64-remix-mini-pc.dts
index c1a15d6..464a307 100644
--- a/arch/arm/dts/sun50i-h64-remix-mini-pc.dts
+++ b/arch/arm/dts/sun50i-h64-remix-mini-pc.dts
@@ -42,7 +42,7 @@
regulator-always-on;
};
- wifi_pwrseq: wifi_pwrseq {
+ wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
post-power-on-delay-ms = <200>;
diff --git a/arch/arm/dts/sun50i-h700-anbernic-rg35xx-2024.dts b/arch/arm/dts/sun50i-h700-anbernic-rg35xx-2024.dts
new file mode 100644
index 0000000..ee30584
--- /dev/null
+++ b/arch/arm/dts/sun50i-h700-anbernic-rg35xx-2024.dts
@@ -0,0 +1,327 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+/*
+ * Copyright (C) 2024 Ryan Walklin <ryan@testtoast.com>.
+ */
+
+/dts-v1/;
+
+#include "sun50i-h616.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/linux-event-codes.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+ model = "Anbernic RG35XX 2024";
+ chassis-type = "handset";
+ compatible = "anbernic,rg35xx-2024", "allwinner,sun50i-h700";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ gpio_keys_gamepad: gpio-keys-gamepad {
+ compatible = "gpio-keys";
+
+ button-a {
+ label = "Action-Pad A";
+ gpios = <&pio 0 0 GPIO_ACTIVE_LOW>; /* PA0 */
+ linux,input-type = <EV_KEY>;
+ linux,code = <BTN_EAST>;
+ };
+
+ button-b {
+ label = "Action-Pad B";
+ gpios = <&pio 0 1 GPIO_ACTIVE_LOW>; /* PA1 */
+ linux,input-type = <EV_KEY>;
+ linux,code = <BTN_SOUTH>;
+ };
+
+ button-down {
+ label = "D-Pad Down";
+ gpios = <&pio 4 0 GPIO_ACTIVE_LOW>; /* PE0 */
+ linux,input-type = <EV_KEY>;
+ linux,code = <BTN_DPAD_DOWN>;
+ };
+
+ button-l1 {
+ label = "Key L1";
+ gpios = <&pio 0 10 GPIO_ACTIVE_LOW>; /* PA10 */
+ linux,input-type = <EV_KEY>;
+ linux,code = <BTN_TL>;
+ };
+
+ button-l2 {
+ label = "Key L2";
+ gpios = <&pio 0 11 GPIO_ACTIVE_LOW>; /* PA11 */
+ linux,input-type = <EV_KEY>;
+ linux,code = <BTN_TL2>;
+ };
+
+ button-left {
+ label = "D-Pad left";
+ gpios = <&pio 0 8 GPIO_ACTIVE_LOW>; /* PA8 */
+ linux,input-type = <EV_KEY>;
+ linux,code = <BTN_DPAD_LEFT>;
+ };
+
+ button-menu {
+ label = "Key Menu";
+ gpios = <&pio 4 3 GPIO_ACTIVE_LOW>; /* PE3 */
+ linux,input-type = <EV_KEY>;
+ linux,code = <BTN_MODE>;
+ };
+
+ button-r1 {
+ label = "Key R1";
+ gpios = <&pio 0 12 GPIO_ACTIVE_LOW>; /* PA12 */
+ linux,input-type = <EV_KEY>;
+ linux,code = <BTN_TR>;
+ };
+
+ button-r2 {
+ label = "Key R2";
+ gpios = <&pio 0 7 GPIO_ACTIVE_LOW>; /* PA7 */
+ linux,input-type = <EV_KEY>;
+ linux,code = <BTN_TR2>;
+ };
+
+ button-right {
+ label = "D-Pad Right";
+ gpios = <&pio 0 9 GPIO_ACTIVE_LOW>; /* PA9 */
+ linux,input-type = <EV_KEY>;
+ linux,code = <BTN_DPAD_RIGHT>;
+ };
+
+ button-select {
+ label = "Key Select";
+ gpios = <&pio 0 5 GPIO_ACTIVE_LOW>; /* PA5 */
+ linux,input-type = <EV_KEY>;
+ linux,code = <BTN_SELECT>;
+ };
+ button-start {
+ label = "Key Start";
+ gpios = <&pio 0 4 GPIO_ACTIVE_LOW>; /* PA4 */
+ linux,input-type = <EV_KEY>;
+ linux,code = <BTN_START>;
+ };
+
+ button-up {
+ label = "D-Pad Up";
+ gpios = <&pio 0 6 GPIO_ACTIVE_LOW>; /* PA6 */
+ linux,input-type = <EV_KEY>;
+ linux,code = <BTN_DPAD_UP>;
+ };
+
+ button-x {
+ label = "Action-Pad X";
+ gpios = <&pio 0 3 GPIO_ACTIVE_LOW>; /* PA3 */
+ linux,input-type = <EV_KEY>;
+ linux,code = <BTN_NORTH>;
+ };
+
+ button-y {
+ label = "Action Pad Y";
+ gpios = <&pio 0 2 GPIO_ACTIVE_LOW>; /* PA2 */
+ linux,input-type = <EV_KEY>;
+ linux,code = <BTN_WEST>;
+ };
+ };
+
+ gpio-keys-volume {
+ compatible = "gpio-keys";
+ autorepeat;
+
+ button-vol-up {
+ label = "Key Volume Up";
+ gpios = <&pio 4 1 GPIO_ACTIVE_LOW>; /* PE1 */
+ linux,input-type = <EV_KEY>;
+ linux,code = <KEY_VOLUMEUP>;
+ };
+
+ button-vol-down {
+ label = "Key Volume Down";
+ gpios = <&pio 4 2 GPIO_ACTIVE_LOW>; /* PE2 */
+ linux,input-type = <EV_KEY>;
+ linux,code = <KEY_VOLUMEDOWN>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led-0 {
+ function = LED_FUNCTION_POWER;
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&pio 8 12 GPIO_ACTIVE_HIGH>; /* PI12 */
+ default-state = "on";
+ };
+ };
+
+ reg_vcc5v: regulator-vcc5v { /* USB-C power input */
+ compatible = "regulator-fixed";
+ regulator-name = "vcc-5v";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ };
+};
+
+&cpu0 {
+ cpu-supply = <®_dcdc1>;
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&mmc0 {
+ vmmc-supply = <®_cldo3>;
+ disable-wp;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ bus-width = <4>;
+ status = "okay";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&pio {
+ vcc-pa-supply = <®_cldo3>;
+ vcc-pc-supply = <®_cldo3>;
+ vcc-pe-supply = <®_cldo3>;
+ vcc-pf-supply = <®_cldo3>;
+ vcc-pg-supply = <®_aldo4>;
+ vcc-ph-supply = <®_cldo3>;
+ vcc-pi-supply = <®_cldo3>;
+};
+
+&r_rsb {
+ status = "okay";
+
+ axp717: pmic@3a3 {
+ compatible = "x-powers,axp717";
+ reg = <0x3a3>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ interrupt-parent = <&nmi_intc>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+
+ vin1-supply = <®_vcc5v>;
+ vin2-supply = <®_vcc5v>;
+ vin3-supply = <®_vcc5v>;
+ vin4-supply = <®_vcc5v>;
+
+ regulators {
+ reg_dcdc1: dcdc1 {
+ regulator-always-on;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-name = "vdd-cpu";
+ };
+
+ reg_dcdc2: dcdc2 {
+ regulator-always-on;
+ regulator-min-microvolt = <940000>;
+ regulator-max-microvolt = <940000>;
+ regulator-name = "vdd-gpu-sys";
+ };
+
+ reg_dcdc3: dcdc3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-name = "vdd-dram";
+ };
+
+ reg_aldo1: aldo1 {
+ /* 1.8v - unused */
+ };
+
+ reg_aldo2: aldo2 {
+ /* 1.8v - unused */
+ };
+
+ reg_aldo3: aldo3 {
+ /* 1.8v - unused */
+ };
+
+ reg_aldo4: aldo4 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-pg";
+ };
+
+ reg_bldo1: bldo1 {
+ /* 1.8v - unused */
+ };
+
+ reg_bldo2: bldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-pll";
+ };
+
+ reg_bldo3: bldo3 {
+ /* 2.8v - unused */
+ };
+
+ reg_bldo4: bldo4 {
+ /* 1.2v - unused */
+ };
+
+ reg_cldo1: cldo1 {
+ /* 3.3v - audio codec - not yet implemented */
+ };
+
+ reg_cldo2: cldo2 {
+ /* 3.3v - unused */
+ };
+
+ reg_cldo3: cldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-io";
+ };
+
+ reg_cldo4: cldo4 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi";
+ };
+
+ reg_boost: boost {
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5200000>;
+ regulator-name = "boost";
+ };
+
+ reg_cpusldo: cpusldo {
+ /* unused */
+ };
+ };
+ };
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_ph_pins>;
+ status = "okay";
+};
+
+/* the AXP717 has USB type-C role switch functionality, not yet described by the binding */
+&usbotg {
+ dr_mode = "peripheral"; /* USB type-C receptable */
+ status = "okay";
+};
+
+&usbphy {
+ status = "okay";
+};
diff --git a/arch/arm/dts/sun50i-h700-anbernic-rg35xx-h.dts b/arch/arm/dts/sun50i-h700-anbernic-rg35xx-h.dts
new file mode 100644
index 0000000..6303625
--- /dev/null
+++ b/arch/arm/dts/sun50i-h700-anbernic-rg35xx-h.dts
@@ -0,0 +1,36 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+/*
+ * Copyright (C) 2024 Ryan Walklin <ryan@testtoast.com>.
+ * Copyright (C) 2024 Chris Morgan <macroalpha82@gmail.com>.
+ */
+
+#include "sun50i-h700-anbernic-rg35xx-plus.dts"
+
+/ {
+ model = "Anbernic RG35XX H";
+ compatible = "anbernic,rg35xx-h", "allwinner,sun50i-h700";
+};
+
+&gpio_keys_gamepad {
+ button-thumbl {
+ label = "GPIO Thumb Left";
+ gpios = <&pio 4 8 GPIO_ACTIVE_LOW>; /* PE8 */
+ linux,input-type = <EV_KEY>;
+ linux,code = <BTN_THUMBL>;
+ };
+
+ button-thumbr {
+ label = "GPIO Thumb Right";
+ gpios = <&pio 4 9 GPIO_ACTIVE_LOW>; /* PE9 */
+ linux,input-type = <EV_KEY>;
+ linux,code = <BTN_THUMBR>;
+ };
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
diff --git a/arch/arm/dts/sun50i-h700-anbernic-rg35xx-plus.dts b/arch/arm/dts/sun50i-h700-anbernic-rg35xx-plus.dts
new file mode 100644
index 0000000..60a8e49
--- /dev/null
+++ b/arch/arm/dts/sun50i-h700-anbernic-rg35xx-plus.dts
@@ -0,0 +1,53 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+/*
+ * Copyright (C) 2024 Ryan Walklin <ryan@testtoast.com>.
+ */
+
+#include "sun50i-h700-anbernic-rg35xx-2024.dts"
+
+/ {
+ model = "Anbernic RG35XX Plus";
+ compatible = "anbernic,rg35xx-plus", "allwinner,sun50i-h700";
+
+ wifi_pwrseq: pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ clocks = <&rtc CLK_OSC32K_FANOUT>;
+ clock-names = "ext_clock";
+ pinctrl-0 = <&x32clk_fanout_pin>;
+ pinctrl-names = "default";
+ post-power-on-delay-ms = <200>;
+ reset-gpios = <&pio 6 18 GPIO_ACTIVE_LOW>; /* PG18 */
+ };
+};
+
+/* SDIO WiFi RTL8821CS */
+&mmc1 {
+ vmmc-supply = <®_cldo4>;
+ vqmmc-supply = <®_aldo4>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ sdio_wifi: wifi@1 {
+ reg = <1>;
+ interrupt-parent = <&pio>;
+ interrupts = <6 15 IRQ_TYPE_LEVEL_LOW>; /* PG15 */
+ interrupt-names = "host-wake";
+ };
+};
+
+/* Bluetooth RTL8821CS */
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
+ uart-has-rtscts;
+ status = "okay";
+
+ bluetooth {
+ compatible = "realtek,rtl8821cs-bt", "realtek,rtl8723bs-bt";
+ device-wake-gpios = <&pio 6 17 GPIO_ACTIVE_HIGH>; /* PG17 */
+ enable-gpios = <&pio 6 19 GPIO_ACTIVE_HIGH>; /* PG19 */
+ host-wake-gpios = <&pio 6 16 GPIO_ACTIVE_HIGH>; /* PG16 */
+ };
+};
diff --git a/arch/arm/dts/sun5i-a13.dtsi b/arch/arm/dts/sun5i-a13.dtsi
index 3325ab0..2c9152b 100644
--- a/arch/arm/dts/sun5i-a13.dtsi
+++ b/arch/arm/dts/sun5i-a13.dtsi
@@ -62,14 +62,14 @@
};
trips {
- cpu_alert0: cpu_alert0 {
+ cpu_alert0: cpu-alert0 {
/* milliCelsius */
temperature = <85000>;
hysteresis = <2000>;
type = "passive";
};
- cpu_crit: cpu_crit {
+ cpu_crit: cpu-crit {
/* milliCelsius */
temperature = <100000>;
hysteresis = <2000>;
diff --git a/arch/arm/dts/sun5i-gr8-chip-pro.dts b/arch/arm/dts/sun5i-gr8-chip-pro.dts
index 5c3562b..ffbd99c 100644
--- a/arch/arm/dts/sun5i-gr8-chip-pro.dts
+++ b/arch/arm/dts/sun5i-gr8-chip-pro.dts
@@ -77,7 +77,7 @@
};
};
- mmc0_pwrseq: mmc0_pwrseq {
+ mmc0_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&pio 1 10 GPIO_ACTIVE_LOW>; /* PB10 */
};
diff --git a/arch/arm/dts/sun5i-r8-chip.dts b/arch/arm/dts/sun5i-r8-chip.dts
index 4192c23..8c784a2 100644
--- a/arch/arm/dts/sun5i-r8-chip.dts
+++ b/arch/arm/dts/sun5i-r8-chip.dts
@@ -77,7 +77,7 @@
};
};
- mmc0_pwrseq: mmc0_pwrseq {
+ mmc0_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&pio 2 19 GPIO_ACTIVE_LOW>; /* PC19 */
};
diff --git a/arch/arm/dts/sun6i-a31-hummingbird.dts b/arch/arm/dts/sun6i-a31-hummingbird.dts
index 486cec6..41955fe 100644
--- a/arch/arm/dts/sun6i-a31-hummingbird.dts
+++ b/arch/arm/dts/sun6i-a31-hummingbird.dts
@@ -109,7 +109,7 @@
};
};
- reg_vga_3v3: vga_3v3_regulator {
+ reg_vga_3v3: vga-3v3-regulator {
compatible = "regulator-fixed";
regulator-name = "vga-3v3";
regulator-min-microvolt = <3300000>;
@@ -119,7 +119,7 @@
gpio = <&pio 7 25 GPIO_ACTIVE_HIGH>; /* PH25 */
};
- wifi_pwrseq: wifi_pwrseq {
+ wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&pio 6 10 GPIO_ACTIVE_LOW>; /* PG10 */
};
diff --git a/arch/arm/dts/sun6i-a31.dtsi b/arch/arm/dts/sun6i-a31.dtsi
index b32d2ab..a65c09e 100644
--- a/arch/arm/dts/sun6i-a31.dtsi
+++ b/arch/arm/dts/sun6i-a31.dtsi
@@ -179,14 +179,14 @@
};
trips {
- cpu_alert0: cpu_alert0 {
+ cpu_alert0: cpu-alert0 {
/* milliCelsius */
temperature = <70000>;
hysteresis = <2000>;
type = "passive";
};
- cpu_crit: cpu_crit {
+ cpu_crit: cpu-crit {
/* milliCelsius */
temperature = <100000>;
hysteresis = <2000>;
@@ -1315,7 +1315,7 @@
compatible = "allwinner,sun6i-a31-prcm";
reg = <0x01f01400 0x200>;
- ar100: ar100_clk {
+ ar100: ar100-clk {
compatible = "allwinner,sun6i-a31-ar100-clk";
#clock-cells = <0>;
clocks = <&rtc CLK_OSC32K>, <&osc24M>,
@@ -1324,7 +1324,7 @@
clock-output-names = "ar100";
};
- ahb0: ahb0_clk {
+ ahb0: ahb0-clk {
compatible = "fixed-factor-clock";
#clock-cells = <0>;
clock-div = <1>;
@@ -1333,14 +1333,14 @@
clock-output-names = "ahb0";
};
- apb0: apb0_clk {
+ apb0: apb0-clk {
compatible = "allwinner,sun6i-a31-apb0-clk";
#clock-cells = <0>;
clocks = <&ahb0>;
clock-output-names = "apb0";
};
- apb0_gates: apb0_gates_clk {
+ apb0_gates: apb0-gates-clk {
compatible = "allwinner,sun6i-a31-apb0-gates-clk";
#clock-cells = <1>;
clocks = <&apb0>;
@@ -1350,14 +1350,14 @@
"apb0_i2c";
};
- ir_clk: ir_clk {
+ ir_clk: ir-clk {
#clock-cells = <0>;
compatible = "allwinner,sun4i-a10-mod0-clk";
clocks = <&rtc CLK_OSC32K>, <&osc24M>;
clock-output-names = "ir";
};
- apb0_rst: apb0_rst {
+ apb0_rst: apb0-rst {
compatible = "allwinner,sun6i-a31-clock-reset";
#reset-cells = <1>;
};
diff --git a/arch/arm/dts/sun6i-a31s-sinovoip-bpi-m2.dts b/arch/arm/dts/sun6i-a31s-sinovoip-bpi-m2.dts
index efb25b9..2f3d93e 100644
--- a/arch/arm/dts/sun6i-a31s-sinovoip-bpi-m2.dts
+++ b/arch/arm/dts/sun6i-a31s-sinovoip-bpi-m2.dts
@@ -75,7 +75,7 @@
};
};
- mmc2_pwrseq: mmc2_pwrseq {
+ mmc2_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 8 GPIO_ACTIVE_LOW>; /* PL8 WIFI_EN */
};
diff --git a/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts b/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts
index caa935c..f2d7fab 100644
--- a/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts
+++ b/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts
@@ -86,7 +86,7 @@
};
};
- mmc3_pwrseq: mmc3_pwrseq {
+ mmc3_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&pio 7 22 GPIO_ACTIVE_LOW>; /* PH22 WL-PMU-EN */
};
diff --git a/arch/arm/dts/sun7i-a20-cubietruck.dts b/arch/arm/dts/sun7i-a20-cubietruck.dts
index 52160e3..be9b31d 100644
--- a/arch/arm/dts/sun7i-a20-cubietruck.dts
+++ b/arch/arm/dts/sun7i-a20-cubietruck.dts
@@ -96,7 +96,7 @@
};
};
- mmc3_pwrseq: mmc3_pwrseq {
+ mmc3_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&pio 7 9 GPIO_ACTIVE_LOW>; /* PH9 WIFI_EN */
clocks = <&ccu CLK_OUT_A>;
diff --git a/arch/arm/dts/sun7i-a20-hummingbird.dts b/arch/arm/dts/sun7i-a20-hummingbird.dts
index 3def2a3..f1e26b7 100644
--- a/arch/arm/dts/sun7i-a20-hummingbird.dts
+++ b/arch/arm/dts/sun7i-a20-hummingbird.dts
@@ -65,7 +65,7 @@
stdout-path = "serial0:115200n8";
};
- reg_mmc3_vdd: mmc3_vdd {
+ reg_mmc3_vdd: regulator-mmc3-vdd {
compatible = "regulator-fixed";
regulator-name = "mmc3_vdd";
regulator-min-microvolt = <3000000>;
@@ -74,7 +74,7 @@
gpio = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */
};
- reg_gmac_vdd: gmac_vdd {
+ reg_gmac_vdd: regulator-gmac-vdd {
compatible = "regulator-fixed";
regulator-name = "gmac_vdd";
regulator-min-microvolt = <3000000>;
diff --git a/arch/arm/dts/sun7i-a20-olimex-som-evb-emmc.dts b/arch/arm/dts/sun7i-a20-olimex-som-evb-emmc.dts
index 20bf09b..fb83573 100644
--- a/arch/arm/dts/sun7i-a20-olimex-som-evb-emmc.dts
+++ b/arch/arm/dts/sun7i-a20-olimex-som-evb-emmc.dts
@@ -14,7 +14,7 @@
model = "Olimex A20-Olimex-SOM-EVB-eMMC";
compatible = "olimex,a20-olimex-som-evb-emmc", "allwinner,sun7i-a20";
- mmc2_pwrseq: mmc2_pwrseq {
+ mmc2_pwrseq: pwrseq {
compatible = "mmc-pwrseq-emmc";
reset-gpios = <&pio 2 18 GPIO_ACTIVE_LOW>;
};
diff --git a/arch/arm/dts/sun7i-a20-olimex-som204-evb-emmc.dts b/arch/arm/dts/sun7i-a20-olimex-som204-evb-emmc.dts
index a59755a..e8977c2 100644
--- a/arch/arm/dts/sun7i-a20-olimex-som204-evb-emmc.dts
+++ b/arch/arm/dts/sun7i-a20-olimex-som204-evb-emmc.dts
@@ -13,7 +13,7 @@
model = "Olimex A20-SOM204-EVB-eMMC";
compatible = "olimex,a20-olimex-som204-evb-emmc", "allwinner,sun7i-a20";
- mmc2_pwrseq: mmc2_pwrseq {
+ mmc2_pwrseq: pwrseq-1 {
compatible = "mmc-pwrseq-emmc";
reset-gpios = <&pio 2 16 GPIO_ACTIVE_LOW>;
};
diff --git a/arch/arm/dts/sun7i-a20-olimex-som204-evb.dts b/arch/arm/dts/sun7i-a20-olimex-som204-evb.dts
index 54af6c1..a554066 100644
--- a/arch/arm/dts/sun7i-a20-olimex-som204-evb.dts
+++ b/arch/arm/dts/sun7i-a20-olimex-som204-evb.dts
@@ -65,7 +65,7 @@
};
};
- rtl_pwrseq: rtl_pwrseq {
+ rtl_pwrseq: pwrseq-0 {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&pio 6 9 GPIO_ACTIVE_LOW>;
};
@@ -177,7 +177,7 @@
non-removable;
status = "okay";
- rtl8723bs: sdio_wifi@1 {
+ rtl8723bs: wifi@1 {
reg = <1>;
};
};
diff --git a/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts b/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts
index ecb91fb..435a189 100644
--- a/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts
+++ b/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts
@@ -82,7 +82,7 @@
};
};
- reg_axp_ipsout: axp_ipsout {
+ reg_axp_ipsout: regulator-axp-ipsout {
compatible = "regulator-fixed";
regulator-name = "axp-ipsout";
regulator-min-microvolt = <5000000>;
diff --git a/arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts b/arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts
index 3bfae98..29199b6 100644
--- a/arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts
+++ b/arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts
@@ -60,7 +60,7 @@
stdout-path = "serial0:115200n8";
};
- mmc3_pwrseq: mmc3_pwrseq {
+ mmc3_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&pio 7 9 GPIO_ACTIVE_LOW>; /* PH9 WIFI_EN */
};
diff --git a/arch/arm/dts/sun7i-a20.dtsi b/arch/arm/dts/sun7i-a20.dtsi
index 5574299..5f44f09 100644
--- a/arch/arm/dts/sun7i-a20.dtsi
+++ b/arch/arm/dts/sun7i-a20.dtsi
@@ -153,14 +153,14 @@
};
trips {
- cpu_alert0: cpu_alert0 {
+ cpu_alert0: cpu-alert0 {
/* milliCelsius */
temperature = <75000>;
hysteresis = <2000>;
type = "passive";
};
- cpu_crit: cpu_crit {
+ cpu_crit: cpu-crit {
/* milliCelsius */
temperature = <100000>;
hysteresis = <2000>;
diff --git a/arch/arm/dts/sun8i-a23-a33.dtsi b/arch/arm/dts/sun8i-a23-a33.dtsi
index a0cac96..4ebb0a7 100644
--- a/arch/arm/dts/sun8i-a23-a33.dtsi
+++ b/arch/arm/dts/sun8i-a23-a33.dtsi
@@ -108,7 +108,7 @@
#size-cells = <1>;
ranges;
- osc24M: osc24M_clk {
+ osc24M: osc24M-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <24000000>;
@@ -116,7 +116,7 @@
clock-output-names = "osc24M";
};
- ext_osc32k: ext_osc32k_clk {
+ ext_osc32k: ext-osc32k-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <32768>;
@@ -730,7 +730,7 @@
compatible = "allwinner,sun8i-a23-prcm";
reg = <0x01f01400 0x200>;
- ar100: ar100_clk {
+ ar100: ar100-clk {
compatible = "fixed-factor-clock";
#clock-cells = <0>;
clock-div = <1>;
@@ -739,7 +739,7 @@
clock-output-names = "ar100";
};
- ahb0: ahb0_clk {
+ ahb0: ahb0-clk {
compatible = "fixed-factor-clock";
#clock-cells = <0>;
clock-div = <1>;
@@ -748,14 +748,14 @@
clock-output-names = "ahb0";
};
- apb0: apb0_clk {
+ apb0: apb0-clk {
compatible = "allwinner,sun8i-a23-apb0-clk";
#clock-cells = <0>;
clocks = <&ahb0>;
clock-output-names = "apb0";
};
- apb0_gates: apb0_gates_clk {
+ apb0_gates: apb0-gates-clk {
compatible = "allwinner,sun8i-a23-apb0-gates-clk";
#clock-cells = <1>;
clocks = <&apb0>;
@@ -764,7 +764,7 @@
"apb0_i2c";
};
- apb0_rst: apb0_rst {
+ apb0_rst: apb0-rst {
compatible = "allwinner,sun6i-a31-clock-reset";
#reset-cells = <1>;
};
diff --git a/arch/arm/dts/sun8i-a23-polaroid-mid2407pxe03.dts b/arch/arm/dts/sun8i-a23-polaroid-mid2407pxe03.dts
index d5f6aeb..0c585a6 100644
--- a/arch/arm/dts/sun8i-a23-polaroid-mid2407pxe03.dts
+++ b/arch/arm/dts/sun8i-a23-polaroid-mid2407pxe03.dts
@@ -52,7 +52,7 @@
ethernet0 = &esp8089;
};
- wifi_pwrseq: wifi_pwrseq {
+ wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 6 GPIO_ACTIVE_LOW>; /* PL6 */
/* The esp8089 needs 200 ms after driving wifi-en high */
@@ -76,7 +76,7 @@
non-removable;
status = "okay";
- esp8089: sdio_wifi@1 {
+ esp8089: wifi@1 {
compatible = "esp,esp8089";
reg = <1>;
esp,crystal-26M-en = <2>;
diff --git a/arch/arm/dts/sun8i-a23-polaroid-mid2809pxe04.dts b/arch/arm/dts/sun8i-a23-polaroid-mid2809pxe04.dts
index 9f9232a..63cb4e1 100644
--- a/arch/arm/dts/sun8i-a23-polaroid-mid2809pxe04.dts
+++ b/arch/arm/dts/sun8i-a23-polaroid-mid2809pxe04.dts
@@ -52,7 +52,7 @@
ethernet0 = &esp8089;
};
- wifi_pwrseq: wifi_pwrseq {
+ wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 6 GPIO_ACTIVE_LOW>; /* PL6 */
/* The esp8089 needs 200 ms after driving wifi-en high */
@@ -69,7 +69,7 @@
non-removable;
status = "okay";
- esp8089: sdio_wifi@1 {
+ esp8089: wifi@1 {
compatible = "esp,esp8089";
reg = <1>;
esp,crystal-26M-en = <2>;
diff --git a/arch/arm/dts/sun8i-a33-ga10h-v1.1.dts b/arch/arm/dts/sun8i-a33-ga10h-v1.1.dts
index 2dfdd0a..f00ce03 100644
--- a/arch/arm/dts/sun8i-a33-ga10h-v1.1.dts
+++ b/arch/arm/dts/sun8i-a33-ga10h-v1.1.dts
@@ -85,7 +85,7 @@
non-removable;
status = "okay";
- rtl8703as: sdio_wifi@1 {
+ rtl8703as: wifi@1 {
reg = <1>;
};
};
diff --git a/arch/arm/dts/sun8i-a33-inet-d978-rev2.dts b/arch/arm/dts/sun8i-a33-inet-d978-rev2.dts
index 065cb62..162ba93 100644
--- a/arch/arm/dts/sun8i-a33-inet-d978-rev2.dts
+++ b/arch/arm/dts/sun8i-a33-inet-d978-rev2.dts
@@ -78,7 +78,7 @@
non-removable;
status = "okay";
- rtl8723bs: sdio_wifi@1 {
+ rtl8723bs: wifi@1 {
reg = <1>;
};
};
diff --git a/arch/arm/dts/sun8i-a33.dtsi b/arch/arm/dts/sun8i-a33.dtsi
index 30fdd27..36b2d78 100644
--- a/arch/arm/dts/sun8i-a33.dtsi
+++ b/arch/arm/dts/sun8i-a33.dtsi
@@ -323,35 +323,35 @@
};
trips {
- cpu_alert0: cpu_alert0 {
+ cpu_alert0: cpu-alert0 {
/* milliCelsius */
temperature = <75000>;
hysteresis = <2000>;
type = "passive";
};
- gpu_alert0: gpu_alert0 {
+ gpu_alert0: gpu-alert0 {
/* milliCelsius */
temperature = <85000>;
hysteresis = <2000>;
type = "passive";
};
- cpu_alert1: cpu_alert1 {
+ cpu_alert1: cpu-alert1 {
/* milliCelsius */
temperature = <90000>;
hysteresis = <2000>;
type = "hot";
};
- gpu_alert1: gpu_alert1 {
+ gpu_alert1: gpu-alert1 {
/* milliCelsius */
temperature = <95000>;
hysteresis = <2000>;
type = "hot";
};
- cpu_crit: cpu_crit {
+ cpu_crit: cpu-crit {
/* milliCelsius */
temperature = <110000>;
hysteresis = <2000>;
diff --git a/arch/arm/dts/sun8i-a83t-bananapi-m3.dts b/arch/arm/dts/sun8i-a83t-bananapi-m3.dts
index 197cf69..582b919 100644
--- a/arch/arm/dts/sun8i-a83t-bananapi-m3.dts
+++ b/arch/arm/dts/sun8i-a83t-bananapi-m3.dts
@@ -95,7 +95,7 @@
gpio = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */
};
- wifi_pwrseq: wifi_pwrseq {
+ wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
clocks = <&ac100_rtc 1>;
clock-names = "ext_clock";
diff --git a/arch/arm/dts/sun8i-a83t-cubietruck-plus.dts b/arch/arm/dts/sun8i-a83t-cubietruck-plus.dts
index e26af7c..c5677f9 100644
--- a/arch/arm/dts/sun8i-a83t-cubietruck-plus.dts
+++ b/arch/arm/dts/sun8i-a83t-cubietruck-plus.dts
@@ -144,7 +144,7 @@
compatible = "linux,spdif-dit";
};
- wifi_pwrseq: wifi_pwrseq {
+ wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
clocks = <&ac100_rtc 1>;
clock-names = "ext_clock";
diff --git a/arch/arm/dts/sun8i-a83t-tbs-a711.dts b/arch/arm/dts/sun8i-a83t-tbs-a711.dts
index 13ae10f..a2685fb 100644
--- a/arch/arm/dts/sun8i-a83t-tbs-a711.dts
+++ b/arch/arm/dts/sun8i-a83t-tbs-a711.dts
@@ -123,7 +123,7 @@
vin-supply = <®_vbat>;
};
- wifi_pwrseq: wifi_pwrseq {
+ wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 WL-PMU-EN */
diff --git a/arch/arm/dts/sun8i-a83t.dtsi b/arch/arm/dts/sun8i-a83t.dtsi
index cc40622..90f2c08 100644
--- a/arch/arm/dts/sun8i-a83t.dtsi
+++ b/arch/arm/dts/sun8i-a83t.dtsi
@@ -164,7 +164,7 @@
ranges;
/* TODO: PRCM block has a mux for this. */
- osc24M: osc24M_clk {
+ osc24M: osc24M-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <24000000>;
@@ -177,14 +177,14 @@
* It is an internal RC-based oscillator.
* TODO: Its controls are in the PRCM block.
*/
- osc16M: osc16M_clk {
+ osc16M: osc16M-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <16000000>;
clock-output-names = "osc16M";
};
- osc16Md512: osc16Md512_clk {
+ osc16Md512: osc16Md512-clk {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clock-div = <512>;
@@ -1126,7 +1126,7 @@
#reset-cells = <1>;
};
- r_cpucfg@1f01c00 {
+ cpucfg@1f01c00 {
compatible = "allwinner,sun8i-a83t-r-cpucfg";
reg = <0x1f01c00 0x400>;
};
diff --git a/arch/arm/dts/sun8i-h2-plus-bananapi-m2-zero.dts b/arch/arm/dts/sun8i-h2-plus-bananapi-m2-zero.dts
index d729b7c..d3a7c9f 100644
--- a/arch/arm/dts/sun8i-h2-plus-bananapi-m2-zero.dts
+++ b/arch/arm/dts/sun8i-h2-plus-bananapi-m2-zero.dts
@@ -103,7 +103,7 @@
cpu-supply = <®_vcc1v2>;
};
- wifi_pwrseq: wifi_pwrseq {
+ wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
clocks = <&rtc CLK_OSC32K_FANOUT>;
diff --git a/arch/arm/dts/sun8i-h2-plus-orangepi-r1.dts b/arch/arm/dts/sun8i-h2-plus-orangepi-r1.dts
index 3356f42..79b03b3 100644
--- a/arch/arm/dts/sun8i-h2-plus-orangepi-r1.dts
+++ b/arch/arm/dts/sun8i-h2-plus-orangepi-r1.dts
@@ -43,11 +43,12 @@
/* Orange Pi R1 is based on Orange Pi Zero design */
#include "sun8i-h2-plus-orangepi-zero.dts"
+/delete-node/ ®_vcc_wifi;
+
/ {
model = "Xunlong Orange Pi R1";
compatible = "xunlong,orangepi-r1", "allwinner,sun8i-h2-plus";
- /delete-node/ reg_vcc_wifi;
/*
* Ths pin of this regulator is the same with the Wi-Fi extra
@@ -89,7 +90,7 @@
vmmc-supply = <®_vcc3v3>;
vqmmc-supply = <®_vcc3v3>;
- rtl8189etv: sdio_wifi@1 {
+ rtl8189etv: wifi@1 {
reg = <1>;
};
};
diff --git a/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts
index 3706216..1b001f2 100644
--- a/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts
+++ b/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts
@@ -80,7 +80,7 @@
};
};
- reg_vcc_wifi: reg_vcc_wifi {
+ reg_vcc_wifi: reg-vcc-wifi {
compatible = "regulator-fixed";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
@@ -105,7 +105,7 @@
states = <1100000 0>, <1300000 1>;
};
- wifi_pwrseq: wifi_pwrseq {
+ wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>;
post-power-on-delay-ms = <200>;
@@ -149,7 +149,7 @@
* Explicitly define the sdio device, so that we can add an ethernet
* alias for it (which e.g. makes u-boot set a mac-address).
*/
- xr819: sdio_wifi@1 {
+ xr819: wifi@1 {
reg = <1>;
};
};
diff --git a/arch/arm/dts/sun8i-h3-beelink-x2.dts b/arch/arm/dts/sun8i-h3-beelink-x2.dts
index a6d38ec..5b77300 100644
--- a/arch/arm/dts/sun8i-h3-beelink-x2.dts
+++ b/arch/arm/dts/sun8i-h3-beelink-x2.dts
@@ -122,7 +122,7 @@
compatible = "linux,spdif-dit";
};
- wifi_pwrseq: wifi_pwrseq {
+ wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
clocks = <&rtc CLK_OSC32K_FANOUT>;
@@ -185,7 +185,7 @@
* Explicitly define the sdio device, so that we can add an ethernet
* alias for it (which e.g. makes u-boot set a mac-address).
*/
- sdiowifi: sdio_wifi@1 {
+ sdiowifi: wifi@1 {
reg = <1>;
};
};
diff --git a/arch/arm/dts/sun8i-h3-nanopi-duo2.dts b/arch/arm/dts/sun8i-h3-nanopi-duo2.dts
index 343b02b..2b0566d 100644
--- a/arch/arm/dts/sun8i-h3-nanopi-duo2.dts
+++ b/arch/arm/dts/sun8i-h3-nanopi-duo2.dts
@@ -87,7 +87,7 @@
vin-supply = <®_vcc5v0>;
};
- wifi_pwrseq: wifi_pwrseq {
+ wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
clocks = <&rtc CLK_OSC32K_FANOUT>;
@@ -119,7 +119,7 @@
non-removable;
status = "okay";
- sdio_wifi: sdio_wifi@1 {
+ sdio_wifi: wifi@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
interrupt-parent = <&pio>;
diff --git a/arch/arm/dts/sun8i-h3-nanopi-m1-plus.dts b/arch/arm/dts/sun8i-h3-nanopi-m1-plus.dts
index 4ba533b..59bd074 100644
--- a/arch/arm/dts/sun8i-h3-nanopi-m1-plus.dts
+++ b/arch/arm/dts/sun8i-h3-nanopi-m1-plus.dts
@@ -62,7 +62,7 @@
gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
};
- wifi_pwrseq: wifi_pwrseq {
+ wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
};
@@ -132,7 +132,7 @@
non-removable;
status = "okay";
- sdio_wifi: sdio_wifi@1 {
+ sdio_wifi: wifi@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
interrupt-parent = <&pio>;
diff --git a/arch/arm/dts/sun8i-h3-nanopi-neo-air.dts b/arch/arm/dts/sun8i-h3-nanopi-neo-air.dts
index 9e1a33f..6d85370 100644
--- a/arch/arm/dts/sun8i-h3-nanopi-neo-air.dts
+++ b/arch/arm/dts/sun8i-h3-nanopi-neo-air.dts
@@ -73,7 +73,7 @@
};
};
- wifi_pwrseq: wifi_pwrseq {
+ wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
};
diff --git a/arch/arm/dts/sun8i-h3-nanopi-r1.dts b/arch/arm/dts/sun8i-h3-nanopi-r1.dts
index 42cd113..8706497 100644
--- a/arch/arm/dts/sun8i-h3-nanopi-r1.dts
+++ b/arch/arm/dts/sun8i-h3-nanopi-r1.dts
@@ -43,7 +43,7 @@
<1300000 0x1>;
};
- wifi_pwrseq: wifi_pwrseq {
+ wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
clocks = <&rtc CLK_OSC32K_FANOUT>;
diff --git a/arch/arm/dts/sun8i-h3-orangepi-2.dts b/arch/arm/dts/sun8i-h3-orangepi-2.dts
index f1f9dbe..d2ae47b 100644
--- a/arch/arm/dts/sun8i-h3-orangepi-2.dts
+++ b/arch/arm/dts/sun8i-h3-orangepi-2.dts
@@ -105,7 +105,7 @@
};
};
- wifi_pwrseq: wifi_pwrseq {
+ wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 WIFI_EN */
};
@@ -169,7 +169,7 @@
* Explicitly define the sdio device, so that we can add an ethernet
* alias for it (which e.g. makes u-boot set a mac-address).
*/
- rtl8189: sdio_wifi@1 {
+ rtl8189: wifi@1 {
reg = <1>;
};
};
diff --git a/arch/arm/dts/sun8i-h3-orangepi-lite.dts b/arch/arm/dts/sun8i-h3-orangepi-lite.dts
index 305b34a..6a4316a 100644
--- a/arch/arm/dts/sun8i-h3-orangepi-lite.dts
+++ b/arch/arm/dts/sun8i-h3-orangepi-lite.dts
@@ -143,7 +143,7 @@
* Explicitly define the sdio device, so that we can add an ethernet
* alias for it (which e.g. makes u-boot set a mac-address).
*/
- rtl8189ftv: sdio_wifi@1 {
+ rtl8189ftv: wifi@1 {
reg = <1>;
};
};
diff --git a/arch/arm/dts/sun8i-h3-orangepi-pc-plus.dts b/arch/arm/dts/sun8i-h3-orangepi-pc-plus.dts
index babf4cf..8a49b33 100644
--- a/arch/arm/dts/sun8i-h3-orangepi-pc-plus.dts
+++ b/arch/arm/dts/sun8i-h3-orangepi-pc-plus.dts
@@ -63,7 +63,7 @@
* Explicitly define the sdio device, so that we can add an ethernet
* alias for it (which e.g. makes u-boot set a mac-address).
*/
- rtl8189ftv: sdio_wifi@1 {
+ rtl8189ftv: wifi@1 {
reg = <1>;
};
};
diff --git a/arch/arm/dts/sun8i-h3-orangepi-zero-plus2.dts b/arch/arm/dts/sun8i-h3-orangepi-zero-plus2.dts
index 561ea1d..7a6444a 100644
--- a/arch/arm/dts/sun8i-h3-orangepi-zero-plus2.dts
+++ b/arch/arm/dts/sun8i-h3-orangepi-zero-plus2.dts
@@ -92,7 +92,7 @@
regulator-max-microvolt = <3300000>;
};
- wifi_pwrseq: wifi_pwrseq {
+ wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&pio 0 9 GPIO_ACTIVE_LOW>; /* PA9 */
post-power-on-delay-ms = <200>;
diff --git a/arch/arm/dts/sun8i-q8-common.dtsi b/arch/arm/dts/sun8i-q8-common.dtsi
index 3d9a152..2725848 100644
--- a/arch/arm/dts/sun8i-q8-common.dtsi
+++ b/arch/arm/dts/sun8i-q8-common.dtsi
@@ -62,7 +62,7 @@
};
};
- wifi_pwrseq: wifi_pwrseq {
+ wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
/*
* Q8 boards use various PL# pins as wifi-en. On other boards
@@ -94,7 +94,7 @@
non-removable;
status = "okay";
- sdio_wifi: sdio_wifi@1 {
+ sdio_wifi: wifi@1 {
reg = <1>;
};
};
diff --git a/arch/arm/dts/sun8i-r16-bananapi-m2m.dts b/arch/arm/dts/sun8i-r16-bananapi-m2m.dts
index f97218e..5001f10 100644
--- a/arch/arm/dts/sun8i-r16-bananapi-m2m.dts
+++ b/arch/arm/dts/sun8i-r16-bananapi-m2m.dts
@@ -88,7 +88,7 @@
regulator-max-microvolt = <5000000>;
};
- wifi_pwrseq: wifi_pwrseq {
+ wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 6 GPIO_ACTIVE_LOW>; /* PL06 */
clocks = <&rtc CLK_OSC32K_FANOUT>;
diff --git a/arch/arm/dts/sun8i-r16-parrot.dts b/arch/arm/dts/sun8i-r16-parrot.dts
index 2be1b76..4010996 100644
--- a/arch/arm/dts/sun8i-r16-parrot.dts
+++ b/arch/arm/dts/sun8i-r16-parrot.dts
@@ -75,7 +75,7 @@
};
};
- wifi_pwrseq: wifi_pwrseq {
+ wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 6 GPIO_ACTIVE_LOW>; /* PL06 */
};
diff --git a/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts b/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
index 28197bb..cd2351a 100644
--- a/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
+++ b/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
@@ -100,7 +100,7 @@
enable-active-high;
};
- wifi_pwrseq: wifi_pwrseq {
+ wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&pio 6 10 GPIO_ACTIVE_LOW>; /* PG10 WIFI_EN */
clocks = <&ccu CLK_OUTA>;
diff --git a/arch/arm/dts/sun8i-r40-oka40i-c.dts b/arch/arm/dts/sun8i-r40-oka40i-c.dts
index 0bd1336..15b0b4d 100644
--- a/arch/arm/dts/sun8i-r40-oka40i-c.dts
+++ b/arch/arm/dts/sun8i-r40-oka40i-c.dts
@@ -62,7 +62,7 @@
regulator-max-microvolt = <5000000>;
};
- wifi_pwrseq: wifi_pwrseq {
+ wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&pio 1 10 GPIO_ACTIVE_LOW>; // PB10 WIFI_EN
clocks = <&ccu CLK_OUTA>;
diff --git a/arch/arm/dts/sun8i-s3-pinecube.dts b/arch/arm/dts/sun8i-s3-pinecube.dts
index 20966e9..e0d4404 100644
--- a/arch/arm/dts/sun8i-s3-pinecube.dts
+++ b/arch/arm/dts/sun8i-s3-pinecube.dts
@@ -51,7 +51,7 @@
startup-delay-us = <200000>;
};
- wifi_pwrseq: wifi_pwrseq {
+ wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&pio 1 3 GPIO_ACTIVE_LOW>; /* PB3 WIFI-RST */
post-power-on-delay-ms = <200>;
diff --git a/arch/arm/dts/sun8i-v3s.dtsi b/arch/arm/dts/sun8i-v3s.dtsi
index e8a0447..9e13c2a 100644
--- a/arch/arm/dts/sun8i-v3s.dtsi
+++ b/arch/arm/dts/sun8i-v3s.dtsi
@@ -98,7 +98,7 @@
#size-cells = <1>;
ranges;
- osc24M: osc24M_clk {
+ osc24M: osc24M-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <24000000>;
@@ -106,7 +106,7 @@
clock-output-names = "osc24M";
};
- osc32k: osc32k_clk {
+ osc32k: osc32k-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <32768>;
diff --git a/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts b/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts
index 4348710..6575ef2 100644
--- a/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts
+++ b/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts
@@ -94,7 +94,7 @@
enable-active-high;
};
- wifi_pwrseq: wifi_pwrseq {
+ wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&pio 6 10 GPIO_ACTIVE_LOW>; /* PG10 WIFI_EN */
clocks = <&ccu CLK_OUTA>;
diff --git a/arch/arm/dts/sun9i-a80.dtsi b/arch/arm/dts/sun9i-a80.dtsi
index 7d3f330..a1ae092 100644
--- a/arch/arm/dts/sun9i-a80.dtsi
+++ b/arch/arm/dts/sun9i-a80.dtsi
@@ -196,14 +196,14 @@
* The actual TX clock rate is not controlled by the
* gmac_tx clock.
*/
- mii_phy_tx_clk: mii_phy_tx_clk {
+ mii_phy_tx_clk: mii-phy-tx-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <25000000>;
clock-output-names = "mii_phy_tx";
};
- gmac_int_tx_clk: gmac_int_tx_clk {
+ gmac_int_tx_clk: gmac-int-tx-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <125000000>;
diff --git a/arch/arm/dts/sunxi-bananapi-m2-plus.dtsi b/arch/arm/dts/sunxi-bananapi-m2-plus.dtsi
index 1d1d127..873817d 100644
--- a/arch/arm/dts/sunxi-bananapi-m2-plus.dtsi
+++ b/arch/arm/dts/sunxi-bananapi-m2-plus.dtsi
@@ -98,7 +98,7 @@
gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
};
- wifi_pwrseq: wifi_pwrseq {
+ wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
clocks = <&rtc CLK_OSC32K_FANOUT>;
diff --git a/arch/arm/dts/sunxi-h3-h5-emlid-neutis.dtsi b/arch/arm/dts/sunxi-h3-h5-emlid-neutis.dtsi
index 60804b0..be5f552 100644
--- a/arch/arm/dts/sunxi-h3-h5-emlid-neutis.dtsi
+++ b/arch/arm/dts/sunxi-h3-h5-emlid-neutis.dtsi
@@ -18,7 +18,7 @@
stdout-path = "serial0:115200n8";
};
- wifi_pwrseq: wifi_pwrseq {
+ wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&pio 2 7 GPIO_ACTIVE_LOW>; /* PC7 */
post-power-on-delay-ms = <200>;
diff --git a/arch/arm/dts/sunxi-h3-h5.dtsi b/arch/arm/dts/sunxi-h3-h5.dtsi
index bdc796f..43f6938 100644
--- a/arch/arm/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/dts/sunxi-h3-h5.dtsi
@@ -83,7 +83,7 @@
#size-cells = <1>;
ranges;
- osc24M: osc24M_clk {
+ osc24M: osc24M-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <24000000>;
@@ -91,7 +91,7 @@
clock-output-names = "osc24M";
};
- osc32k: osc32k_clk {
+ osc32k: osc32k-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <32768>;
diff --git a/arch/arm/dts/versal-mini-ospi.dtsi b/arch/arm/dts/versal-mini-ospi.dtsi
index 1abe44f..8735292 100644
--- a/arch/arm/dts/versal-mini-ospi.dtsi
+++ b/arch/arm/dts/versal-mini-ospi.dtsi
@@ -36,7 +36,7 @@
ranges;
ospi: spi@f1010000 {
- compatible = "cadence,qspi", "cdns,qspi-nor";
+ compatible = "cdns,qspi-nor";
status = "okay";
reg = <0 0xf1010000 0 0x10000 0 0xc0000000 0 0x20000000>;
clock-names = "ref_clk", "pclk";
diff --git a/arch/arm/dts/versal-net-mini-emmc.dts b/arch/arm/dts/versal-net-mini-emmc.dts
index 8a864ba..e200fb6 100644
--- a/arch/arm/dts/versal-net-mini-emmc.dts
+++ b/arch/arm/dts/versal-net-mini-emmc.dts
@@ -42,14 +42,14 @@
bootph-all;
};
- amba: amba {
+ amba: axi {
bootph-all;
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges;
- sdhci1: sdhci@f1050000 {
+ sdhci1: mmc@f1050000 {
compatible = "xlnx,versal-net-emmc";
status = "okay";
non-removable;
diff --git a/arch/arm/dts/versal-net-mini-ospi.dtsi b/arch/arm/dts/versal-net-mini-ospi.dtsi
index 5d188db..a9bf7cc 100644
--- a/arch/arm/dts/versal-net-mini-ospi.dtsi
+++ b/arch/arm/dts/versal-net-mini-ospi.dtsi
@@ -42,7 +42,7 @@
bootph-all;
};
- amba: amba {
+ amba: axi {
bootph-all;
compatible = "simple-bus";
#address-cells = <0x2>;
@@ -50,7 +50,7 @@
ranges;
ospi: spi@f1010000 {
- compatible = "cadence,qspi", "cdns,qspi-nor";
+ compatible = "cdns,qspi-nor";
status = "okay";
reg = <0 0xf1010000 0 0x10000>, <0 0xc0000000 0 0x20000000>;
clock-names = "ref_clk", "pclk";
diff --git a/arch/arm/dts/versal-net-mini-qspi.dtsi b/arch/arm/dts/versal-net-mini-qspi.dtsi
index 097b58c..e29a3f3 100644
--- a/arch/arm/dts/versal-net-mini-qspi.dtsi
+++ b/arch/arm/dts/versal-net-mini-qspi.dtsi
@@ -42,7 +42,7 @@
bootph-all;
};
- amba: amba {
+ amba: axi {
bootph-all;
compatible = "simple-bus";
#address-cells = <2>;
diff --git a/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso b/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso
index 1727a1c..4de29d5 100644
--- a/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso
+++ b/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso
@@ -358,6 +358,7 @@
status = "okay";
rts-gpios = <&gpio 72 GPIO_ACTIVE_HIGH>;
linux,rs485-enabled-at-boot-time;
+ rs485-rts-delay = <10 10>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart0_default>;
assigned-clock-rates = <100000000>;
diff --git a/arch/arm/dts/zynqmp-sm-k26-revA.dts b/arch/arm/dts/zynqmp-sm-k26-revA.dts
index 5859e6c..d95a05e 100644
--- a/arch/arm/dts/zynqmp-sm-k26-revA.dts
+++ b/arch/arm/dts/zynqmp-sm-k26-revA.dts
@@ -107,7 +107,7 @@
pwm-fan {
compatible = "pwm-fan";
status = "okay";
- pwms = <&ttc0 2 40000 0>;
+ pwms = <&ttc0 2 40000 1>;
};
};
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index 34f592c..6a29f61 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -1025,6 +1025,7 @@
reg = <0x0 0xff000000 0x0 0x1000>;
clock-names = "uart_clk", "pclk";
power-domains = <&zynqmp_firmware PD_UART_0>;
+ resets = <&zynqmp_reset ZYNQMP_RESET_UART0>;
};
uart1: serial@ff010000 {
@@ -1036,6 +1037,7 @@
reg = <0x0 0xff010000 0x0 0x1000>;
clock-names = "uart_clk", "pclk";
power-domains = <&zynqmp_firmware PD_UART_1>;
+ resets = <&zynqmp_reset ZYNQMP_RESET_UART1>;
};
usb0: usb@ff9d0000 {
diff --git a/arch/arm/mach-zynq/cpu.c b/arch/arm/mach-zynq/cpu.c
index c75e453..5b6d765 100644
--- a/arch/arm/mach-zynq/cpu.c
+++ b/arch/arm/mach-zynq/cpu.c
@@ -36,9 +36,11 @@
} zynq_fpga_descs[] = {
ZYNQ_DESC(7Z007S),
ZYNQ_DESC(7Z010),
+ ZYNQ_DESC(7Z010_LR),
ZYNQ_DESC(7Z012S),
ZYNQ_DESC(7Z014S),
ZYNQ_DESC(7Z015),
+ ZYNQ_DESC(7Z020_LR),
ZYNQ_DESC(7Z020),
ZYNQ_DESC(7Z030),
ZYNQ_DESC(7Z035),
diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS
index 4bcd9b9..4ad77c7 100644
--- a/board/sunxi/MAINTAINERS
+++ b/board/sunxi/MAINTAINERS
@@ -549,6 +549,12 @@
F: configs/Sunchip_CX-A99_defconfig
W: https://linux-sunxi.org/Sunchip_CX-A99
+TANIX TX1 BOARD
+M: Andre Przywara <andre.przywara@arm.com>
+S: Maintained
+F: configs/tanix_tx1_defconfig
+W: https://linux-sunxi.org/Tanix_TX1
+
TANIX TX6 BOARD
M: Jernej Skrabec <jernej.skrabec@siol.net>
S: Maintained
diff --git a/board/xilinx/versal-net/board.c b/board/xilinx/versal-net/board.c
index 88e10fa..1d67e3f 100644
--- a/board/xilinx/versal-net/board.c
+++ b/board/xilinx/versal-net/board.c
@@ -193,6 +193,51 @@
return bootmode;
}
+int spi_get_env_dev(void)
+{
+ struct udevice *dev;
+ const char *mode = NULL;
+ int bootseq = -1;
+
+ switch (versal_net_get_bootmode()) {
+ case QSPI_MODE_24BIT:
+ puts("QSPI_MODE_24\n");
+ if (uclass_get_device_by_name(UCLASS_SPI,
+ "spi@f1030000", &dev)) {
+ debug("QSPI driver for QSPI device is not present\n");
+ break;
+ }
+ mode = "xspi";
+ bootseq = dev_seq(dev);
+ break;
+ case QSPI_MODE_32BIT:
+ puts("QSPI_MODE_32\n");
+ if (uclass_get_device_by_name(UCLASS_SPI,
+ "spi@f1030000", &dev)) {
+ debug("QSPI driver for QSPI device is not present\n");
+ break;
+ }
+ mode = "xspi";
+ bootseq = dev_seq(dev);
+ break;
+ case OSPI_MODE:
+ puts("OSPI_MODE\n");
+ if (uclass_get_device_by_name(UCLASS_SPI,
+ "spi@f1010000", &dev)) {
+ debug("OSPI driver for OSPI device is not present\n");
+ break;
+ }
+ mode = "xspi";
+ bootseq = dev_seq(dev);
+ break;
+ default:
+ break;
+ }
+
+ debug("bootseq %d\n", bootseq);
+ return bootseq;
+}
+
static int boot_targets_setup(void)
{
u8 bootmode;
diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
index b4c15b0..e6331c0 100644
--- a/board/xilinx/zynqmp/zynqmp.c
+++ b/board/xilinx/zynqmp/zynqmp.c
@@ -152,20 +152,7 @@
if (sizeof(CONFIG_ZYNQMP_SPL_PM_CFG_OBJ_FILE) > 1)
zynqmp_pmufw_load_config_object(zynqmp_pm_cfg_obj,
zynqmp_pm_cfg_obj_size);
-#endif
-
-#if defined(CONFIG_ZYNQMP_FIRMWARE)
- struct udevice *dev;
-
- uclass_get_device_by_name(UCLASS_FIRMWARE, "power-management", &dev);
- if (!dev) {
- uclass_get_device_by_name(UCLASS_FIRMWARE, "zynqmp-power", &dev);
- if (!dev)
- panic("PMU Firmware device not found - Enable it");
- }
-#endif
-#if defined(CONFIG_SPL_BUILD)
printf("Silicon version:\t%d\n", zynqmp_get_silicon_version());
/* the CSU disables the JTAG interface when secure boot is enabled */
diff --git a/board/xilinx/zynqmp/zynqmp_kria.env b/board/xilinx/zynqmp/zynqmp_kria.env
index 69e333c..49ef3e7 100644
--- a/board/xilinx/zynqmp/zynqmp_kria.env
+++ b/board/xilinx/zynqmp/zynqmp_kria.env
@@ -63,10 +63,13 @@
kd240_setup=i2c dev 1 && run usb_hub_init;zynqmp pmufw node 33; zynqmp pmufw node 47
tpm_setup=tpm autostart;
+tpm_reset=echo "!!! For TPM reset a full power cycle or pressing the POR_B button is required !!!";
+tpm_kv260=if test ${card1_rev} = A -o ${card1_rev} = B -o ${card1_rev} = Y -o ${card1_rev} = Z -o ${card1_rev} = 1; then run tpm_reset; fi
+tpm_kd240=if test ${card1_rev} = A; then run tpm_reset; fi
board_setup=\
zynqmp mmio_write 0xFFCA0010 0xfff 0; \
-if test ${card1_name} = SCK-KV-G; then run kv260_setup; fi;\
-if test ${card1_name} = SCK-KR-G; then run kr260_setup; fi;\
-if test ${card1_name} = SCK-KD-G; then run kd240_setup; fi;\
+if test ${card1_name} = SCK-KV-G; then run kv260_setup; run tpm_kv260; fi;\
+if test ${card1_name} = SCK-KR-G; then run kr260_setup; run tpm_reset; fi;\
+if test ${card1_name} = SCK-KD-G; then run kd240_setup; run tpm_kd240; fi;\
run tpm_setup
diff --git a/cmd/ubi.c b/cmd/ubi.c
index 92998af..0e62e44 100644
--- a/cmd/ubi.c
+++ b/cmd/ubi.c
@@ -423,18 +423,84 @@
return ubi_volume_continue_write(volume, buf, size);
}
-int ubi_volume_write(char *volume, void *buf, size_t size)
+static int ubi_volume_offset_write(char *volume, void *buf, loff_t offset,
+ size_t size)
{
- return ubi_volume_begin_write(volume, buf, size, size);
+ int len, tbuf_size, ret;
+ u64 lnum;
+ struct ubi_volume *vol;
+ loff_t off = offset;
+ void *tbuf;
+
+ vol = ubi_find_volume(volume);
+ if (!vol)
+ return -ENODEV;
+
+ if (size > vol->reserved_pebs * (ubi->leb_size - vol->data_pad))
+ return -EINVAL;
+
+ tbuf_size = vol->usable_leb_size;
+ tbuf = malloc_cache_aligned(tbuf_size);
+ if (!tbuf)
+ return -ENOMEM;
+
+ lnum = off;
+ off = do_div(lnum, vol->usable_leb_size);
+
+ do {
+ struct ubi_volume_desc desc = {
+ .vol = vol,
+ .mode = UBI_READWRITE,
+ };
+
+ len = size > tbuf_size ? tbuf_size : size;
+ if (off + len >= vol->usable_leb_size)
+ len = vol->usable_leb_size - off;
+
+ ret = ubi_read(&desc, (int)lnum, tbuf, 0, tbuf_size);
+ if (ret) {
+ pr_err("Failed to read leb %lld (%d)\n", lnum, ret);
+ goto exit;
+ }
+
+ memcpy(tbuf + off, buf, len);
+
+ ret = ubi_leb_change(&desc, (int)lnum, tbuf, tbuf_size);
+ if (ret) {
+ pr_err("Failed to write leb %lld (%d)\n", lnum, ret);
+ goto exit;
+ }
+
+ off += len;
+ if (off >= vol->usable_leb_size) {
+ lnum++;
+ off -= vol->usable_leb_size;
+ }
+
+ buf += len;
+ size -= len;
+ } while (size);
+
+exit:
+ free(tbuf);
+ return ret;
+}
+
+int ubi_volume_write(char *volume, void *buf, loff_t offset, size_t size)
+{
+ if (!offset)
+ return ubi_volume_begin_write(volume, buf, size, size);
+
+ return ubi_volume_offset_write(volume, buf, offset, size);
}
-int ubi_volume_read(char *volume, char *buf, size_t size)
+int ubi_volume_read(char *volume, char *buf, loff_t offset, size_t size)
{
int err, lnum, off, len, tbuf_size;
void *tbuf;
unsigned long long tmp;
struct ubi_volume *vol;
- loff_t offp = 0;
+ loff_t offp = offset;
size_t len_read;
vol = ubi_find_volume(volume);
@@ -769,7 +835,7 @@
(void *)addr, size, full_size);
}
} else {
- ret = ubi_volume_write(argv[3], (void *)addr, size);
+ ret = ubi_volume_write(argv[3], (void *)addr, 0, size);
}
if (!ret) {
printf("%lld bytes written to volume %s\n", size,
@@ -795,7 +861,7 @@
}
if (argc == 3) {
- return ubi_volume_read(argv[3], (char *)addr, size);
+ return ubi_volume_read(argv[3], (char *)addr, 0, size);
}
}
diff --git a/configs/M5208EVBE_defconfig b/configs/M5208EVBE_defconfig
index ed14662..c6c2ad7 100644
--- a/configs/M5208EVBE_defconfig
+++ b/configs/M5208EVBE_defconfig
@@ -5,6 +5,7 @@
CONFIG_ENV_SECT_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="M5208EVBE"
CONFIG_SYS_MONITOR_LEN=262144
+CONFIG_WATCHDOG_TIMEOUT_MSECS=5000
CONFIG_SYS_LOAD_ADDR=0x40010000
CONFIG_ENV_ADDR=0x2000
CONFIG_TARGET_M5208EVBE=y
@@ -50,6 +51,5 @@
CONFIG_MCFFEC=y
CONFIG_MII=y
CONFIG_MCFUART=y
-CONFIG_WATCHDOG_TIMEOUT_MSECS=5000
CONFIG_WDT=y
CONFIG_WDT_MCF=y
diff --git a/configs/M5235EVB_Flash32_defconfig b/configs/M5235EVB_Flash32_defconfig
index 45e0460..9b19185 100644
--- a/configs/M5235EVB_Flash32_defconfig
+++ b/configs/M5235EVB_Flash32_defconfig
@@ -5,6 +5,7 @@
CONFIG_ENV_SECT_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="M5235EVB_Flash32"
CONFIG_SYS_MONITOR_LEN=262144
+CONFIG_WATCHDOG_TIMEOUT_MSECS=5000
CONFIG_SYS_LOAD_ADDR=0x20000
CONFIG_ENV_ADDR=0xFFE04000
CONFIG_TARGET_M5235EVB=y
@@ -58,4 +59,3 @@
CONFIG_MCFFEC=y
CONFIG_MII=y
CONFIG_MCFUART=y
-CONFIG_WATCHDOG_TIMEOUT_MSECS=5000
diff --git a/configs/M5235EVB_defconfig b/configs/M5235EVB_defconfig
index 719a435..fac3071 100644
--- a/configs/M5235EVB_defconfig
+++ b/configs/M5235EVB_defconfig
@@ -5,6 +5,7 @@
CONFIG_ENV_SECT_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="M5235EVB"
CONFIG_SYS_MONITOR_LEN=262144
+CONFIG_WATCHDOG_TIMEOUT_MSECS=5000
CONFIG_SYS_LOAD_ADDR=0x20000
CONFIG_ENV_ADDR=0xFFE04000
CONFIG_TARGET_M5235EVB=y
@@ -57,4 +58,3 @@
CONFIG_MCFFEC=y
CONFIG_MII=y
CONFIG_MCFUART=y
-CONFIG_WATCHDOG_TIMEOUT_MSECS=5000
diff --git a/configs/M5272C3_defconfig b/configs/M5272C3_defconfig
index ccb756e..b6f8d18 100644
--- a/configs/M5272C3_defconfig
+++ b/configs/M5272C3_defconfig
@@ -5,6 +5,7 @@
CONFIG_ENV_SECT_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="M5272C3"
CONFIG_SYS_MONITOR_LEN=131072
+CONFIG_WATCHDOG_TIMEOUT_MSECS=10000
CONFIG_SYS_LOAD_ADDR=0x20000
CONFIG_ENV_ADDR=0xFFE04000
CONFIG_TARGET_M5272C3=y
@@ -72,4 +73,3 @@
CONFIG_MCFFEC=y
CONFIG_MII=y
CONFIG_MCFUART=y
-CONFIG_WATCHDOG_TIMEOUT_MSECS=10000
diff --git a/configs/M53017EVB_defconfig b/configs/M53017EVB_defconfig
index f0a7b1c..46df7c2 100644
--- a/configs/M53017EVB_defconfig
+++ b/configs/M53017EVB_defconfig
@@ -5,6 +5,7 @@
CONFIG_ENV_SECT_SIZE=0x8000
CONFIG_DEFAULT_DEVICE_TREE="M53017EVB"
CONFIG_SYS_MONITOR_LEN=262144
+CONFIG_WATCHDOG_TIMEOUT_MSECS=5000
CONFIG_SYS_LOAD_ADDR=0x40010000
CONFIG_ENV_ADDR=0x40000
CONFIG_TARGET_M53017EVB=y
@@ -57,4 +58,3 @@
CONFIG_MCFRTC=y
CONFIG_SYS_MCFRTC_BASE=0xFC0A8000
CONFIG_MCFUART=y
-CONFIG_WATCHDOG_TIMEOUT_MSECS=5000
diff --git a/configs/M5329AFEE_defconfig b/configs/M5329AFEE_defconfig
index bbb5a23..3e5da1f 100644
--- a/configs/M5329AFEE_defconfig
+++ b/configs/M5329AFEE_defconfig
@@ -5,6 +5,7 @@
CONFIG_ENV_SECT_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="M5329AFEE"
CONFIG_SYS_MONITOR_LEN=262144
+CONFIG_WATCHDOG_TIMEOUT_MSECS=5000
CONFIG_SYS_LOAD_ADDR=0x40010000
CONFIG_ENV_ADDR=0x4000
CONFIG_TARGET_M5329EVB=y
@@ -54,4 +55,3 @@
CONFIG_MCFRTC=y
CONFIG_SYS_MCFRTC_BASE=0xFC0A8000
CONFIG_MCFUART=y
-CONFIG_WATCHDOG_TIMEOUT_MSECS=5000
diff --git a/configs/M5329BFEE_defconfig b/configs/M5329BFEE_defconfig
index ff8522b..ab7b8e6 100644
--- a/configs/M5329BFEE_defconfig
+++ b/configs/M5329BFEE_defconfig
@@ -5,6 +5,7 @@
CONFIG_ENV_SECT_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="M5329BFEE"
CONFIG_SYS_MONITOR_LEN=262144
+CONFIG_WATCHDOG_TIMEOUT_MSECS=5000
CONFIG_SYS_LOAD_ADDR=0x40010000
CONFIG_ENV_ADDR=0x4000
CONFIG_TARGET_M5329EVB=y
@@ -56,4 +57,3 @@
CONFIG_MCFRTC=y
CONFIG_SYS_MCFRTC_BASE=0xFC0A8000
CONFIG_MCFUART=y
-CONFIG_WATCHDOG_TIMEOUT_MSECS=5000
diff --git a/configs/M5373EVB_defconfig b/configs/M5373EVB_defconfig
index 981542f..1df1682 100644
--- a/configs/M5373EVB_defconfig
+++ b/configs/M5373EVB_defconfig
@@ -5,6 +5,7 @@
CONFIG_ENV_SECT_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="M5373EVB"
CONFIG_SYS_MONITOR_LEN=262144
+CONFIG_WATCHDOG_TIMEOUT_MSECS=3360
CONFIG_SYS_LOAD_ADDR=0x40010000
CONFIG_ENV_ADDR=0x4000
CONFIG_TARGET_M5373EVB=y
@@ -56,4 +57,3 @@
CONFIG_MCFRTC=y
CONFIG_SYS_MCFRTC_BASE=0xFC0A8000
CONFIG_MCFUART=y
-CONFIG_WATCHDOG_TIMEOUT_MSECS=3360
diff --git a/configs/am62ax_evm_a53_defconfig b/configs/am62ax_evm_a53_defconfig
index 2a71b06..4a351cd 100644
--- a/configs/am62ax_evm_a53_defconfig
+++ b/configs/am62ax_evm_a53_defconfig
@@ -37,6 +37,7 @@
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_REMOTEPROC=y
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_UPSTREAM=y
@@ -73,8 +74,8 @@
CONFIG_TI_SCI_POWER_DOMAIN=y
CONFIG_K3_SYSTEM_CONTROLLER=y
CONFIG_REMOTEPROC_TI_K3_ARM64=y
-CONFIG_REMOTEPROC_TI_K3_R5F=y
CONFIG_REMOTEPROC_TI_K3_DSP=y
+CONFIG_REMOTEPROC_TI_K3_R5F=y
CONFIG_RESET_TI_SCI=y
CONFIG_DM_SERIAL=y
CONFIG_SOC_DEVICE=y
@@ -84,4 +85,3 @@
CONFIG_SPL_SYSRESET=y
CONFIG_SYSRESET_TI_SCI=y
CONFIG_FS_FAT_MAX_CLUSTSIZE=16384
-CONFIG_CMD_REMOTEPROC=y
diff --git a/configs/amd_versal2_mini_defconfig b/configs/amd_versal2_mini_defconfig
new file mode 100644
index 0000000..0dd2305
--- /dev/null
+++ b/configs/amd_versal2_mini_defconfig
@@ -0,0 +1,77 @@
+CONFIG_ARM=y
+CONFIG_SYS_CONFIG_NAME="amd_versal2_mini"
+# CONFIG_ARM64_CRC32 is not set
+CONFIG_COUNTER_FREQUENCY=100000000
+# CONFIG_ARM64_SUPPORT_AARCH32 is not set
+CONFIG_ARCH_VERSAL2=y
+CONFIG_TEXT_BASE=0xBBF00000
+CONFIG_SYS_MALLOC_LEN=0x20000
+CONFIG_SYS_MALLOC_F_LEN=0x4000
+CONFIG_NR_DRAM_BANKS=3
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xBBF20000
+CONFIG_ENV_SIZE=0x80
+CONFIG_DEFAULT_DEVICE_TREE="amd-versal2-mini"
+CONFIG_DEBUG_UART_BASE=0xf1920000
+CONFIG_DEBUG_UART_CLOCK=100000000
+CONFIG_SYS_MEM_RSVD_FOR_MMU=y
+# CONFIG_PSCI_RESET is not set
+CONFIG_SYS_LOAD_ADDR=0xBBF80000
+CONFIG_DEBUG_UART=y
+CONFIG_SYS_MEMTEST_START=0x00000000
+CONFIG_SYS_MEMTEST_END=0x00001000
+# CONFIG_EXPERT is not set
+CONFIG_REMAKE_ELF=y
+# CONFIG_LEGACY_IMAGE_FORMAT is not set
+# CONFIG_AUTOBOOT is not set
+# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_BOARD_EARLY_INIT_R=y
+# CONFIG_BOARD_LATE_INIT is not set
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
+# CONFIG_SYS_LONGHELP is not set
+CONFIG_SYS_PROMPT="versal2> "
+# CONFIG_CMD_CONSOLE is not set
+# CONFIG_CMD_BOOTD is not set
+# CONFIG_CMD_BOOTI is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_FDT is not set
+# CONFIG_CMD_GO is not set
+# CONFIG_CMD_RUN is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_EXPORTENV is not set
+# CONFIG_CMD_IMPORTENV is not set
+# CONFIG_CMD_EDITENV is not set
+# CONFIG_CMD_SAVEENV is not set
+# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_CRC32 is not set
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MX_CYCLIC=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_ALT_MEMTEST=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+# CONFIG_CMD_ECHO is not set
+# CONFIG_CMD_ITEST is not set
+# CONFIG_CMD_SOURCE is not set
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_CACHE=y
+# CONFIG_CMD_SLEEP is not set
+CONFIG_OF_EMBED=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+# CONFIG_NET is not set
+# CONFIG_DM_DEVICE_REMOVE is not set
+# CONFIG_GPIO is not set
+# CONFIG_I2C is not set
+# CONFIG_INPUT is not set
+# CONFIG_MMC is not set
+# CONFIG_POWER is not set
+CONFIG_DEBUG_UART_PL011=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_ARM_DCC=y
+CONFIG_PL01X_SERIAL=y
+# CONFIG_GZIP is not set
diff --git a/configs/amd_versal2_mini_emmc_defconfig b/configs/amd_versal2_mini_emmc_defconfig
new file mode 100644
index 0000000..7ad4438
--- /dev/null
+++ b/configs/amd_versal2_mini_emmc_defconfig
@@ -0,0 +1,69 @@
+CONFIG_ARM=y
+CONFIG_SYS_CONFIG_NAME="amd_versal2_mini"
+CONFIG_COUNTER_FREQUENCY=100000000
+CONFIG_ARCH_VERSAL2=y
+CONFIG_TEXT_BASE=0x10000
+CONFIG_SYS_MALLOC_LEN=0x80000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10000
+CONFIG_ENV_SIZE=0x80
+CONFIG_DEFAULT_DEVICE_TREE="amd-versal2-mini"
+CONFIG_DEBUG_UART_BASE=0xf1920000
+CONFIG_DEBUG_UART_CLOCK=100000000
+# CONFIG_PSCI_RESET is not set
+CONFIG_SYS_LOAD_ADDR=0x8000000
+CONFIG_DEBUG_UART=y
+# CONFIG_EXPERT is not set
+CONFIG_REMAKE_ELF=y
+# CONFIG_AUTOBOOT is not set
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_BOARD_EARLY_INIT_R=y
+# CONFIG_BOARD_LATE_INIT is not set
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
+# CONFIG_SYS_LONGHELP is not set
+CONFIG_SYS_PROMPT="versal2> "
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_CONSOLE is not set
+# CONFIG_CMD_BOOTD is not set
+# CONFIG_CMD_BOOTM is not set
+# CONFIG_CMD_BOOTI is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_FDT is not set
+# CONFIG_CMD_GO is not set
+# CONFIG_CMD_RUN is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_EXPORTENV is not set
+# CONFIG_CMD_IMPORTENV is not set
+# CONFIG_CMD_EDITENV is not set
+# CONFIG_CMD_SAVEENV is not set
+# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_CRC32 is not set
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_MMC=y
+# CONFIG_CMD_ECHO is not set
+# CONFIG_CMD_ITEST is not set
+# CONFIG_CMD_SOURCE is not set
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_OF_EMBED=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+# CONFIG_NET is not set
+# CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_MMC_HS200_SUPPORT=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ZYNQ=y
+CONFIG_DEBUG_UART_PL011=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_ARM_DCC=y
+CONFIG_PL01X_SERIAL=y
+CONFIG_FAT_WRITE=y
+# CONFIG_GZIP is not set
+# CONFIG_EFI_LOADER is not set
+# CONFIG_LMB is not set
diff --git a/configs/amd_versal2_mini_ospi_defconfig b/configs/amd_versal2_mini_ospi_defconfig
new file mode 100644
index 0000000..2242960
--- /dev/null
+++ b/configs/amd_versal2_mini_ospi_defconfig
@@ -0,0 +1,84 @@
+CONFIG_ARM=y
+CONFIG_SYS_CONFIG_NAME="amd_versal2_mini"
+# CONFIG_ARM64_CRC32 is not set
+CONFIG_COUNTER_FREQUENCY=100000000
+# CONFIG_ARM64_SUPPORT_AARCH32 is not set
+CONFIG_ARCH_VERSAL2=y
+CONFIG_TEXT_BASE=0xBBF00000
+CONFIG_SYS_MALLOC_LEN=0x20000
+CONFIG_SYS_MALLOC_F_LEN=0x4000
+CONFIG_NR_DRAM_BANKS=3
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xBBF20000
+CONFIG_ENV_SIZE=0x80
+CONFIG_DEFAULT_DEVICE_TREE="amd-versal2-mini"
+CONFIG_DEBUG_UART_BASE=0xf1920000
+CONFIG_DEBUG_UART_CLOCK=100000000
+CONFIG_SYS_MEM_RSVD_FOR_MMU=y
+# CONFIG_PSCI_RESET is not set
+CONFIG_SYS_LOAD_ADDR=0xBBF80000
+CONFIG_DEBUG_UART=y
+# CONFIG_EXPERT is not set
+CONFIG_REMAKE_ELF=y
+# CONFIG_LEGACY_IMAGE_FORMAT is not set
+# CONFIG_AUTOBOOT is not set
+# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_BOARD_EARLY_INIT_R=y
+# CONFIG_BOARD_LATE_INIT is not set
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
+# CONFIG_SYS_LONGHELP is not set
+CONFIG_SYS_PROMPT="versal2> "
+# CONFIG_CMD_CONSOLE is not set
+# CONFIG_CMD_BOOTD is not set
+# CONFIG_CMD_BOOTI is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_FDT is not set
+# CONFIG_CMD_GO is not set
+# CONFIG_CMD_RUN is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_EXPORTENV is not set
+# CONFIG_CMD_IMPORTENV is not set
+# CONFIG_CMD_EDITENV is not set
+# CONFIG_CMD_SAVEENV is not set
+# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_CRC32 is not set
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+# CONFIG_CMD_ECHO is not set
+# CONFIG_CMD_ITEST is not set
+# CONFIG_CMD_SOURCE is not set
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_CACHE=y
+# CONFIG_CMD_SLEEP is not set
+CONFIG_OF_EMBED=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+# CONFIG_NET is not set
+# CONFIG_DM_DEVICE_REMOVE is not set
+# CONFIG_GPIO is not set
+# CONFIG_I2C is not set
+# CONFIG_INPUT is not set
+# CONFIG_MMC is not set
+CONFIG_MTD=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH_SOFT_RESET=y
+CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y
+# CONFIG_SPI_FLASH_LOCK is not set
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_MT35XU=y
+# CONFIG_POWER is not set
+CONFIG_DEBUG_UART_PL011=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_ARM_DCC=y
+CONFIG_PL01X_SERIAL=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_CADENCE_QSPI=y
+CONFIG_HAS_CQSPI_REF_CLK=y
+CONFIG_CQSPI_REF_CLK=200000000
+CONFIG_CADENCE_OSPI_VERSAL=y
+# CONFIG_GZIP is not set
diff --git a/configs/amd_versal2_mini_qspi_defconfig b/configs/amd_versal2_mini_qspi_defconfig
new file mode 100644
index 0000000..3360c15
--- /dev/null
+++ b/configs/amd_versal2_mini_qspi_defconfig
@@ -0,0 +1,79 @@
+CONFIG_ARM=y
+CONFIG_SYS_CONFIG_NAME="amd_versal2_mini"
+# CONFIG_ARM64_CRC32 is not set
+CONFIG_COUNTER_FREQUENCY=100000000
+# CONFIG_ARM64_SUPPORT_AARCH32 is not set
+CONFIG_ARCH_VERSAL2=y
+CONFIG_TEXT_BASE=0xBBF00000
+CONFIG_SYS_MALLOC_LEN=0x20000
+CONFIG_SYS_MALLOC_F_LEN=0x4000
+CONFIG_NR_DRAM_BANKS=3
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xBBF20000
+CONFIG_ENV_SIZE=0x80
+CONFIG_DEFAULT_DEVICE_TREE="amd-versal2-mini"
+CONFIG_DEBUG_UART_BASE=0xf1920000
+CONFIG_DEBUG_UART_CLOCK=100000000
+CONFIG_SYS_MEM_RSVD_FOR_MMU=y
+# CONFIG_PSCI_RESET is not set
+CONFIG_SYS_LOAD_ADDR=0xBBF80000
+CONFIG_DEBUG_UART=y
+# CONFIG_EXPERT is not set
+CONFIG_REMAKE_ELF=y
+# CONFIG_LEGACY_IMAGE_FORMAT is not set
+# CONFIG_AUTOBOOT is not set
+# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_BOARD_EARLY_INIT_R=y
+# CONFIG_BOARD_LATE_INIT is not set
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
+# CONFIG_SYS_LONGHELP is not set
+CONFIG_SYS_PROMPT="versal2> "
+# CONFIG_CMD_CONSOLE is not set
+# CONFIG_CMD_BOOTD is not set
+# CONFIG_CMD_BOOTI is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_FDT is not set
+# CONFIG_CMD_GO is not set
+# CONFIG_CMD_RUN is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_EXPORTENV is not set
+# CONFIG_CMD_IMPORTENV is not set
+# CONFIG_CMD_EDITENV is not set
+# CONFIG_CMD_SAVEENV is not set
+# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_CRC32 is not set
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+# CONFIG_CMD_ECHO is not set
+# CONFIG_CMD_ITEST is not set
+# CONFIG_CMD_SOURCE is not set
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_CACHE=y
+# CONFIG_CMD_SLEEP is not set
+CONFIG_OF_EMBED=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+# CONFIG_NET is not set
+# CONFIG_DM_DEVICE_REMOVE is not set
+# CONFIG_GPIO is not set
+# CONFIG_I2C is not set
+# CONFIG_INPUT is not set
+# CONFIG_MMC is not set
+CONFIG_MTD=y
+CONFIG_DM_SPI_FLASH=y
+# CONFIG_SPI_FLASH_LOCK is not set
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+# CONFIG_POWER is not set
+CONFIG_DEBUG_UART_PL011=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_ARM_DCC=y
+CONFIG_PL01X_SERIAL=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_ZYNQMP_GQSPI=y
+# CONFIG_GZIP is not set
diff --git a/configs/amd_versal2_virt_defconfig b/configs/amd_versal2_virt_defconfig
index 2d611f8..c4bf771 100644
--- a/configs/amd_versal2_virt_defconfig
+++ b/configs/amd_versal2_virt_defconfig
@@ -46,6 +46,7 @@
CONFIG_BOOTP_MAY_FAIL=y
CONFIG_BOOTP_BOOTFILESIZE=y
CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_NFS=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EFIDEBUG=y
CONFIG_CMD_TIME=y
@@ -59,6 +60,7 @@
CONFIG_CMD_SQUASHFS=y
CONFIG_CMD_MTDPARTS=y
CONFIG_CMD_UBI=y
+CONFIG_MMC_SPEED_MODE_SET=y
CONFIG_PARTITION_TYPE_GUID=y
CONFIG_OF_BOARD=y
CONFIG_DTB_RESELECT=y
@@ -119,7 +121,6 @@
CONFIG_DEBUG_UART_SKIP_INIT=y
CONFIG_ARM_DCC=y
CONFIG_PL01X_SERIAL=y
-CONFIG_XILINX_UARTLITE=y
CONFIG_SOC_DEVICE=y
CONFIG_SOC_AMD_VERSAL2=y
CONFIG_SPI=y
diff --git a/configs/bitmain_antminer_s9_defconfig b/configs/bitmain_antminer_s9_defconfig
index 4bade84..afe8de8 100644
--- a/configs/bitmain_antminer_s9_defconfig
+++ b/configs/bitmain_antminer_s9_defconfig
@@ -99,4 +99,3 @@
CONFIG_SYS_TIMER_COUNTS_DOWN=y
CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y
CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y
-CONFIG_TOOLS_MKEFICAPSULE=y
diff --git a/configs/chromebook_coral_defconfig b/configs/chromebook_coral_defconfig
index 9fcac5a..b3ebc04 100644
--- a/configs/chromebook_coral_defconfig
+++ b/configs/chromebook_coral_defconfig
@@ -9,7 +9,6 @@
CONFIG_SPL_TEXT_BASE=0xfef10000
CONFIG_TPL_TEXT_BASE=0xffff8000
CONFIG_SPL_SYS_MALLOC_F_LEN=0xf000
-CONFIG_BOOTSTAGE_STASH_ADDR=0xfef00000
CONFIG_DEBUG_UART_BASE=0xde000000
CONFIG_DEBUG_UART_CLOCK=1843200
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -32,6 +31,7 @@
CONFIG_BOOTSTAGE_REPORT=y
CONFIG_SPL_BOOTSTAGE_RECORD_COUNT=10
CONFIG_BOOTSTAGE_STASH=y
+CONFIG_BOOTSTAGE_STASH_ADDR=0xfef00000
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS_SUBST=y
CONFIG_BOOTCOMMAND="tpm init; tpm startup TPM2_SU_CLEAR; bootflow scan -lb"
diff --git a/configs/corstone1000_defconfig b/configs/corstone1000_defconfig
index ab4e0fe..26e157d 100644
--- a/configs/corstone1000_defconfig
+++ b/configs/corstone1000_defconfig
@@ -66,6 +66,5 @@
CONFIG_FFA_SHARED_MM_BUF_OFFSET=0
CONFIG_FFA_SHARED_MM_BUF_ADDR=0x02000000
CONFIG_EFI_CAPSULE_ON_DISK=y
-CONFIG_EFI_IGNORE_OSINDICATIONS=y
CONFIG_FWU_MULTI_BANK_UPDATE=y
CONFIG_FWU_MDATA_V1=y
diff --git a/configs/dh_imx6_defconfig b/configs/dh_imx6_defconfig
index 41804a0..27dab9e 100644
--- a/configs/dh_imx6_defconfig
+++ b/configs/dh_imx6_defconfig
@@ -23,6 +23,7 @@
CONFIG_SPL_SERIAL=y
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_SYS_BOOTCOUNT_ADDR=0x020CC068
+CONFIG_WATCHDOG_TIMEOUT_MSECS=60000
CONFIG_SPL=y
CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y
CONFIG_ENV_OFFSET_REDUND=0x110000
@@ -127,6 +128,5 @@
CONFIG_SDP_LOADADDR=0x17ffffc0
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_SPL_USB_SDP_SUPPORT=y
-CONFIG_WATCHDOG_TIMEOUT_MSECS=60000
CONFIG_IMX_WATCHDOG=y
CONFIG_BZIP2=y
diff --git a/configs/display5_defconfig b/configs/display5_defconfig
index 7707b32..1d3336b 100644
--- a/configs/display5_defconfig
+++ b/configs/display5_defconfig
@@ -25,6 +25,7 @@
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_SYS_BOOTCOUNT_ADDR=0x020CC068
CONFIG_SPL_SYS_MALLOC_F_LEN=0x400
+CONFIG_WATCHDOG_TIMEOUT_MSECS=15000
CONFIG_SPL=y
CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y
CONFIG_ENV_OFFSET_REDUND=0x130000
@@ -127,5 +128,4 @@
CONFIG_MXC_SPI=y
CONFIG_SYSRESET=y
CONFIG_SYSRESET_WATCHDOG=y
-CONFIG_WATCHDOG_TIMEOUT_MSECS=15000
CONFIG_IMX_WATCHDOG=y
diff --git a/configs/display5_factory_defconfig b/configs/display5_factory_defconfig
index 58f4751..7c681f0 100644
--- a/configs/display5_factory_defconfig
+++ b/configs/display5_factory_defconfig
@@ -23,6 +23,7 @@
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_SYS_MALLOC_F_LEN=0x400
+CONFIG_WATCHDOG_TIMEOUT_MSECS=15000
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x130000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
@@ -134,6 +135,5 @@
CONFIG_CI_UDC=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_SPL_USB_SDP_SUPPORT=y
-CONFIG_WATCHDOG_TIMEOUT_MSECS=15000
CONFIG_IMX_WATCHDOG=y
CONFIG_PANIC_HANG=y
diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 488a259..972f418 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -29,8 +29,8 @@
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_ATF=y
# CONFIG_TPL_FRAMEWORK is not set
-# CONFIG_TPL_SYS_MALLOC_SIMPLE is not set
# CONFIG_TPL_BANNER_PRINT is not set
+# CONFIG_TPL_SYS_MALLOC_SIMPLE is not set
# CONFIG_CMD_BOOTD is not set
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_IMI is not set
diff --git a/configs/firefly-px30_defconfig b/configs/firefly-px30_defconfig
index 3fe1dc3..a1ce922 100644
--- a/configs/firefly-px30_defconfig
+++ b/configs/firefly-px30_defconfig
@@ -30,8 +30,8 @@
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_ATF=y
# CONFIG_TPL_FRAMEWORK is not set
-# CONFIG_TPL_SYS_MALLOC_SIMPLE is not set
# CONFIG_TPL_BANNER_PRINT is not set
+# CONFIG_TPL_SYS_MALLOC_SIMPLE is not set
# CONFIG_CMD_BOOTD is not set
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_IMI is not set
diff --git a/configs/ge_b1x5v2_defconfig b/configs/ge_b1x5v2_defconfig
index 20384bc..403a5a5 100644
--- a/configs/ge_b1x5v2_defconfig
+++ b/configs/ge_b1x5v2_defconfig
@@ -19,6 +19,7 @@
CONFIG_SPL_TEXT_BASE=0x00908000
CONFIG_SPL_SERIAL=y
CONFIG_BOOTCOUNT_BOOTLIMIT=10
+CONFIG_WATCHDOG_TIMEOUT_MSECS=30000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0x21ec000
CONFIG_DEBUG_UART_CLOCK=24000000
@@ -134,6 +135,5 @@
CONFIG_VIDEO=y
CONFIG_VIDEO_IPUV3=y
CONFIG_IMX_VIDEO_SKIP=y
-CONFIG_WATCHDOG_TIMEOUT_MSECS=30000
CONFIG_IMX_WATCHDOG=y
CONFIG_BCH=y
diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_bx50v3_defconfig
index 2a42938..ce5dfb4 100644
--- a/configs/ge_bx50v3_defconfig
+++ b/configs/ge_bx50v3_defconfig
@@ -11,6 +11,7 @@
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx6q-bx50v3"
CONFIG_BOOTCOUNT_BOOTLIMIT=10
+CONFIG_WATCHDOG_TIMEOUT_MSECS=8000
CONFIG_PCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_FIT=y
@@ -97,7 +98,6 @@
CONFIG_VIDEO_IPUV3=y
CONFIG_IMX_VIDEO_SKIP=y
CONFIG_IMX_HDMI=y
-CONFIG_WATCHDOG_TIMEOUT_MSECS=8000
CONFIG_IMX_WATCHDOG=y
CONFIG_BCH=y
# CONFIG_EFI_LOADER is not set
diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig
index ad99474..213a5e5 100644
--- a/configs/gwventana_emmc_defconfig
+++ b/configs/gwventana_emmc_defconfig
@@ -22,6 +22,7 @@
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x18000000
CONFIG_SPL_STACK_R=y
+CONFIG_WATCHDOG_TIMEOUT_MSECS=60000
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0xD1400
CONFIG_CMD_HDMIDETECT=y
@@ -174,5 +175,4 @@
CONFIG_SPLASH_SCREEN=y
CONFIG_SPLASH_SCREEN_ALIGN=y
CONFIG_HIDE_LOGO_VERSION=y
-CONFIG_WATCHDOG_TIMEOUT_MSECS=60000
CONFIG_IMX_WATCHDOG=y
diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig
index 96c64c8..2306cd6 100644
--- a/configs/gwventana_nand_defconfig
+++ b/configs/gwventana_nand_defconfig
@@ -22,6 +22,7 @@
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x18000000
CONFIG_SPL_STACK_R=y
+CONFIG_WATCHDOG_TIMEOUT_MSECS=60000
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x1080000
CONFIG_CMD_HDMIDETECT=y
@@ -181,5 +182,4 @@
CONFIG_SPLASH_SCREEN=y
CONFIG_SPLASH_SCREEN_ALIGN=y
CONFIG_HIDE_LOGO_VERSION=y
-CONFIG_WATCHDOG_TIMEOUT_MSECS=60000
CONFIG_IMX_WATCHDOG=y
diff --git a/configs/imx6q_bosch_acc_defconfig b/configs/imx6q_bosch_acc_defconfig
index 73ae4ac..dce1b64 100644
--- a/configs/imx6q_bosch_acc_defconfig
+++ b/configs/imx6q_bosch_acc_defconfig
@@ -18,6 +18,7 @@
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_BOOTCOUNT_BOOTLIMIT=8
+CONFIG_WATCHDOG_TIMEOUT_MSECS=60000
CONFIG_SPL_SIZE_LIMIT=69632
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x1ff000
@@ -94,7 +95,6 @@
CONFIG_DM_PMIC_PFUZE100=y
CONFIG_DM_SERIAL=y
CONFIG_MXC_UART=y
-CONFIG_WATCHDOG_TIMEOUT_MSECS=60000
CONFIG_IMX_WATCHDOG=y
CONFIG_WDT=y
CONFIG_EXT4_WRITE=y
diff --git a/configs/imx8mm_evk_defconfig b/configs/imx8mm_evk_defconfig
index 8b04586..788770b 100644
--- a/configs/imx8mm_evk_defconfig
+++ b/configs/imx8mm_evk_defconfig
@@ -41,6 +41,7 @@
CONFIG_SPL_POWER=y
CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_PROMPT="u-boot=> "
+CONFIG_CMD_CPU=y
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
# CONFIG_CMD_CRC32 is not set
@@ -68,6 +69,8 @@
CONFIG_CLK_COMPOSITE_CCF=y
CONFIG_SPL_CLK_IMX8MM=y
CONFIG_CLK_IMX8MM=y
+CONFIG_CPU=y
+CONFIG_CPU_IMX=y
CONFIG_MXC_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SUPPORT_EMMC_BOOT=y
@@ -118,6 +121,3 @@
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_SPL_USB_SDP_SUPPORT=y
CONFIG_IMX_WATCHDOG=y
-CONFIG_CPU=y
-CONFIG_CPU_IMX=y
-CONFIG_CMD_CPU=y
diff --git a/configs/imx8mn_evk_defconfig b/configs/imx8mn_evk_defconfig
index ee7a5e9..679ca71 100644
--- a/configs/imx8mn_evk_defconfig
+++ b/configs/imx8mn_evk_defconfig
@@ -50,6 +50,7 @@
CONFIG_SPL_POWER=y
CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_PROMPT="u-boot=> "
+CONFIG_CMD_CPU=y
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
CONFIG_CMD_ERASEENV=y
@@ -71,6 +72,8 @@
CONFIG_SPL_DM=y
CONFIG_SPL_CLK_IMX8MN=y
CONFIG_CLK_IMX8MN=y
+CONFIG_CPU=y
+CONFIG_CPU_IMX=y
CONFIG_MXC_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SUPPORT_EMMC_BOOT=y
@@ -105,6 +108,3 @@
CONFIG_SYSRESET_WATCHDOG=y
CONFIG_DM_THERMAL=y
CONFIG_IMX_WATCHDOG=y
-CONFIG_CPU=y
-CONFIG_CPU_IMX=y
-CONFIG_CMD_CPU=y
diff --git a/configs/imx8mp_evk_defconfig b/configs/imx8mp_evk_defconfig
index 3176069..a2c0796 100644
--- a/configs/imx8mp_evk_defconfig
+++ b/configs/imx8mp_evk_defconfig
@@ -47,6 +47,7 @@
CONFIG_SPL_POWER=y
CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_PROMPT="u-boot=> "
+CONFIG_CMD_CPU=y
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
# CONFIG_CMD_CRC32 is not set
@@ -74,6 +75,8 @@
CONFIG_SPL_DM=y
CONFIG_CLK_COMPOSITE_CCF=y
CONFIG_CLK_IMX8MP=y
+CONFIG_CPU=y
+CONFIG_CPU_IMX=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x42800000
CONFIG_FASTBOOT_BUF_SIZE=0x20000000
@@ -137,6 +140,3 @@
CONFIG_USB_GADGET_VENDOR_NUM=0x0525
CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
CONFIG_IMX_WATCHDOG=y
-CONFIG_CPU=y
-CONFIG_CPU_IMX=y
-CONFIG_CMD_CPU=y
diff --git a/configs/imx93_11x11_evk_defconfig b/configs/imx93_11x11_evk_defconfig
index 93ab0b9..6f083e0 100644
--- a/configs/imx93_11x11_evk_defconfig
+++ b/configs/imx93_11x11_evk_defconfig
@@ -48,11 +48,11 @@
CONFIG_SPL_POWER=y
CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_PROMPT="u-boot=> "
+CONFIG_CMD_CPU=y
CONFIG_CMD_ERASEENV=y
# CONFIG_CMD_CRC32 is not set
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_CLK=y
-CONFIG_CMD_CPU=y
CONFIG_CMD_DFU=y
CONFIG_CMD_FUSE=y
CONFIG_CMD_GPIO=y
diff --git a/configs/iot2050_defconfig b/configs/iot2050_defconfig
index e0c2b14..8654bf2 100644
--- a/configs/iot2050_defconfig
+++ b/configs/iot2050_defconfig
@@ -27,6 +27,7 @@
CONFIG_SPL_BSS_START_ADDR=0x80a00000
CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL_STACK_R=y
+CONFIG_WATCHDOG_TIMEOUT_MSECS=0
CONFIG_ENV_OFFSET_REDUND=0x6a0000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
@@ -147,7 +148,6 @@
CONFIG_USB_KEYBOARD=y
# CONFIG_WATCHDOG is not set
# CONFIG_WATCHDOG_AUTOSTART is not set
-CONFIG_WATCHDOG_TIMEOUT_MSECS=0
CONFIG_WDT=y
CONFIG_WDT_K3_RTI=y
CONFIG_WDT_K3_RTI_LOAD_FW=y
diff --git a/configs/j7200_evm_a72_defconfig b/configs/j7200_evm_a72_defconfig
index 4db5654..fcfa926 100644
--- a/configs/j7200_evm_a72_defconfig
+++ b/configs/j7200_evm_a72_defconfig
@@ -85,6 +85,7 @@
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_UPSTREAM=y
CONFIG_SPL_MULTI_DTB_FIT=y
CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
@@ -96,7 +97,6 @@
CONFIG_SPL_REGMAP=y
CONFIG_SPL_SYSCON=y
CONFIG_SPL_OF_TRANSLATE=y
-CONFIG_OF_UPSTREAM=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_CLK_CCF=y
diff --git a/configs/j721e_evm_r5_defconfig b/configs/j721e_evm_r5_defconfig
index ffaf21d..f1c9bbd 100644
--- a/configs/j721e_evm_r5_defconfig
+++ b/configs/j721e_evm_r5_defconfig
@@ -82,7 +82,6 @@
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_SPL_MULTI_DTB_FIT=y
-CONFIG_SPL_OF_LIST="k3-j721e-r5-common-proc-board"
CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
CONFIG_ENV_OVERWRITE=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
diff --git a/configs/j721s2_evm_a72_defconfig b/configs/j721s2_evm_a72_defconfig
index 5c3b52ba..5800e4b 100644
--- a/configs/j721s2_evm_a72_defconfig
+++ b/configs/j721s2_evm_a72_defconfig
@@ -34,9 +34,8 @@
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000
-CONFIG_OF_SYSTEM_SETUP=y
CONFIG_BOOTSTD_FULL=y
-CONFIG_BOOTSTD_DEFAULTS=y
+CONFIG_OF_SYSTEM_SETUP=y
CONFIG_BOOTCOMMAND="run envboot; bootflow scan -lb"
CONFIG_LOGLEVEL=7
CONFIG_SPL_MAX_SIZE=0xc0000
@@ -85,9 +84,8 @@
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_LIST="ti/k3-j721s2-common-proc-board"
-CONFIG_SPL_MULTI_DTB_FIT=y
CONFIG_OF_UPSTREAM=y
+CONFIG_SPL_MULTI_DTB_FIT=y
CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
diff --git a/configs/j721s2_evm_r5_defconfig b/configs/j721s2_evm_r5_defconfig
index 6404b1c..d0af664 100644
--- a/configs/j721s2_evm_r5_defconfig
+++ b/configs/j721s2_evm_r5_defconfig
@@ -83,7 +83,6 @@
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_SPL_MULTI_DTB_FIT=y
-CONFIG_SPL_OF_LIST="k3-j721s2-r5-common-proc-board"
CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
CONFIG_ENV_OVERWRITE=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
diff --git a/configs/j722s_evm_r5_defconfig b/configs/j722s_evm_r5_defconfig
index d7b99cb..8ba3916 100644
--- a/configs/j722s_evm_r5_defconfig
+++ b/configs/j722s_evm_r5_defconfig
@@ -23,7 +23,6 @@
CONFIG_SPL_BSS_START_ADDR=0x43c7b000
CONFIG_SPL_BSS_MAX_SIZE=0x3000
CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x200000
CONFIG_SPL_SIZE_LIMIT=0x3C000
CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x5000
CONFIG_SPL_FS_FAT=y
diff --git a/configs/kontron-sl-mx8mm_defconfig b/configs/kontron-sl-mx8mm_defconfig
index f257028..1b7d22b 100644
--- a/configs/kontron-sl-mx8mm_defconfig
+++ b/configs/kontron-sl-mx8mm_defconfig
@@ -148,5 +148,4 @@
CONFIG_EFI_SET_TIME=y
CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y
CONFIG_EFI_CAPSULE_ON_DISK=y
-CONFIG_EFI_IGNORE_OSINDICATIONS=y
CONFIG_EFI_CAPSULE_FIRMWARE_FIT=y
diff --git a/configs/kp_imx6q_tpc_defconfig b/configs/kp_imx6q_tpc_defconfig
index cc57ab0..fceda3f 100644
--- a/configs/kp_imx6q_tpc_defconfig
+++ b/configs/kp_imx6q_tpc_defconfig
@@ -16,6 +16,7 @@
CONFIG_SYS_MONITOR_LEN=409600
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
+CONFIG_WATCHDOG_TIMEOUT_MSECS=60000
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x102000
CONFIG_SPL_PAYLOAD="u-boot.img"
@@ -83,5 +84,4 @@
# CONFIG_SPL_DM_USB is not set
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
-CONFIG_WATCHDOG_TIMEOUT_MSECS=60000
CONFIG_IMX_WATCHDOG=y
diff --git a/configs/m53menlo_defconfig b/configs/m53menlo_defconfig
index db3a5b9..65a9875 100644
--- a/configs/m53menlo_defconfig
+++ b/configs/m53menlo_defconfig
@@ -18,11 +18,11 @@
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_SYS_BOOTCOUNT_ADDR=0x53FA401C
CONFIG_SPL_STACK=0x70004000
+CONFIG_WATCHDOG_TIMEOUT_MSECS=8000
CONFIG_SPL=y
CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y
CONFIG_ENV_OFFSET_REDUND=0x180000
CONFIG_SYS_LOAD_ADDR=0x70800000
-CONFIG_CMD_BMODE=y
CONFIG_FIT=y
CONFIG_BOOTDELAY=1
CONFIG_OF_BOARD_SETUP=y
@@ -132,5 +132,4 @@
CONFIG_VIDEO_BMP_GZIP=y
CONFIG_VIDEO_LOGO_MAX_SIZE=0x200000
CONFIG_BMP_16BPP=y
-CONFIG_WATCHDOG_TIMEOUT_MSECS=8000
CONFIG_IMX_WATCHDOG=y
diff --git a/configs/mt7629_rfb_defconfig b/configs/mt7629_rfb_defconfig
index bccbbcc..8e9306a 100644
--- a/configs/mt7629_rfb_defconfig
+++ b/configs/mt7629_rfb_defconfig
@@ -60,9 +60,7 @@
CONFIG_USE_SERVERIP=y
CONFIG_SERVERIP="192.168.1.2"
CONFIG_SPL_DM_SEQ_ALIAS=y
-CONFIG_REGMAP=y
CONFIG_SPL_REGMAP=y
-CONFIG_SYSCON=y
CONFIG_SPL_SYSCON=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
diff --git a/configs/mt8512_bm1_emmc_defconfig b/configs/mt8512_bm1_emmc_defconfig
index 2a285a5..c7ac0df 100644
--- a/configs/mt8512_bm1_emmc_defconfig
+++ b/configs/mt8512_bm1_emmc_defconfig
@@ -25,8 +25,6 @@
# CONFIG_DOS_PARTITION is not set
CONFIG_EFI_PARTITION=y
CONFIG_ENV_OVERWRITE=y
-CONFIG_REGMAP=y
-CONFIG_SYSCON=y
CONFIG_CLK=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x56000000
diff --git a/configs/mvebu_espressobin_ultra-88f3720_defconfig b/configs/mvebu_espressobin_ultra-88f3720_defconfig
index c6ffaaa..974b6df 100644
--- a/configs/mvebu_espressobin_ultra-88f3720_defconfig
+++ b/configs/mvebu_espressobin_ultra-88f3720_defconfig
@@ -11,7 +11,6 @@
CONFIG_ENV_OFFSET=0x3F0000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DM_GPIO=y
-CONFIG_OF_UPSTREAM=y
CONFIG_DEFAULT_DEVICE_TREE="marvell/armada-3720-espressobin-ultra"
CONFIG_SYS_LOAD_ADDR=0x6000000
CONFIG_PCI=y
@@ -46,6 +45,7 @@
CONFIG_CMD_SQUASHFS=y
CONFIG_CMD_FS_UUID=y
CONFIG_MAC_PARTITION=y
+CONFIG_OF_UPSTREAM=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
@@ -64,7 +64,6 @@
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_XENON=y
-CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_ISSI=y
@@ -75,8 +74,8 @@
CONFIG_SPI_FLASH_MTD=y
CONFIG_PHY_MARVELL=y
CONFIG_PHY_FIXED=y
-CONFIG_PHY_GIGE=y
CONFIG_DM_DSA=y
+CONFIG_PHY_GIGE=y
CONFIG_MV88E6XXX=y
CONFIG_MVNETA=y
CONFIG_MVMDIO=y
@@ -87,6 +86,8 @@
CONFIG_PINCTRL=y
CONFIG_PINCTRL_ARMADA_37XX=y
CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_RTC=y
+CONFIG_RTC_PCF8563=y
CONFIG_DEFAULT_ENV_IS_RW=y
CONFIG_MVEBU_A3700_UART=y
CONFIG_MVEBU_A3700_SPI=y
@@ -97,10 +98,3 @@
CONFIG_WDT=y
CONFIG_WDT_ARMADA_37XX=y
CONFIG_SHA1=y
-CONFIG_DM_RTC=y
-CONFIG_RTC_PCF8563=y
-# CONFIG_DEBUG_UART=y
-# CONFIG_DEBUG_UART_BASE=0xd0012000
-# CONFIG_DEBUG_UART_CLOCK=25804800
-# CONFIG_DEBUG_UART_SHIFT=2
-# CONFIG_DEBUG_UART_ANNOUNCE=y
diff --git a/configs/mx53ppd_defconfig b/configs/mx53ppd_defconfig
index 659de71..463cfc6 100644
--- a/configs/mx53ppd_defconfig
+++ b/configs/mx53ppd_defconfig
@@ -9,6 +9,7 @@
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx53-ppd"
CONFIG_BOOTCOUNT_BOOTLIMIT=10
+CONFIG_WATCHDOG_TIMEOUT_MSECS=8000
CONFIG_SYS_LOAD_ADDR=0x72000000
CONFIG_FIT=y
CONFIG_SUPPORT_RAW_INITRD=y
@@ -81,6 +82,5 @@
CONFIG_SYS_WHITE_ON_BLACK=y
CONFIG_VIDEO_IPUV3=y
CONFIG_IMX_VIDEO_SKIP=y
-CONFIG_WATCHDOG_TIMEOUT_MSECS=8000
CONFIG_IMX_WATCHDOG=y
CONFIG_BCH=y
diff --git a/configs/nyan-big_defconfig b/configs/nyan-big_defconfig
index 78fb758..efcc8f7 100644
--- a/configs/nyan-big_defconfig
+++ b/configs/nyan-big_defconfig
@@ -10,7 +10,6 @@
CONFIG_DEFAULT_DEVICE_TREE="tegra124-nyan-big"
CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_SPL_STACK=0x800ffffc
-CONFIG_BOOTSTAGE_STASH_ADDR=0x83000000
CONFIG_TEGRA124=y
CONFIG_TARGET_NYAN_BIG=y
CONFIG_TEGRA_GPU=y
@@ -20,6 +19,7 @@
CONFIG_BOOTSTAGE=y
CONFIG_SPL_BOOTSTAGE=y
CONFIG_BOOTSTAGE_STASH=y
+CONFIG_BOOTSTAGE_STASH_ADDR=0x83000000
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_SYS_PBSIZE=2087
CONFIG_SYS_STDIO_DEREGISTER=y
diff --git a/configs/odroid-go2_defconfig b/configs/odroid-go2_defconfig
index a9af415..b38676a 100644
--- a/configs/odroid-go2_defconfig
+++ b/configs/odroid-go2_defconfig
@@ -36,8 +36,8 @@
CONFIG_SPL_POWER=y
CONFIG_SPL_ATF=y
# CONFIG_TPL_FRAMEWORK is not set
-# CONFIG_TPL_SYS_MALLOC_SIMPLE is not set
# CONFIG_TPL_BANNER_PRINT is not set
+# CONFIG_TPL_SYS_MALLOC_SIMPLE is not set
# CONFIG_CMD_BOOTD is not set
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_IMI is not set
diff --git a/configs/phycore_am62x_r5_defconfig b/configs/phycore_am62x_r5_defconfig
index c1664c4..b7d0273 100644
--- a/configs/phycore_am62x_r5_defconfig
+++ b/configs/phycore_am62x_r5_defconfig
@@ -90,6 +90,7 @@
CONFIG_TI_SCI_PROTOCOL=y
CONFIG_DA8XX_GPIO=y
CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_OMAP24XX=y
CONFIG_DM_MAILBOX=y
CONFIG_K3_SEC_PROXY=y
CONFIG_SPL_MISC=y
@@ -130,4 +131,3 @@
CONFIG_OMAP_TIMER=y
CONFIG_LIB_RATIONAL=y
CONFIG_SPL_LIB_RATIONAL=y
-CONFIG_SYS_I2C_OMAP24XX=y
diff --git a/configs/px30-core-ctouch2-of10-px30_defconfig b/configs/px30-core-ctouch2-of10-px30_defconfig
index fdcbd8a..3d44c01 100644
--- a/configs/px30-core-ctouch2-of10-px30_defconfig
+++ b/configs/px30-core-ctouch2-of10-px30_defconfig
@@ -30,8 +30,8 @@
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_ATF=y
# CONFIG_TPL_FRAMEWORK is not set
-# CONFIG_TPL_SYS_MALLOC_SIMPLE is not set
# CONFIG_TPL_BANNER_PRINT is not set
+# CONFIG_TPL_SYS_MALLOC_SIMPLE is not set
# CONFIG_CMD_BOOTD is not set
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_IMI is not set
diff --git a/configs/px30-core-ctouch2-px30_defconfig b/configs/px30-core-ctouch2-px30_defconfig
index 343fd0b..7a65598 100644
--- a/configs/px30-core-ctouch2-px30_defconfig
+++ b/configs/px30-core-ctouch2-px30_defconfig
@@ -30,8 +30,8 @@
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_ATF=y
# CONFIG_TPL_FRAMEWORK is not set
-# CONFIG_TPL_SYS_MALLOC_SIMPLE is not set
# CONFIG_TPL_BANNER_PRINT is not set
+# CONFIG_TPL_SYS_MALLOC_SIMPLE is not set
# CONFIG_CMD_BOOTD is not set
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_IMI is not set
diff --git a/configs/px30-core-edimm2.2-px30_defconfig b/configs/px30-core-edimm2.2-px30_defconfig
index aa0bff4..0c80f40 100644
--- a/configs/px30-core-edimm2.2-px30_defconfig
+++ b/configs/px30-core-edimm2.2-px30_defconfig
@@ -30,8 +30,8 @@
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_ATF=y
# CONFIG_TPL_FRAMEWORK is not set
-# CONFIG_TPL_SYS_MALLOC_SIMPLE is not set
# CONFIG_TPL_BANNER_PRINT is not set
+# CONFIG_TPL_SYS_MALLOC_SIMPLE is not set
# CONFIG_CMD_BOOTD is not set
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_IMI is not set
diff --git a/configs/qcom_defconfig b/configs/qcom_defconfig
index 419e969..8852e83 100644
--- a/configs/qcom_defconfig
+++ b/configs/qcom_defconfig
@@ -36,9 +36,9 @@
CONFIG_CMD_REGULATOR=y
CONFIG_CMD_LOG=y
CONFIG_OF_LIVE=y
-CONFIG_BUTTON_QCOM_PMIC=y
CONFIG_USE_DEFAULT_ENV_FILE=y
CONFIG_DEFAULT_ENV_FILE="board/qualcomm/default.env"
+CONFIG_BUTTON_QCOM_PMIC=y
CONFIG_CLK=y
CONFIG_CLK_QCOM_APQ8016=y
CONFIG_CLK_QCOM_APQ8096=y
diff --git a/configs/sheep-rk3368_defconfig b/configs/sheep-rk3368_defconfig
index a591b27..00a7f79 100644
--- a/configs/sheep-rk3368_defconfig
+++ b/configs/sheep-rk3368_defconfig
@@ -8,7 +8,6 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
CONFIG_DEFAULT_DEVICE_TREE="rk3368-sheep"
CONFIG_ROCKCHIP_RK3368=y
-CONFIG_TARGET_SHEEP=y
CONFIG_DEBUG_UART_BASE=0xFF1b0000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
diff --git a/configs/socfpga_secu1_defconfig b/configs/socfpga_secu1_defconfig
index 5f68a71..b8d9c84 100644
--- a/configs/socfpga_secu1_defconfig
+++ b/configs/socfpga_secu1_defconfig
@@ -15,6 +15,7 @@
# CONFIG_SPL_MMC is not set
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x0
+CONFIG_WATCHDOG_TIMEOUT_MSECS=60000
CONFIG_TARGET_SOCFPGA_ARRIA5_SECU1=y
CONFIG_ENV_OFFSET_REDUND=0x120000
# CONFIG_SPL_LIBDISK_SUPPORT is not set
@@ -106,7 +107,6 @@
CONFIG_SPI=y
CONFIG_SPI_MEM=y
CONFIG_DESIGNWARE_SPI=y
-CONFIG_WATCHDOG_TIMEOUT_MSECS=60000
CONFIG_DESIGNWARE_WATCHDOG=y
CONFIG_WDT=y
CONFIG_SYS_TIMER_COUNTS_DOWN=y
diff --git a/configs/synquacer_developerbox_defconfig b/configs/synquacer_developerbox_defconfig
index 7e1aeac..a7b3d19 100644
--- a/configs/synquacer_developerbox_defconfig
+++ b/configs/synquacer_developerbox_defconfig
@@ -14,7 +14,6 @@
CONFIG_AHCI=y
CONFIG_FIT=y
CONFIG_SYS_BOOTM_LEN=0x800000
-CONFIG_BOOTSTAGE_STASH_SIZE=4096
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=128
CONFIG_CMD_FWU_METADATA=y
@@ -93,7 +92,6 @@
CONFIG_EFI_SET_TIME=y
CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y
CONFIG_EFI_CAPSULE_ON_DISK=y
-CONFIG_EFI_IGNORE_OSINDICATIONS=y
CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y
CONFIG_FWU_MULTI_BANK_UPDATE=y
CONFIG_FWU_MDATA_V2=y
diff --git a/configs/tanix_tx1_defconfig b/configs/tanix_tx1_defconfig
new file mode 100644
index 0000000..9915fff
--- /dev/null
+++ b/configs/tanix_tx1_defconfig
@@ -0,0 +1,25 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_DEFAULT_DEVICE_TREE="sun50i-h313-tanix-tx1"
+CONFIG_SPL=y
+CONFIG_DRAM_SUN50I_H616_DX_ODT=0x06060606
+CONFIG_DRAM_SUN50I_H616_DX_DRI=0x0d0d0d0d
+CONFIG_DRAM_SUN50I_H616_CA_DRI=0x1919
+CONFIG_DRAM_SUN50I_H616_ODT_EN=0x9988eeee
+CONFIG_DRAM_SUN50I_H616_TPR6=0x2fb08080
+CONFIG_DRAM_SUN50I_H616_TPR10=0x402f4469
+CONFIG_DRAM_SUN50I_H616_TPR11=0x0e0f0d0d
+CONFIG_DRAM_SUN50I_H616_TPR12=0x11131213
+CONFIG_MACH_SUN50I_H616=y
+CONFIG_SUNXI_DRAM_H616_LPDDR3=y
+CONFIG_R_I2C_ENABLE=y
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SPL_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
+CONFIG_AXP313_POWER=y
+CONFIG_AXP_DCDC3_VOLT=1200
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_OHCI_HCD=y
diff --git a/configs/verdin-am62_a53_defconfig b/configs/verdin-am62_a53_defconfig
index 464d0bb..25f5f5e 100644
--- a/configs/verdin-am62_a53_defconfig
+++ b/configs/verdin-am62_a53_defconfig
@@ -74,7 +74,6 @@
CONFIG_CMD_BCB=y
CONFIG_CMD_CLK=y
CONFIG_CMD_DFU=y
-CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
diff --git a/configs/work_92105_defconfig b/configs/work_92105_defconfig
index 1de6188..4b73e15 100644
--- a/configs/work_92105_defconfig
+++ b/configs/work_92105_defconfig
@@ -12,7 +12,6 @@
CONFIG_NR_DRAM_BANKS=2
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8007ff20
-CONFIG_TARGET_WORK_92105=y
CONFIG_CMD_HD44760=y
CONFIG_CMD_MAX6957=y
CONFIG_ENV_SIZE=0x20000
diff --git a/configs/xilinx_versal_net_virt_defconfig b/configs/xilinx_versal_net_virt_defconfig
index 53ef81e..40a9b16 100644
--- a/configs/xilinx_versal_net_virt_defconfig
+++ b/configs/xilinx_versal_net_virt_defconfig
@@ -58,6 +58,7 @@
CONFIG_CMD_SQUASHFS=y
CONFIG_CMD_MTDPARTS=y
CONFIG_CMD_UBI=y
+CONFIG_MMC_SPEED_MODE_SET=y
CONFIG_PARTITION_TYPE_GUID=y
CONFIG_OF_BOARD=y
CONFIG_DTB_RESELECT=y
diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig
index 915f0b9..dc1754f 100644
--- a/configs/xilinx_versal_virt_defconfig
+++ b/configs/xilinx_versal_virt_defconfig
@@ -59,6 +59,7 @@
CONFIG_CMD_SQUASHFS=y
CONFIG_CMD_MTDPARTS=y
CONFIG_CMD_UBI=y
+CONFIG_MMC_SPEED_MODE_SET=y
CONFIG_PARTITION_TYPE_GUID=y
CONFIG_OF_BOARD=y
CONFIG_ENV_IS_NOWHERE=y
diff --git a/configs/xilinx_zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig
index 9be904f..f8b6a3f 100644
--- a/configs/xilinx_zynq_virt_defconfig
+++ b/configs/xilinx_zynq_virt_defconfig
@@ -81,6 +81,7 @@
CONFIG_CMD_MTDPARTS_SPREAD=y
CONFIG_CMD_MTDPARTS_SHOW_NET_SIZES=y
CONFIG_CMD_UBI=y
+CONFIG_MMC_SPEED_MODE_SET=y
CONFIG_OF_BOARD=y
CONFIG_OF_LIST="zynq-zc702 zynq-zc706 zynq-zc770-xm010 zynq-zc770-xm011 zynq-zc770-xm011-x16 zynq-zc770-xm012 zynq-zc770-xm013 zynq-cc108 zynq-microzed zynq-minized zynq-picozed zynq-zed zynq-zturn zynq-zturn-v5 zynq-zybo zynq-zybo-z7 zynq-dlc20-rev1.0"
CONFIG_ENV_IS_NOWHERE=y
@@ -155,4 +156,3 @@
CONFIG_SPL_GZIP=y
CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y
CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y
-CONFIG_TOOLS_MKEFICAPSULE=y
diff --git a/configs/xilinx_zynqmp_kria_defconfig b/configs/xilinx_zynqmp_kria_defconfig
index 58e88b2..4c66c53 100644
--- a/configs/xilinx_zynqmp_kria_defconfig
+++ b/configs/xilinx_zynqmp_kria_defconfig
@@ -81,6 +81,7 @@
CONFIG_BOOTP_MAY_FAIL=y
CONFIG_BOOTP_BOOTFILESIZE=y
CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_NFS=y
CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EFIDEBUG=y
diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig
index fa912ae..1133134 100644
--- a/configs/xilinx_zynqmp_virt_defconfig
+++ b/configs/xilinx_zynqmp_virt_defconfig
@@ -101,6 +101,7 @@
CONFIG_CMD_MTDPARTS_SPREAD=y
CONFIG_CMD_MTDPARTS_SHOW_NET_SIZES=y
CONFIG_CMD_UBI=y
+CONFIG_MMC_SPEED_MODE_SET=y
CONFIG_PARTITION_TYPE_GUID=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_BOARD=y
diff --git a/disk/part.c b/disk/part.c
index bc93252..706d77b 100644
--- a/disk/part.c
+++ b/disk/part.c
@@ -285,6 +285,13 @@
blkcache_invalidate(desc->uclass_id, desc->devnum);
+ if (desc->part_type != PART_TYPE_UNKNOWN) {
+ for (entry = drv; entry != drv + n_ents; entry++) {
+ if (entry->part_type == desc->part_type && !entry->test(desc))
+ return;
+ }
+ }
+
desc->part_type = PART_TYPE_UNKNOWN;
for (entry = drv; entry != drv + n_ents; entry++) {
int ret;
@@ -304,7 +311,8 @@
CONFIG_IS_ENABLED(DOS_PARTITION) || \
CONFIG_IS_ENABLED(ISO_PARTITION) || \
CONFIG_IS_ENABLED(AMIGA_PARTITION) || \
- CONFIG_IS_ENABLED(EFI_PARTITION)
+ CONFIG_IS_ENABLED(EFI_PARTITION) || \
+ CONFIG_IS_ENABLED(MTD_PARTITIONS)
printf("\nPartition Map for %s device %d -- Partition Type: %s\n\n",
uclass_get_name(desc->uclass_id), desc->devnum, type);
#endif /* any CONFIG_..._PARTITION */
diff --git a/doc/develop/release_cycle.rst b/doc/develop/release_cycle.rst
index e3c13b9..776af60 100644
--- a/doc/develop/release_cycle.rst
+++ b/doc/develop/release_cycle.rst
@@ -55,7 +55,7 @@
* The Merge Window for the next release (v2024.10) is **closed**.
-* The next branch is now **closed**.
+* The next branch is now **open**.
* Release "v2024.10" is scheduled for 07 October 2024.
@@ -69,7 +69,7 @@
* U-Boot v2024.10-rc1 was released on Mon 22 July 2024.
-.. * U-Boot v2024.10-rc2 was released on Mon 05 August 2024.
+* U-Boot v2024.10-rc2 was released on Mon 05 August 2024.
.. * U-Boot v2024.10-rc3 was released on Mon 19 August 2024.
diff --git a/doc/mkeficapsule.1 b/doc/mkeficapsule.1
index c4c2057..c3d0f21 100644
--- a/doc/mkeficapsule.1
+++ b/doc/mkeficapsule.1
@@ -88,6 +88,10 @@
Capsule OEM flag, value between 0x0000 to 0xffff
.TP
+.BR -V ", " --version
+Print version information and exit.
+
+.TP
.BR -h ", " --help
Print a help message
diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c
index 512c952..312e038 100644
--- a/drivers/block/blk-uclass.c
+++ b/drivers/block/blk-uclass.c
@@ -36,6 +36,8 @@
{ UCLASS_PVBLOCK, "pvblock" },
{ UCLASS_BLKMAP, "blkmap" },
{ UCLASS_RKMTD, "rkmtd" },
+ { UCLASS_MTD, "mtd" },
+ { UCLASS_MTD, "ubi" },
};
static enum uclass_id uclass_name_to_iftype(const char *uclass_idname)
diff --git a/drivers/clk/clk_zynqmp.c b/drivers/clk/clk_zynqmp.c
index 97f3b99..a8239e2 100644
--- a/drivers/clk/clk_zynqmp.c
+++ b/drivers/clk/clk_zynqmp.c
@@ -726,6 +726,7 @@
case gem_tsu:
case qspi_ref ... can1_ref:
case usb0_bus_ref ... usb3_dual_ref:
+ case dp_video_ref ... dp_stc_ref:
return zynqmp_clk_set_peripheral_rate(priv, id,
rate, two_divs);
default:
diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig
index 4fdc964..3764e25 100644
--- a/drivers/mtd/Kconfig
+++ b/drivers/mtd/Kconfig
@@ -2,6 +2,7 @@
config MTD_PARTITIONS
bool
+ select PARTITIONS
config MTD
bool "Enable MTD layer"
@@ -31,6 +32,13 @@
into a single logical device. The larger logical device can then
be partitioned.
+config MTD_BLOCK
+ bool "Enable block device access to MTD devices"
+ depends on BLK
+ help
+ Enable support for block device access to MTD devices
+ using blk_ops abstraction.
+
config SYS_MTDPARTS_RUNTIME
bool "Allow MTDPARTS to be configured at runtime"
help
diff --git a/drivers/mtd/Makefile b/drivers/mtd/Makefile
index c2fc80b..10d575e 100644
--- a/drivers/mtd/Makefile
+++ b/drivers/mtd/Makefile
@@ -26,6 +26,7 @@
obj-y += spi/
obj-$(CONFIG_MTD_UBI) += ubi/
obj-$(CONFIG_NVMXIP) += nvmxip/
+obj-$(CONFIG_MTD_BLOCK) += mtdblock.o
#SPL/TPL build
else
diff --git a/drivers/mtd/mtdblock.c b/drivers/mtd/mtdblock.c
new file mode 100644
index 0000000..66a79b8
--- /dev/null
+++ b/drivers/mtd/mtdblock.c
@@ -0,0 +1,227 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * MTD block - abstraction over MTD subsystem, allowing
+ * to read and write in blocks using BLK UCLASS.
+ *
+ * - Read algorithm:
+ *
+ * 1. Convert start block number to start address.
+ * 2. Read block_dev->blksz bytes using mtd_read() and
+ * add to start address pointer block_dev->blksz bytes,
+ * until the requested number of blocks have been read.
+ *
+ * - Write algorithm:
+ *
+ * 1. Convert start block number to start address.
+ * 2. Round this address down by mtd->erasesize.
+ *
+ * Erase addr Start addr
+ * | |
+ * v v
+ * +----------------+----------------+----------------+
+ * | blksz | blksz | blksz |
+ * +----------------+----------------+----------------+
+ *
+ * 3. Calculate offset between this two addresses.
+ * 4. Read mtd->erasesize bytes using mtd_read() into
+ * temporary buffer from erase address.
+ *
+ * Erase addr Start addr
+ * | |
+ * v v
+ * +----------------+----------------+----------------+
+ * | blksz | blksz | blksz |
+ * +----------------+----------------+----------------+
+ * ^
+ * |
+ * |
+ * mtd_read()
+ * from here
+ *
+ * 5. Copy data from user buffer to temporary buffer with offset,
+ * calculated at step 3.
+ * 6. Erase and write mtd->erasesize bytes at erase address
+ * pointer using mtd_erase/mtd_write().
+ * 7. Add to erase address pointer mtd->erasesize bytes.
+ * 8. goto 1 until the requested number of blocks have
+ * been written.
+ *
+ * (C) Copyright 2024 SaluteDevices, Inc.
+ *
+ * Author: Alexey Romanov <avromanov@salutedevices.com>
+ */
+
+#include <blk.h>
+#include <part.h>
+#include <dm/device.h>
+#include <dm/device-internal.h>
+#include <linux/mtd/mtd.h>
+
+int mtd_bind(struct udevice *dev, struct mtd_info **mtd)
+{
+ struct blk_desc *bdesc;
+ struct udevice *bdev;
+ int ret;
+
+ ret = blk_create_devicef(dev, "mtd_blk", "blk", UCLASS_MTD,
+ -1, 512, 0, &bdev);
+ if (ret) {
+ pr_err("Cannot create block device\n");
+ return ret;
+ }
+
+ bdesc = dev_get_uclass_plat(bdev);
+ dev_set_priv(bdev, mtd);
+ bdesc->bdev = bdev;
+ bdesc->part_type = PART_TYPE_MTD;
+
+ return 0;
+}
+
+static ulong mtd_blk_read(struct udevice *dev, lbaint_t start, lbaint_t blkcnt,
+ void *dst)
+{
+ struct blk_desc *block_dev = dev_get_uclass_plat(dev);
+ struct mtd_info *mtd = blk_desc_to_mtd(block_dev);
+ unsigned int sect_size = block_dev->blksz;
+ lbaint_t cur = start;
+ ulong read_cnt = 0;
+
+ while (read_cnt < blkcnt) {
+ int ret;
+ loff_t sect_start = cur * sect_size;
+ size_t retlen;
+
+ ret = mtd_read(mtd, sect_start, sect_size, &retlen, dst);
+ if (ret)
+ return ret;
+
+ if (retlen != sect_size) {
+ pr_err("mtdblock: failed to read block 0x" LBAF "\n", cur);
+ return -EIO;
+ }
+
+ cur++;
+ dst += sect_size;
+ read_cnt++;
+ }
+
+ return read_cnt;
+}
+
+static int mtd_erase_write(struct mtd_info *mtd, uint64_t start, const void *src)
+{
+ int ret;
+ size_t retlen;
+ struct erase_info erase = { 0 };
+
+ erase.mtd = mtd;
+ erase.addr = start;
+ erase.len = mtd->erasesize;
+
+ ret = mtd_erase(mtd, &erase);
+ if (ret)
+ return ret;
+
+ ret = mtd_write(mtd, start, mtd->erasesize, &retlen, src);
+ if (ret)
+ return ret;
+
+ if (retlen != mtd->erasesize) {
+ pr_err("mtdblock: failed to read block at 0x%llx\n", start);
+ return -EIO;
+ }
+
+ return 0;
+}
+
+static ulong mtd_blk_write(struct udevice *dev, lbaint_t start, lbaint_t blkcnt,
+ const void *src)
+{
+ struct blk_desc *block_dev = dev_get_uclass_plat(dev);
+ struct mtd_info *mtd = blk_desc_to_mtd(block_dev);
+ unsigned int sect_size = block_dev->blksz;
+ lbaint_t cur = start, blocks_todo = blkcnt;
+ ulong write_cnt = 0;
+ u8 *buf;
+ int ret = 0;
+
+ buf = malloc(mtd->erasesize);
+ if (!buf)
+ return -ENOMEM;
+
+ while (blocks_todo > 0) {
+ loff_t sect_start = cur * sect_size;
+ loff_t erase_start = ALIGN_DOWN(sect_start, mtd->erasesize);
+ u32 offset = sect_start - erase_start;
+ size_t cur_size = min_t(size_t, mtd->erasesize - offset,
+ blocks_todo * sect_size);
+ size_t retlen;
+ lbaint_t written;
+
+ ret = mtd_read(mtd, erase_start, mtd->erasesize, &retlen, buf);
+ if (ret)
+ goto out;
+
+ if (retlen != mtd->erasesize) {
+ pr_err("mtdblock: failed to read block 0x" LBAF "\n", cur);
+ ret = -EIO;
+ goto out;
+ }
+
+ memcpy(buf + offset, src, cur_size);
+
+ ret = mtd_erase_write(mtd, erase_start, buf);
+ if (ret)
+ goto out;
+
+ written = cur_size / sect_size;
+
+ blocks_todo -= written;
+ cur += written;
+ src += cur_size;
+ write_cnt += written;
+ }
+
+out:
+ free(buf);
+
+ if (ret)
+ return ret;
+
+ return write_cnt;
+}
+
+static int mtd_blk_probe(struct udevice *dev)
+{
+ struct blk_desc *bdesc;
+ struct mtd_info *mtd;
+ int ret;
+
+ ret = device_probe(dev);
+ if (ret) {
+ pr_err("Probing %s failed (err=%d)\n", dev->name, ret);
+ return ret;
+ }
+
+ bdesc = dev_get_uclass_plat(dev);
+ mtd = blk_desc_to_mtd(bdesc);
+
+ if (mtd_type_is_nand(mtd))
+ pr_warn("MTD device '%s' is NAND, please use UBI devices instead\n",
+ mtd->name);
+
+ return 0;
+}
+
+static const struct blk_ops mtd_blk_ops = {
+ .read = mtd_blk_read,
+ .write = mtd_blk_write,
+};
+
+U_BOOT_DRIVER(mtd_blk) = {
+ .name = "mtd_blk",
+ .id = UCLASS_BLK,
+ .ops = &mtd_blk_ops,
+ .probe = mtd_blk_probe,
+};
diff --git a/drivers/mtd/mtdpart.c b/drivers/mtd/mtdpart.c
index be1d19b..88094b8 100644
--- a/drivers/mtd/mtdpart.c
+++ b/drivers/mtd/mtdpart.c
@@ -20,6 +20,8 @@
#endif
#include <malloc.h>
+#include <memalign.h>
+#include <part.h>
#include <linux/bug.h>
#include <linux/errno.h>
#include <linux/compat.h>
@@ -1054,3 +1056,77 @@
return mtd->size;
}
EXPORT_SYMBOL_GPL(mtd_get_device_size);
+
+static struct mtd_info *mtd_get_partition_by_index(struct mtd_info *mtd, int index)
+{
+ struct mtd_info *part;
+ int i = 0;
+
+ list_for_each_entry(part, &mtd->partitions, node)
+ if (i++ == index)
+ return part;
+
+ debug("Partition with idx=%d not found on MTD device %s\n", index, mtd->name);
+ return NULL;
+}
+
+static int __maybe_unused part_get_info_mtd(struct blk_desc *dev_desc, int part_idx,
+ struct disk_partition *info)
+{
+ struct mtd_info *master = blk_desc_to_mtd(dev_desc);
+ struct mtd_info *part;
+
+ if (!master) {
+ debug("MTD device is NULL\n");
+ return -EINVAL;
+ }
+
+ part = mtd_get_partition_by_index(master, part_idx);
+ if (!part) {
+ debug("Failed to find partition with idx=%d\n", part_idx);
+ return -EINVAL;
+ }
+
+ snprintf(info->name, PART_NAME_LEN, part->name);
+ info->start = part->offset / dev_desc->blksz;
+ info->size = part->size / dev_desc->blksz;
+ info->blksz = dev_desc->blksz;
+
+ return 0;
+}
+
+static void __maybe_unused part_print_mtd(struct blk_desc *dev_desc)
+{
+ struct mtd_info *master = blk_desc_to_mtd(dev_desc);
+ struct mtd_info *part;
+
+ if (!master)
+ return;
+
+ list_for_each_entry(part, &master->partitions, node)
+ printf("- 0x%012llx-0x%012llx : \"%s\"\n",
+ part->offset, part->offset + part->size, part->name);
+}
+
+static int part_test_mtd(struct blk_desc *dev_desc)
+{
+ struct mtd_info *master = blk_desc_to_mtd(dev_desc);
+ ALLOC_CACHE_ALIGN_BUFFER(unsigned char, buffer, dev_desc->blksz);
+
+ if (!master)
+ return -1;
+
+ if (blk_dread(dev_desc, 0, 1, (ulong *)buffer) != 1)
+ return -1;
+
+ return 0;
+}
+
+U_BOOT_PART_TYPE(mtd) = {
+ .name = "MTD",
+ .part_type = PART_TYPE_MTD,
+ .max_entries = MTD_ENTRY_NUMBERS,
+ .get_info = part_get_info_ptr(part_get_info_mtd),
+ .print = part_print_ptr(part_print_mtd),
+ .test = part_test_mtd,
+};
diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index ef50237..f5ddfbf 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -25,6 +25,7 @@
#include <watchdog.h>
#include <spi.h>
#include <spi-mem.h>
+#include <ubi_uboot.h>
#include <dm/device_compat.h>
#include <dm/devres.h>
#include <linux/bitops.h>
@@ -33,6 +34,10 @@
#include <linux/printk.h>
#endif
+struct spinand_plat {
+ struct mtd_info *mtd;
+};
+
/* SPI NAND index visible in MTD names */
static int spi_nand_idx;
@@ -1172,12 +1177,32 @@
kfree(spinand->scratchbuf);
}
+static int spinand_bind(struct udevice *dev)
+{
+ if (blk_enabled()) {
+ struct spinand_plat *plat = dev_get_plat(dev);
+ int ret;
+
+ if (CONFIG_IS_ENABLED(MTD_BLOCK)) {
+ ret = mtd_bind(dev, &plat->mtd);
+ if (ret)
+ return ret;
+ }
+
+ if (CONFIG_IS_ENABLED(UBI_BLOCK))
+ return ubi_bind(dev);
+ }
+
+ return 0;
+}
+
static int spinand_probe(struct udevice *dev)
{
struct spinand_device *spinand = dev_get_priv(dev);
struct spi_slave *slave = dev_get_parent_priv(dev);
struct mtd_info *mtd = dev_get_uclass_priv(dev);
struct nand_device *nand = spinand_to_nand(spinand);
+ struct spinand_plat *plat = dev_get_plat(dev);
int ret;
#ifndef __UBOOT__
@@ -1217,6 +1242,8 @@
if (ret)
goto err_spinand_cleanup;
+ plat->mtd = mtd;
+
return 0;
err_spinand_cleanup:
@@ -1286,4 +1313,6 @@
.of_match = spinand_ids,
.priv_auto = sizeof(struct spinand_device),
.probe = spinand_probe,
+ .bind = spinand_bind,
+ .plat_auto = sizeof(struct spinand_plat),
};
diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index 2206d73..88709a5 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -241,6 +241,8 @@
SECT_4K | USE_FSR | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES) },
{ INFO("is25lx512", 0x9d5a1a, 0, 64 * 1024, 1024,
SECT_4K | USE_FSR | SPI_NOR_4B_OPCODES | SPI_NOR_HAS_TB) },
+ { INFO("is25lp01gg", 0x9d6021, 0, 64 * 1024, 2048,
+ SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_TB) },
#endif
#ifdef CONFIG_SPI_FLASH_MACRONIX /* MACRONIX */
/* Macronix */
diff --git a/drivers/mtd/ubi/Kconfig b/drivers/mtd/ubi/Kconfig
index fd446d6..c027d89 100644
--- a/drivers/mtd/ubi/Kconfig
+++ b/drivers/mtd/ubi/Kconfig
@@ -114,5 +114,11 @@
help
Enable UBI fastmap debug
+config UBI_BLOCK
+ bool "Enable UBI block device support"
+ depends on BLK
+ help
+ Enable UBI block device support using blk_ops abstraction.
+
endif # MTD_UBI
endmenu # "Enable UBI - Unsorted block images"
diff --git a/drivers/mtd/ubi/Makefile b/drivers/mtd/ubi/Makefile
index 30d00fb..690ef9e 100644
--- a/drivers/mtd/ubi/Makefile
+++ b/drivers/mtd/ubi/Makefile
@@ -7,3 +7,4 @@
obj-$(CONFIG_MTD_UBI_FASTMAP) += fastmap.o
obj-y += misc.o
obj-y += debug.o
+obj-$(CONFIG_UBI_BLOCK) += block.o part.o
diff --git a/drivers/mtd/ubi/block.c b/drivers/mtd/ubi/block.c
new file mode 100644
index 0000000..99d5528
--- /dev/null
+++ b/drivers/mtd/ubi/block.c
@@ -0,0 +1,130 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2024 SaluteDevices, Inc.
+ *
+ * Author: Alexey Romanov <avromanov@salutedevices.com>
+ */
+
+#include <blk.h>
+#include <part.h>
+#include <ubi_uboot.h>
+#include <dm/device.h>
+#include <dm/device-internal.h>
+
+int ubi_bind(struct udevice *dev)
+{
+ struct blk_desc *bdesc;
+ struct udevice *bdev;
+ int ret;
+
+ ret = blk_create_devicef(dev, "ubi_blk", "blk", UCLASS_MTD,
+ -1, 512, 0, &bdev);
+ if (ret) {
+ pr_err("Cannot create block device");
+ return ret;
+ }
+
+ bdesc = dev_get_uclass_plat(bdev);
+
+ bdesc->bdev = bdev;
+ bdesc->part_type = PART_TYPE_UBI;
+
+ return 0;
+}
+
+static struct ubi_device *get_ubi_device(void)
+{
+ return ubi_devices[0];
+}
+
+static char *get_volume_name(int vol_id)
+{
+ struct ubi_device *ubi = get_ubi_device();
+ int i;
+
+ for (i = 0; i < (ubi->vtbl_slots + 1); i++) {
+ struct ubi_volume *volume = ubi->volumes[i];
+
+ if (!volume)
+ continue;
+
+ if (volume->vol_id >= UBI_INTERNAL_VOL_START)
+ continue;
+
+ if (volume->vol_id == vol_id)
+ return volume->name;
+ }
+
+ return NULL;
+}
+
+static ulong ubi_bread(struct udevice *dev, lbaint_t start, lbaint_t blkcnt,
+ void *dst)
+{
+ struct blk_desc *block_dev = dev_get_uclass_plat(dev);
+ char *volume_name = get_volume_name(block_dev->hwpart);
+ unsigned int size = blkcnt * block_dev->blksz;
+ loff_t offset = start * block_dev->blksz;
+ int ret;
+
+ if (!volume_name) {
+ pr_err("%s: failed to find volume name for blk=" LBAF "\n", __func__, start);
+ return -EINVAL;
+ }
+
+ ret = ubi_volume_read(volume_name, dst, offset, size);
+ if (ret) {
+ pr_err("%s: failed to read from %s UBI volume\n", __func__, volume_name);
+ return ret;
+ }
+
+ return blkcnt;
+}
+
+static ulong ubi_bwrite(struct udevice *dev, lbaint_t start, lbaint_t blkcnt,
+ const void *src)
+{
+ struct blk_desc *block_dev = dev_get_uclass_plat(dev);
+ char *volume_name = get_volume_name(block_dev->hwpart);
+ unsigned int size = blkcnt * block_dev->blksz;
+ loff_t offset = start * block_dev->blksz;
+ int ret;
+
+ if (!volume_name) {
+ pr_err("%s: failed to find volume for blk=" LBAF "\n", __func__, start);
+ return -EINVAL;
+ }
+
+ ret = ubi_volume_write(volume_name, (void *)src, offset, size);
+ if (ret) {
+ pr_err("%s: failed to write from %s UBI volume\n", __func__, volume_name);
+ return ret;
+ }
+
+ return blkcnt;
+}
+
+static int ubi_blk_probe(struct udevice *dev)
+{
+ int ret;
+
+ ret = device_probe(dev);
+ if (ret) {
+ pr_err("Probing %s failed (err=%d)\n", dev->name, ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+static const struct blk_ops ubi_blk_ops = {
+ .read = ubi_bread,
+ .write = ubi_bwrite,
+};
+
+U_BOOT_DRIVER(ubi_blk) = {
+ .name = "ubi_blk",
+ .id = UCLASS_BLK,
+ .ops = &ubi_blk_ops,
+ .probe = ubi_blk_probe,
+};
diff --git a/drivers/mtd/ubi/part.c b/drivers/mtd/ubi/part.c
new file mode 100644
index 0000000..13d1f16
--- /dev/null
+++ b/drivers/mtd/ubi/part.c
@@ -0,0 +1,99 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2024 SaluteDevices, Inc.
+ *
+ * Author: Alexey Romanov <avromanov@salutedevices.com>
+ */
+
+#include <memalign.h>
+#include <part.h>
+#include <ubi_uboot.h>
+
+static inline struct ubi_device *get_ubi_device(void)
+{
+ return ubi_devices[0];
+}
+
+static struct ubi_volume *ubi_get_volume_by_index(int vol_id)
+{
+ struct ubi_device *ubi = get_ubi_device();
+ int i;
+
+ for (i = 0; i < (ubi->vtbl_slots + 1); i++) {
+ struct ubi_volume *volume = ubi->volumes[i];
+
+ if (!volume)
+ continue;
+
+ if (volume->vol_id >= UBI_INTERNAL_VOL_START)
+ continue;
+
+ if (volume->vol_id == vol_id)
+ return volume;
+ }
+
+ return NULL;
+}
+
+static int __maybe_unused part_get_info_ubi(struct blk_desc *dev_desc, int part_idx,
+ struct disk_partition *info)
+{
+ struct ubi_volume *vol;
+
+ /*
+ * We must use part_idx - 1 instead of part_idx, because
+ * part_get_info_by_name() start indexing at 1, not 0.
+ * ubi volumes idexed starting at 0
+ */
+ vol = ubi_get_volume_by_index(part_idx - 1);
+ if (!vol)
+ return 0;
+
+ snprintf(info->name, PART_NAME_LEN, vol->name);
+
+ info->start = 0;
+ info->size = (unsigned long)vol->used_bytes / dev_desc->blksz;
+ info->blksz = dev_desc->blksz;
+
+ /* Save UBI volume ID in blk device descriptor */
+ dev_desc->hwpart = vol->vol_id;
+
+ return 0;
+}
+
+static void __maybe_unused part_print_ubi(struct blk_desc *dev_desc)
+{
+ struct ubi_device *ubi = get_ubi_device();
+ int i;
+
+ for (i = 0; i < (ubi->vtbl_slots + 1); i++) {
+ struct ubi_volume *volume = ubi->volumes[i];
+
+ if (!volume)
+ continue;
+
+ if (volume->vol_id >= UBI_INTERNAL_VOL_START)
+ continue;
+
+ printf("%d: %s\n", volume->vol_id, volume->name);
+ }
+}
+
+static int part_test_ubi(struct blk_desc *dev_desc)
+{
+ ALLOC_CACHE_ALIGN_BUFFER(unsigned char, buffer, dev_desc->blksz);
+
+ if (blk_dread(dev_desc, 0, 1, (ulong *)buffer) != 1)
+ return -1;
+
+ return 0;
+}
+
+U_BOOT_PART_TYPE(ubi) = {
+ .name = "ubi",
+ .part_type = PART_TYPE_UBI,
+ .max_entries = UBI_ENTRY_NUMBERS,
+ .get_info = part_get_info_ptr(part_get_info_ubi),
+ .print = part_print_ptr(part_print_ubi),
+ .test = part_test_ubi,
+};
diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c
index ef9a182..45270e2 100644
--- a/drivers/ram/rockchip/sdram_rk3399.c
+++ b/drivers/ram/rockchip/sdram_rk3399.c
@@ -13,6 +13,7 @@
#include <log.h>
#include <ram.h>
#include <regmap.h>
+#include <spl.h>
#include <syscon.h>
#include <asm/arch-rockchip/clock.h>
#include <asm/arch-rockchip/cru.h>
@@ -63,8 +64,6 @@
};
struct dram_info {
-#if defined(CONFIG_TPL_BUILD) || \
- (!defined(CONFIG_TPL) && defined(CONFIG_SPL_BUILD))
u32 pwrup_srefresh_exit[2];
struct chan_info chan[2];
struct clk ddr_clk;
@@ -75,7 +74,6 @@
struct rk3399_pmusgrf_regs *pmusgrf;
struct rk3399_ddr_cic_regs *cic;
const struct sdram_rk3399_ops *ops;
-#endif
struct ram_info info;
struct rk3399_pmugrf_regs *pmugrf;
};
@@ -92,9 +90,6 @@
struct rk3399_sdram_params *params);
};
-#if defined(CONFIG_TPL_BUILD) || \
- (!defined(CONFIG_TPL) && defined(CONFIG_SPL_BUILD))
-
struct rockchip_dmc_plat {
#if CONFIG_IS_ENABLED(OF_PLATDATA)
struct dtd_rockchip_rk3399_dmc dtplat;
@@ -191,6 +186,19 @@
},
};
+/**
+ * phase_sdram_init() - Check if this is the phase where SDRAM init happens
+ *
+ * Returns: true to do SDRAM init in this phase, false to not
+ */
+static bool phase_sdram_init(void)
+{
+ return spl_phase() == PHASE_TPL ||
+ (!IS_ENABLED(CONFIG_TPL) &&
+ !IS_ENABLED(CONFIG_ROCKCHIP_EXTERNAL_TPL) &&
+ !spl_in_proper());
+}
+
static struct io_setting *
lpddr4_get_io_settings(const struct rk3399_sdram_params *params, u32 mr5)
{
@@ -3021,12 +3029,13 @@
static int rk3399_dmc_of_to_plat(struct udevice *dev)
{
- struct rockchip_dmc_plat *plat = dev_get_plat(dev);
+ struct rockchip_dmc_plat *plat;
int ret;
- if (!CONFIG_IS_ENABLED(OF_REAL))
+ if (!CONFIG_IS_ENABLED(OF_REAL) || !phase_sdram_init())
return 0;
+ plat = dev_get_plat(dev);
ret = dev_read_u32_array(dev, "rockchip,sdram-params",
(u32 *)&plat->sdram_params,
sizeof(plat->sdram_params) / sizeof(u32));
@@ -3093,7 +3102,6 @@
priv->cic = syscon_get_first_range(ROCKCHIP_SYSCON_CIC);
priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
priv->pmu = syscon_get_first_range(ROCKCHIP_SYSCON_PMU);
- priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
priv->pmusgrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUSGRF);
priv->pmucru = rockchip_get_pmucru();
priv->cru = rockchip_get_cru();
@@ -3138,23 +3146,26 @@
return 0;
}
-#endif
static int rk3399_dmc_probe(struct udevice *dev)
{
-#if defined(CONFIG_TPL_BUILD) || \
- (!defined(CONFIG_TPL) && defined(CONFIG_SPL_BUILD))
- if (rk3399_dmc_init(dev))
- return 0;
-#else
struct dram_info *priv = dev_get_priv(dev);
priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
debug("%s: pmugrf = %p\n", __func__, priv->pmugrf);
- priv->info.base = CFG_SYS_SDRAM_BASE;
- priv->info.size =
- rockchip_sdram_size((phys_addr_t)&priv->pmugrf->os_reg2);
-#endif
+ if (phase_sdram_init() && rk3399_dmc_init(dev))
+ return 0;
+
+ /*
+ * There is no point in checking the SDRAM size in TPL as it is not
+ * used, so avoid the code size increment.
+ */
+ if (!IS_ENABLED(CONFIG_TPL_BUILD)) {
+ priv->info.base = CFG_SYS_SDRAM_BASE;
+ priv->info.size = rockchip_sdram_size(
+ (phys_addr_t)&priv->pmugrf->os_reg2);
+ }
+
return 0;
}
@@ -3181,10 +3192,7 @@
.id = UCLASS_RAM,
.of_match = rk3399_dmc_ids,
.ops = &rk3399_dmc_ops,
-#if defined(CONFIG_TPL_BUILD) || \
- (!defined(CONFIG_TPL) && defined(CONFIG_SPL_BUILD))
.of_to_plat = rk3399_dmc_of_to_plat,
-#endif
.probe = rk3399_dmc_probe,
.priv_auto = sizeof(struct dram_info),
#if defined(CONFIG_TPL_BUILD) || \
diff --git a/drivers/soc/soc_xilinx_zynqmp.c b/drivers/soc/soc_xilinx_zynqmp.c
index a2d5b82..0c45c78 100644
--- a/drivers/soc/soc_xilinx_zynqmp.c
+++ b/drivers/soc/soc_xilinx_zynqmp.c
@@ -44,6 +44,7 @@
ZYNQMP_VARIANT_DR_SE = BIT(4),
ZYNQMP_VARIANT_EG_SE = BIT(5),
ZYNQMP_VARIANT_TEG = BIT(6),
+ ZYNQMP_VARIANT_EG_LR = BIT(7),
};
struct zynqmp_device {
@@ -65,6 +66,11 @@
.variants = ZYNQMP_VARIANT_EG,
},
{
+ .id = 0x04689093,
+ .device = 1,
+ .variants = ZYNQMP_VARIANT_EG_LR,
+ },
+ {
.id = 0x04711093,
.device = 2,
.variants = ZYNQMP_VARIANT_EG | ZYNQMP_VARIANT_CG,
@@ -300,6 +306,8 @@
strlcat(priv->machine, "eg", sizeof(priv->machine));
} else if (device->variants & ZYNQMP_VARIANT_EG_SE) {
strlcat(priv->machine, "eg_SE", sizeof(priv->machine));
+ } else if (device->variants & ZYNQMP_VARIANT_EG_LR) {
+ strlcat(priv->machine, "eg_LR", sizeof(priv->machine));
} else if (device->variants & ZYNQMP_VARIANT_DR) {
strlcat(priv->machine, "dr", sizeof(priv->machine));
} else if (device->variants & ZYNQMP_VARIANT_DR_SE) {
diff --git a/drivers/spi/spi-sunxi.c b/drivers/spi/spi-sunxi.c
index a7333d8..88550b8 100644
--- a/drivers/spi/spi-sunxi.c
+++ b/drivers/spi/spi-sunxi.c
@@ -233,7 +233,7 @@
static void sun4i_spi_set_speed_mode(struct udevice *dev)
{
struct sun4i_spi_priv *priv = dev_get_priv(dev);
- unsigned int div;
+ unsigned int div, div_cdr2;
u32 reg;
/*
@@ -249,6 +249,8 @@
* We have two choices there. Either we can use the clock
* divide rate 1, which is calculated thanks to this formula:
* SPI_CLK = MOD_CLK / (2 ^ (cdr + 1))
+ * Or for sun6i/sun8i variants:
+ * SPI_CLK = MOD_CLK / (2 ^ cdr)
* Or we can use CDR2, which is calculated with the formula:
* SPI_CLK = MOD_CLK / (2 * (cdr + 1))
* Whether we use the former or the latter is set through the
@@ -256,18 +258,18 @@
*
* First try CDR2, and if we can't reach the expected
* frequency, fall back to CDR1.
+ * There is one exception if the requested clock is the input
+ * clock. In that case we always use CDR1 because we'll get a
+ * 1:1 ration for sun6i/sun8i variants.
*/
div = DIV_ROUND_UP(SUNXI_INPUT_CLOCK, priv->freq);
+ div_cdr2 = DIV_ROUND_UP(div, 2);
reg = readl(SPI_REG(priv, SPI_CCR));
- if ((div / 2) <= (SUN4I_CLK_CTL_CDR2_MASK + 1)) {
- div /= 2;
- if (div > 0)
- div--;
-
+ if (div != 1 && (div_cdr2 <= (SUN4I_CLK_CTL_CDR2_MASK + 1))) {
reg &= ~(SUN4I_CLK_CTL_CDR2_MASK | SUN4I_CLK_CTL_DRS);
- reg |= SUN4I_CLK_CTL_CDR2(div) | SUN4I_CLK_CTL_DRS;
+ reg |= SUN4I_CLK_CTL_CDR2(div_cdr2 - 1) | SUN4I_CLK_CTL_DRS;
} else {
div = fls(div - 1);
/* The F1C100s encodes the divider as 2^(n+1) */
diff --git a/env/sf.c b/env/sf.c
index c747e17..906b85b 100644
--- a/env/sf.c
+++ b/env/sf.c
@@ -38,14 +38,24 @@
DECLARE_GLOBAL_DATA_PTR;
+__weak int spi_get_env_dev(void)
+{
+#ifdef CONFIG_ENV_SPI_BUS
+ return CONFIG_ENV_SPI_BUS;
+#else
+ return 0;
+#endif
+}
+
static int setup_flash_device(struct spi_flash **env_flash)
{
#if CONFIG_IS_ENABLED(DM_SPI_FLASH)
struct udevice *new;
int ret;
+ int dev = spi_get_env_dev();
/* speed and mode will be read from DT */
- ret = spi_flash_probe_bus_cs(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS,
+ ret = spi_flash_probe_bus_cs(dev, CONFIG_ENV_SPI_CS,
&new);
if (ret) {
env_set_default("spi_flash_probe_bus_cs() failed", 0);
diff --git a/env/ubi.c b/env/ubi.c
index 0c3e93c..2f4ca57 100644
--- a/env/ubi.c
+++ b/env/ubi.c
@@ -53,7 +53,7 @@
if (gd->env_valid == ENV_VALID) {
puts("Writing to redundant UBI... ");
if (ubi_volume_write(CONFIG_ENV_UBI_VOLUME_REDUND,
- (void *)env_new, CONFIG_ENV_SIZE)) {
+ (void *)env_new, 0, CONFIG_ENV_SIZE)) {
printf("\n** Unable to write env to %s:%s **\n",
CONFIG_ENV_UBI_PART,
CONFIG_ENV_UBI_VOLUME_REDUND);
@@ -62,7 +62,7 @@
} else {
puts("Writing to UBI... ");
if (ubi_volume_write(CONFIG_ENV_UBI_VOLUME,
- (void *)env_new, CONFIG_ENV_SIZE)) {
+ (void *)env_new, 0, CONFIG_ENV_SIZE)) {
printf("\n** Unable to write env to %s:%s **\n",
CONFIG_ENV_UBI_PART,
CONFIG_ENV_UBI_VOLUME);
@@ -92,7 +92,7 @@
return 1;
}
- if (ubi_volume_write(CONFIG_ENV_UBI_VOLUME, (void *)env_new,
+ if (ubi_volume_write(CONFIG_ENV_UBI_VOLUME, (void *)env_new, 0,
CONFIG_ENV_SIZE)) {
printf("\n** Unable to write env to %s:%s **\n",
CONFIG_ENV_UBI_PART, CONFIG_ENV_UBI_VOLUME);
@@ -134,14 +134,14 @@
return -EIO;
}
- read1_fail = ubi_volume_read(CONFIG_ENV_UBI_VOLUME, (void *)tmp_env1,
+ read1_fail = ubi_volume_read(CONFIG_ENV_UBI_VOLUME, (void *)tmp_env1, 0,
CONFIG_ENV_SIZE);
if (read1_fail)
printf("\n** Unable to read env from %s:%s **\n",
CONFIG_ENV_UBI_PART, CONFIG_ENV_UBI_VOLUME);
read2_fail = ubi_volume_read(CONFIG_ENV_UBI_VOLUME_REDUND,
- (void *)tmp_env2, CONFIG_ENV_SIZE);
+ (void *)tmp_env2, 0, CONFIG_ENV_SIZE);
if (read2_fail)
printf("\n** Unable to read redundant env from %s:%s **\n",
CONFIG_ENV_UBI_PART, CONFIG_ENV_UBI_VOLUME_REDUND);
@@ -171,7 +171,7 @@
return -EIO;
}
- if (ubi_volume_read(CONFIG_ENV_UBI_VOLUME, buf, CONFIG_ENV_SIZE)) {
+ if (ubi_volume_read(CONFIG_ENV_UBI_VOLUME, buf, 0, CONFIG_ENV_SIZE)) {
printf("\n** Unable to read env from %s:%s **\n",
CONFIG_ENV_UBI_PART, CONFIG_ENV_UBI_VOLUME);
env_set_default(NULL, 0);
@@ -196,7 +196,7 @@
memset(env_buf, 0x0, CONFIG_ENV_SIZE);
if (ubi_volume_write(CONFIG_ENV_UBI_VOLUME,
- (void *)env_buf, CONFIG_ENV_SIZE)) {
+ (void *)env_buf, 0, CONFIG_ENV_SIZE)) {
printf("\n** Unable to erase env to %s:%s **\n",
CONFIG_ENV_UBI_PART,
CONFIG_ENV_UBI_VOLUME);
@@ -204,7 +204,7 @@
}
if (IS_ENABLED(CONFIG_SYS_REDUNDAND_ENVIRONMENT)) {
if (ubi_volume_write(ENV_UBI_VOLUME_REDUND,
- (void *)env_buf, CONFIG_ENV_SIZE)) {
+ (void *)env_buf, 0, CONFIG_ENV_SIZE)) {
printf("\n** Unable to erase env to %s:%s **\n",
CONFIG_ENV_UBI_PART,
ENV_UBI_VOLUME_REDUND);
diff --git a/include/configs/amd_versal2_mini.h b/include/configs/amd_versal2_mini.h
new file mode 100644
index 0000000..97e8f67
--- /dev/null
+++ b/include/configs/amd_versal2_mini.h
@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Configuration for AMD Versal Gen2 MINI configuration
+ *
+ * Copyright (C) 2023 - 2024, Advanced Micro Devices, Inc.
+ *
+ * Michal Simek <michal.simek@amd.com>
+ */
+
+#ifndef __CONFIG_VERSAL2_MINI_H
+#define __CONFIG_VERSAL2_MINI_H
+
+#define CFG_EXTRA_ENV_SETTINGS
+
+#include <configs/amd_versal2.h>
+
+/* Undef unneeded configs */
+#undef CFG_EXTRA_ENV_SETTINGS
+
+#endif /* __CONFIG_VERSAL2_MINI_H */
diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h
index 983a55c..6751fb5 100644
--- a/include/linux/mtd/mtd.h
+++ b/include/linux/mtd/mtd.h
@@ -26,6 +26,7 @@
#include <dm/device.h>
#endif
#include <dm/ofnode.h>
+#include <blk.h>
#define MAX_MTD_DEVICES 32
#endif
@@ -412,6 +413,30 @@
int mtd_panic_write(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen,
const u_char *buf);
+#if CONFIG_IS_ENABLED(MTD_BLOCK)
+static inline struct mtd_info *blk_desc_to_mtd(struct blk_desc *bdesc)
+{
+ void *priv = dev_get_priv(bdesc->bdev);
+
+ if (!priv)
+ return NULL;
+
+ return *((struct mtd_info **)priv);
+}
+
+int mtd_bind(struct udevice *dev, struct mtd_info **mtd);
+#else
+static inline struct mtd_info *blk_desc_to_mtd(struct blk_desc *bdesc)
+{
+ return NULL;
+}
+
+static inline int mtd_bind(struct udevice *dev, struct mtd_info **mtd)
+{
+ return -EOPNOTSUPP;
+}
+#endif
+
int mtd_read_oob(struct mtd_info *mtd, loff_t from, struct mtd_oob_ops *ops);
int mtd_write_oob(struct mtd_info *mtd, loff_t to, struct mtd_oob_ops *ops);
diff --git a/include/part.h b/include/part.h
index b187ec4..54b986c 100644
--- a/include/part.h
+++ b/include/part.h
@@ -30,12 +30,17 @@
#define PART_TYPE_ISO 0x03
#define PART_TYPE_AMIGA 0x04
#define PART_TYPE_EFI 0x05
+#define PART_TYPE_MTD 0x06
+#define PART_TYPE_UBI 0x07
/* maximum number of partition entries supported by search */
#define DOS_ENTRY_NUMBERS 8
#define ISO_ENTRY_NUMBERS 64
#define MAC_ENTRY_NUMBERS 64
#define AMIGA_ENTRY_NUMBERS 8
+#define MTD_ENTRY_NUMBERS 64
+#define UBI_ENTRY_NUMBERS UBI_MAX_VOLUMES
+
/*
* Type string for U-Boot bootable partitions
*/
diff --git a/include/spi.h b/include/spi.h
index 7e38cc2..9e98512 100644
--- a/include/spi.h
+++ b/include/spi.h
@@ -743,4 +743,6 @@
#define spi_get_ops(dev) ((struct dm_spi_ops *)(dev)->driver->ops)
#define spi_emul_get_ops(dev) ((struct dm_spi_emul_ops *)(dev)->driver->ops)
+int spi_get_env_dev(void);
+
#endif /* _SPI_H_ */
diff --git a/include/ubi_uboot.h b/include/ubi_uboot.h
index d7a8851..ea0db69 100644
--- a/include/ubi_uboot.h
+++ b/include/ubi_uboot.h
@@ -48,11 +48,20 @@
extern int ubi_init(void);
extern void ubi_exit(void);
extern int ubi_part(char *part_name, const char *vid_header_offset);
-extern int ubi_volume_write(char *volume, void *buf, size_t size);
-extern int ubi_volume_read(char *volume, char *buf, size_t size);
+extern int ubi_volume_write(char *volume, void *buf, loff_t offset, size_t size);
+extern int ubi_volume_read(char *volume, char *buf, loff_t offset, size_t size);
extern struct ubi_device *ubi_devices[];
int cmd_ubifs_mount(char *vol_name);
int cmd_ubifs_umount(void);
+#if IS_ENABLED(CONFIG_UBI_BLOCK)
+int ubi_bind(struct udevice *dev);
+#else
+static inline int ubi_bind(struct udevice *dev)
+{
+ return -EOPNOTSUPP;
+}
+#endif
+
#endif
diff --git a/include/zynqpl.h b/include/zynqpl.h
index d7dc064..08d067d 100644
--- a/include/zynqpl.h
+++ b/include/zynqpl.h
@@ -20,9 +20,11 @@
#define XILINX_ZYNQ_XC7Z007S 0x3
#define XILINX_ZYNQ_XC7Z010 0x2
+#define XILINX_ZYNQ_XC7Z010_LR 0x4
#define XILINX_ZYNQ_XC7Z012S 0x1c
#define XILINX_ZYNQ_XC7Z014S 0x8
#define XILINX_ZYNQ_XC7Z015 0x1b
+#define XILINX_ZYNQ_XC7Z020_LR 0x9
#define XILINX_ZYNQ_XC7Z020 0x7
#define XILINX_ZYNQ_XC7Z030 0xc
#define XILINX_ZYNQ_XC7Z035 0x12
@@ -32,9 +34,11 @@
/* Device Image Sizes */
#define XILINX_XC7Z007S_SIZE 16669920/8
#define XILINX_XC7Z010_SIZE 16669920/8
+#define XILINX_XC7Z010_LR_SIZE 16669920/8
#define XILINX_XC7Z012S_SIZE 28085344/8
#define XILINX_XC7Z014S_SIZE 32364512/8
#define XILINX_XC7Z015_SIZE 28085344/8
+#define XILINX_XC7Z020_LR_SIZE 32364512/8
#define XILINX_XC7Z020_SIZE 32364512/8
#define XILINX_XC7Z030_SIZE 47839328/8
#define XILINX_XC7Z035_SIZE 106571232/8
@@ -44,9 +48,11 @@
/* Device Names */
#define XILINX_XC7Z007S_NAME "7z007s"
#define XILINX_XC7Z010_NAME "7z010"
+#define XILINX_XC7Z010_LR_NAME "xc7z010_lr"
#define XILINX_XC7Z012S_NAME "7z012s"
#define XILINX_XC7Z014S_NAME "7z014s"
#define XILINX_XC7Z015_NAME "7z015"
+#define XILINX_XC7Z020_LR_NAME "xa7z020_lr"
#define XILINX_XC7Z020_NAME "7z020"
#define XILINX_XC7Z030_NAME "7z030"
#define XILINX_XC7Z035_NAME "7z035"
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 5b3b26d..6865f78 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -1668,8 +1668,16 @@
{
int ret = -ENOENT;
- /* If allowing a bloblist, check that first */
- if (CONFIG_IS_ENABLED(BLOBLIST)) {
+ /*
+ * If allowing a bloblist, check that first. There was discussion about
+ * adding an OF_BLOBLIST Kconfig, but this was rejected.
+ *
+ * The necessary test is whether the previous phase passed a bloblist,
+ * not whether this phase creates one.
+ */
+ if (CONFIG_IS_ENABLED(BLOBLIST) &&
+ (spl_prev_phase() != PHASE_TPL ||
+ !IS_ENABLED(CONFIG_TPL_BLOBLIST))) {
ret = bloblist_maybe_init();
if (!ret) {
gd->fdt_blob = bloblist_find(BLOBLISTT_CONTROL_FDT, 0);
diff --git a/tools/binman/btool/mkeficapsule.py b/tools/binman/btool/mkeficapsule.py
index ef1da63..f7e5a88 100644
--- a/tools/binman/btool/mkeficapsule.py
+++ b/tools/binman/btool/mkeficapsule.py
@@ -33,7 +33,8 @@
commandline, or through a config file.
"""
def __init__(self, name):
- super().__init__(name, 'mkeficapsule tool for generating capsules')
+ super().__init__(name, 'mkeficapsule tool for generating capsules',
+ r'mkeficapsule version (.*)')
def generate_capsule(self, image_index, image_guid, hardware_instance,
payload, output_fname, priv_key, pub_key,
diff --git a/tools/binman/etype/efi_capsule.py b/tools/binman/etype/efi_capsule.py
index 751f654..5941545 100644
--- a/tools/binman/etype/efi_capsule.py
+++ b/tools/binman/etype/efi_capsule.py
@@ -148,8 +148,11 @@
self.fw_version,
self.oem_flags)
if ret is not None:
- os.remove(payload)
return tools.read_file(capsule_fname)
+ else:
+ # Bintool is missing; just use the input data as the output
+ self.record_missing_bintool(self.mkeficapsule)
+ return data
def AddBintools(self, btools):
self.mkeficapsule = self.AddBintool(btools, 'mkeficapsule')
diff --git a/tools/mkeficapsule.c b/tools/mkeficapsule.c
index 6a261ff..f28008a 100644
--- a/tools/mkeficapsule.c
+++ b/tools/mkeficapsule.c
@@ -21,6 +21,8 @@
#include <gnutls/pkcs7.h>
#include <gnutls/abstract.h>
+#include <version.h>
+
#include "eficapsule.h"
static const char *tool_name = "mkeficapsule";
@@ -28,7 +30,7 @@
efi_guid_t efi_guid_fm_capsule = EFI_FIRMWARE_MANAGEMENT_CAPSULE_ID_GUID;
efi_guid_t efi_guid_cert_type_pkcs7 = EFI_CERT_TYPE_PKCS7_GUID;
-static const char *opts_short = "g:i:I:v:p:c:m:o:dhARD";
+static const char *opts_short = "g:i:I:v:p:c:m:o:dhARDV";
enum {
CAPSULE_NORMAL_BLOB = 0,
@@ -70,6 +72,7 @@
"\t-R, --fw-revert firmware revert capsule, takes no GUID, no image blob\n"
"\t-o, --capoemflag Capsule OEM Flag, an integer between 0x0000 and 0xffff\n"
"\t-D, --dump-capsule dump the contents of the capsule headers\n"
+ "\t-V, --version show version number\n"
"\t-h, --help print a help message\n",
tool_name);
}
@@ -969,9 +972,12 @@
case 'D':
capsule_dump = true;
break;
+ case 'V':
+ printf("mkeficapsule version %s\n", PLAIN_VERSION);
+ exit(EXIT_SUCCESS);
default:
print_usage();
- exit(EXIT_SUCCESS);
+ exit(EXIT_FAILURE);
}
}
diff --git a/tools/sunxi_toc0.c b/tools/sunxi_toc0.c
index 292649f..7669364 100644
--- a/tools/sunxi_toc0.c
+++ b/tools/sunxi_toc0.c
@@ -444,7 +444,7 @@
/* If a digest was provided, compare it to the embedded digest. */
extension = &totalSequence->mainSequence.explicit3.extension;
- if (digest && memcmp(&extension->digest, digest, SHA256_DIGEST_LENGTH)) {
+ if (memcmp(&extension->digest, digest, SHA256_DIGEST_LENGTH)) {
pr_err("Wrong firmware digest in certificate\n");
goto err;
}