tree 7a31ef4ed2464dcc7901ed640e105c1e630ef378
parent df403b79f1b7f6975801a96344085fc7d70986f5
author Moti Buskila <motib@marvell.com> 1613751069 +0100
committer Stefan Roese <sr@denx.de> 1614331349 +0100

ddr: marvell: a38x: fix write leveling suplementary algo

commit ce62bef8fac559e27245259882e45f19cdc293ad upstream.

- fix JIRA A7K8K-5056
- remove TEST_PATTERN write at the load patern stage earlier to WL SUP stage
- the WL SUP stage already writes this pattern to the memory, if the pattern exist at the memory
  then the algorithm will fail, since it think that there are no phase to correct

Signed-off-by: Moti Buskila <motib@marvell.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz>