| commit | 007d4973328694abceaa8f3d22bc7402d594c4c3 | [log] [tgz] |
|---|---|---|
| author | Svyatoslav Ryhel <clamor95@gmail.com> | Fri Nov 15 21:13:15 2024 +0200 |
| committer | Svyatoslav Ryhel <clamor95@gmail.com> | Wed Feb 12 10:35:17 2025 +0200 |
| tree | 856bf0124ef4ab52dcff3c0af1287f071715e2f2 | |
| parent | f806d9c2139b29dd91da434404ce9e3e513e0233 [diff] |
ARM: tegra124: clock: implement PLLD2 support PLLD2 is a simple clock (controlled by 2 registers) and appears starting from T30. Primary use of PLLD2 is as main HDMI clock parent. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>