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developerd0c89452024-10-11 16:53:27 +08001From c2753e78a28cc8efca84dcf1e7d33dff6ccfa528 Mon Sep 17 00:00:00 2001
developer05f3b2b2024-08-19 19:17:34 +08002From: Peter Chiu <chui-hao.chiu@mediatek.com>
3Date: Wed, 29 May 2024 18:45:50 +0800
developerd0c89452024-10-11 16:53:27 +08004Subject: [PATCH 134/223] mtk: mt76: mt7996: add debugfs knob to show mlo
developer05f3b2b2024-08-19 19:17:34 +08005 related table
6
7Add the following debugfs knob
8- /sys/kernel/debug/ieee80211/phy0/mt76/mat_table
9- /sys/kernel/debug/ieee80211/phy0/mt76/band0/agg_table
10- /sys/kernel/debug/ieee80211/phy0/mt76/band0/rmac_table
11
developerd0c89452024-10-11 16:53:27 +080012Change-Id: Ia161e56146f7a9e8c5d124e161230d202ae1d0a8
developer05f3b2b2024-08-19 19:17:34 +080013Signed-off-by: Peter Chiu <chui-hao.chiu@mediatek.com>
14---
15 mt7996/debugfs.c | 3 +-
16 mt7996/mt7996.h | 3 +-
17 mt7996/mtk_debug_i.h | 24 +++++++++++
18 mt7996/mtk_debugfs_i.c | 92 +++++++++++++++++++++++++++++++++++++++++-
19 4 files changed, 119 insertions(+), 3 deletions(-)
20
21diff --git a/mt7996/debugfs.c b/mt7996/debugfs.c
developerd0c89452024-10-11 16:53:27 +080022index bafbcda1..240c6d46 100644
developer05f3b2b2024-08-19 19:17:34 +080023--- a/mt7996/debugfs.c
24+++ b/mt7996/debugfs.c
25@@ -1107,6 +1107,7 @@ int mt7996_init_band_debugfs(struct mt7996_phy *phy)
26
27 #ifdef CONFIG_MTK_DEBUG
28 mt7996_mtk_init_band_debugfs(phy, dir);
29+ mt7996_mtk_init_band_debugfs_internal(phy, dir);
30 #endif
31 return 0;
32 }
33@@ -1143,7 +1144,7 @@ int mt7996_init_dev_debugfs(struct mt7996_phy *phy)
34 if (phy == &dev->phy) {
35 dev->debugfs_dir = dir;
36 #ifdef CONFIG_MTK_DEBUG
37- mt7996_mtk_init_debugfs_internal(phy, dir);
38+ mt7996_mtk_init_dev_debugfs_internal(phy, dir);
39 #endif
40 }
41
42diff --git a/mt7996/mt7996.h b/mt7996/mt7996.h
developerd0c89452024-10-11 16:53:27 +080043index 984ae79e..8af3c400 100644
developer05f3b2b2024-08-19 19:17:34 +080044--- a/mt7996/mt7996.h
45+++ b/mt7996/mt7996.h
developerd0c89452024-10-11 16:53:27 +080046@@ -1326,7 +1326,8 @@ void mt7996_packet_log_to_host(struct mt7996_dev *dev, const void *data, int len
developer05f3b2b2024-08-19 19:17:34 +080047 void mt7996_dump_bmac_rxd_info(struct mt7996_dev *dev, __le32 *rxd);
48 void mt7996_dump_bmac_txd_info(struct seq_file *s, struct mt7996_dev *dev,
49 __le32 *txd, bool is_hif_txd, bool dump_txp);
50-int mt7996_mtk_init_debugfs_internal(struct mt7996_phy *phy, struct dentry *dir);
51+int mt7996_mtk_init_dev_debugfs_internal(struct mt7996_phy *phy, struct dentry *dir);
52+int mt7996_mtk_init_band_debugfs_internal(struct mt7996_phy *phy, struct dentry *dir);
53 #endif
54
55 #ifdef CONFIG_NET_MEDIATEK_SOC_WED
56diff --git a/mt7996/mtk_debug_i.h b/mt7996/mtk_debug_i.h
57index d3756fa2..cec8d57e 100644
58--- a/mt7996/mtk_debug_i.h
59+++ b/mt7996/mtk_debug_i.h
60@@ -982,6 +982,30 @@
61 #define HIF_TXP_ML_SHIFT 16
62 #define HIF_TXP_ML_MASK 0xffff0000
63
64+/* UWTBL */
65+#define MT_WF_UWTBL_BASE 0x820c4000
66+#define MT_WF_UWTBL(ofs) (MT_WF_UWTBL_BASE + (ofs))
67+
68+#define MT_WF_UWTBL_ITCR MT_WF_UWTBL(0x130)
69+#define MT_WF_UWTBL_ITCR0 MT_WF_UWTBL(0x138)
70+#define MT_WF_UWTBL_ITCR1 MT_WF_UWTBL(0x13c)
71+
72+#define MT_WF_UWTBL_ITCR_SET BIT(31)
73+#define MT_WF_UWTBL_ITCR_INDEX GENMASK(5, 0)
74+
75+/* RMAC */
76+#define MT_WF_RMAC_SRAM_DATA0(_band) MT_WF_RMAC(_band, 0x210)
77+#define MT_WF_RMAC_SRAM_DATA1(_band) MT_WF_RMAC(_band, 0x214)
78+#define MT_WF_RMAC_SRAM_BITMAP0(_band) MT_WF_RMAC(_band, 0x220)
79+#define MT_WF_RMAC_SRAM_BITMAP1(_band) MT_WF_RMAC(_band, 0x224)
80+#define MT_WF_RMAC_MEM_CTRL(_band) MT_WF_RMAC(_band, 0x228)
81+
82+#define MT_WF_RMAC_MEM_CRTL_TRIG BIT(31)
83+#define MT_WF_RMAC_MEM_CRTL_TDX GENMASK(7, 0)
84+
85+/* AGG */
86+#define MT_AGG_REMAP_CTRL(_band) MT_WF_AGG(_band, 0x094)
87+#define MT_AGG_REMAP_CTRL_OM_REMAP GENMASK(5, 0)
88 #endif
89
90 #endif
91diff --git a/mt7996/mtk_debugfs_i.c b/mt7996/mtk_debugfs_i.c
92index ea412cd5..839c3e31 100644
93--- a/mt7996/mtk_debugfs_i.c
94+++ b/mt7996/mtk_debugfs_i.c
95@@ -695,7 +695,86 @@ static int mt7996_rx_msdu_pg_read(struct seq_file *s, void *data)
96 return 0;
97 }
98
99-int mt7996_mtk_init_debugfs_internal(struct mt7996_phy *phy, struct dentry *dir)
100+static int
101+mt7996_mat_table_show(struct seq_file *s, void *data)
102+{
103+#define MT_MAX_MAT_TABLE_SIZE 63
104+ struct mt7996_dev *dev = s->private;
105+ int i;
106+
107+ for (i = 0; i < MT_MAX_MAT_TABLE_SIZE; i++) {
108+ u32 req = MT_WF_UWTBL_ITCR_SET |
109+ u32_encode_bits(i, MT_WF_UWTBL_ITCR_INDEX);
110+ u32 dw[2];
111+ u8 *addr = (u8 *)dw;
112+
113+ mt76_wr(dev, MT_WF_UWTBL_ITCR, req);
114+ dw[0] = mt76_rr(dev, MT_WF_UWTBL_ITCR0);
115+ dw[1] = mt76_rr(dev, MT_WF_UWTBL_ITCR1);
116+
117+ if (dw[0] || dw[1])
118+ seq_printf(s, "own_mld_id%d\tAddr: %pM\n", i, addr);
119+ }
120+ return 0;
121+}
122+DEFINE_SHOW_ATTRIBUTE(mt7996_mat_table);
123+
124+static int
125+mt7996_rmac_table_show(struct seq_file *s, void *data)
126+{
127+ struct mt7996_phy *phy = s->private;
128+ struct mt7996_dev *dev = phy->dev;
129+ unsigned long usage_bitmap[2] = {0};
130+ int i, j;
131+ u8 band = phy->mt76->band_idx;
132+
133+ usage_bitmap[0] = (unsigned long)mt76_rr(dev, MT_WF_RMAC_SRAM_BITMAP0(band));
134+ usage_bitmap[1] = (unsigned long)mt76_rr(dev, MT_WF_RMAC_SRAM_BITMAP1(band));
135+
136+ for (i = 0; i < 2; i++) {
137+ for_each_set_bit(j, &usage_bitmap[i], 32) {
138+ u32 req = MT_WF_RMAC_MEM_CRTL_TRIG |
139+ u32_encode_bits(i * 32 + j, MT_WF_RMAC_MEM_CRTL_TDX);
140+ u32 dw[2];
141+ u8 *addr = (u8 *)dw;
142+
143+ mt76_wr(dev, MT_WF_RMAC_MEM_CTRL(band), req);
144+ dw[0] = mt76_rr(dev, MT_WF_RMAC_SRAM_DATA0(band));
145+ dw[1] = mt76_rr(dev, MT_WF_RMAC_SRAM_DATA1(band));
146+
147+ seq_printf(s, "omac_idx%d\tAddr: %pM\n", i * 32 + j, addr);
148+ }
149+ }
150+
151+ return 0;
152+}
153+DEFINE_SHOW_ATTRIBUTE(mt7996_rmac_table);
154+
155+static int
156+mt7996_agg_table_show(struct seq_file *s, void *data)
157+{
158+ struct mt7996_phy *phy = s->private;
159+ struct mt7996_dev *dev = phy->dev;
160+ int i, j;
161+ u8 band = phy->mt76->band_idx;
162+
163+ for (i = 0; i < 4; i++) {
164+ u32 value = mt76_rr(dev, MT_AGG_REMAP_CTRL(band) + 4 * i);
165+
166+ for (j = 0; j < 4; j++) {
167+ u8 shift = 8 * j;
168+ u32 mask = MT_AGG_REMAP_CTRL_OM_REMAP << shift;
169+
170+ seq_printf(s, "idx%d: %d\n", i * 4 + j,
171+ (value & mask) >> shift);
172+ }
173+ }
174+
175+ return 0;
176+}
177+DEFINE_SHOW_ATTRIBUTE(mt7996_agg_table);
178+
179+int mt7996_mtk_init_dev_debugfs_internal(struct mt7996_phy *phy, struct dentry *dir)
180 {
181 struct mt7996_dev *dev = phy->dev;
182
183@@ -714,7 +793,18 @@ int mt7996_mtk_init_debugfs_internal(struct mt7996_phy *phy, struct dentry *dir)
184 mt7996_pse_fid_read);
185
186 debugfs_create_u8("dump_ple_txd", 0600, dir, &dev->dbg.dump_ple_txd);
187+
188+ /* MLO related Table */
189+ debugfs_create_file("mat_table", 0400, dir, dev, &mt7996_mat_table_fops);
190 return 0;
191 }
192
193+int mt7996_mtk_init_band_debugfs_internal(struct mt7996_phy *phy, struct dentry *dir)
194+{
195+ /* MLO related Table */
196+ debugfs_create_file("rmac_table", 0400, dir, phy, &mt7996_rmac_table_fops);
197+ debugfs_create_file("agg_table", 0400, dir, phy, &mt7996_agg_table_fops);
198+
199+ return 0;
200+}
201 #endif
202--
developerd0c89452024-10-11 16:53:27 +08002032.45.2
developer05f3b2b2024-08-19 19:17:34 +0800204