blob: 0e6a4bfb24f964c644f42b5f98cc85be0a924fff [file] [log] [blame]
developer60a3d662023-02-07 15:24:34 +08001From 664c9ad764c5ec77923ec6a70623e7b294a4bf60 Mon Sep 17 00:00:00 2001
developer13655da2023-01-10 19:53:25 +08002From: Sujuan Chen <sujuan.chen@mediatek.com>
3Date: Fri, 6 Jan 2023 18:18:50 +0800
developer60a3d662023-02-07 15:24:34 +08004Subject: [PATCH 3008/3010] mt76: mt7915: wed: add rxwi for further in chip rro
developer57c8f1a2022-12-15 14:09:45 +08005
developer13655da2023-01-10 19:53:25 +08006Signed-off-by: Sujuan Chen <sujuan.chen@mediatek.com>
developer57c8f1a2022-12-15 14:09:45 +08007---
developer60a3d662023-02-07 15:24:34 +08008 dma.c | 93 +++++++++++++++++++++++++------------------------
9 mac80211.c | 2 +-
10 mt76.h | 24 ++++++++-----
11 mt7915/dma.c | 2 --
12 mt7915/mmio.c | 27 +++++++-------
13 mt7915/mt7915.h | 1 +
14 tx.c | 16 ++++-----
15 7 files changed, 86 insertions(+), 79 deletions(-)
developer57c8f1a2022-12-15 14:09:45 +080016
17diff --git a/dma.c b/dma.c
developer60a3d662023-02-07 15:24:34 +080018index 86b0bf84..76af6506 100644
developer57c8f1a2022-12-15 14:09:45 +080019--- a/dma.c
20+++ b/dma.c
21@@ -59,17 +59,17 @@ mt76_alloc_txwi(struct mt76_dev *dev)
22 return t;
23 }
24
25-static struct mt76_txwi_cache *
26+static struct mt76_rxwi_cache *
27 mt76_alloc_rxwi(struct mt76_dev *dev)
28 {
29- struct mt76_txwi_cache *t;
30+ struct mt76_rxwi_cache *r;
31
32- t = kzalloc(L1_CACHE_ALIGN(sizeof(*t)), GFP_ATOMIC);
33- if (!t)
34+ r = kzalloc(L1_CACHE_ALIGN(sizeof(*r)), GFP_ATOMIC);
35+ if (!r)
36 return NULL;
37
38- t->ptr = NULL;
39- return t;
40+ r->ptr = NULL;
41+ return r;
42 }
43
44 static struct mt76_txwi_cache *
45@@ -88,20 +88,20 @@ __mt76_get_txwi(struct mt76_dev *dev)
46 return t;
47 }
48
49-static struct mt76_txwi_cache *
50+static struct mt76_rxwi_cache *
51 __mt76_get_rxwi(struct mt76_dev *dev)
52 {
53- struct mt76_txwi_cache *t = NULL;
54+ struct mt76_rxwi_cache *r = NULL;
55
56- spin_lock(&dev->wed_lock);
57+ spin_lock(&dev->lock);
58 if (!list_empty(&dev->rxwi_cache)) {
59- t = list_first_entry(&dev->rxwi_cache, struct mt76_txwi_cache,
60+ r = list_first_entry(&dev->rxwi_cache, struct mt76_rxwi_cache,
61 list);
62- list_del(&t->list);
63+ list_del(&r->list);
64 }
65- spin_unlock(&dev->wed_lock);
66+ spin_unlock(&dev->lock);
67
68- return t;
69+ return r;
70 }
71
72 static struct mt76_txwi_cache *
73@@ -115,13 +115,13 @@ mt76_get_txwi(struct mt76_dev *dev)
74 return mt76_alloc_txwi(dev);
75 }
76
77-struct mt76_txwi_cache *
78+struct mt76_rxwi_cache *
79 mt76_get_rxwi(struct mt76_dev *dev)
80 {
81- struct mt76_txwi_cache *t = __mt76_get_rxwi(dev);
82+ struct mt76_rxwi_cache *r = __mt76_get_rxwi(dev);
83
84- if (t)
85- return t;
86+ if (r)
87+ return r;
88
89 return mt76_alloc_rxwi(dev);
90 }
91@@ -140,14 +140,14 @@ mt76_put_txwi(struct mt76_dev *dev, struct mt76_txwi_cache *t)
92 EXPORT_SYMBOL_GPL(mt76_put_txwi);
93
94 void
95-mt76_put_rxwi(struct mt76_dev *dev, struct mt76_txwi_cache *t)
96+mt76_put_rxwi(struct mt76_dev *dev, struct mt76_rxwi_cache *r)
97 {
98- if (!t)
99+ if (!r)
100 return;
101
102- spin_lock(&dev->wed_lock);
103- list_add(&t->list, &dev->rxwi_cache);
104- spin_unlock(&dev->wed_lock);
105+ spin_lock(&dev->lock);
106+ list_add(&r->list, &dev->rxwi_cache);
107+ spin_unlock(&dev->lock);
108 }
109 EXPORT_SYMBOL_GPL(mt76_put_rxwi);
110
111@@ -168,13 +168,13 @@ mt76_free_pending_txwi(struct mt76_dev *dev)
112 void
113 mt76_free_pending_rxwi(struct mt76_dev *dev)
114 {
115- struct mt76_txwi_cache *t;
116+ struct mt76_rxwi_cache *r;
117
118 local_bh_disable();
119- while ((t = __mt76_get_rxwi(dev)) != NULL) {
120- if (t->ptr)
developer60a3d662023-02-07 15:24:34 +0800121- mt76_put_page_pool_buf(t->ptr, false);
developer57c8f1a2022-12-15 14:09:45 +0800122- kfree(t);
123+ while ((r = __mt76_get_rxwi(dev)) != NULL) {
124+ if (r->ptr)
developer60a3d662023-02-07 15:24:34 +0800125+ mt76_put_page_pool_buf(r->ptr, false);
developer57c8f1a2022-12-15 14:09:45 +0800126+ kfree(r);
127 }
128 local_bh_enable();
129 }
developer60a3d662023-02-07 15:24:34 +0800130@@ -212,7 +212,7 @@ mt76_dma_add_rx_buf(struct mt76_dev *dev, struct mt76_queue *q,
developer13655da2023-01-10 19:53:25 +0800131 {
132 struct mt76_desc *desc = &q->desc[q->head];
133 struct mt76_queue_entry *entry = &q->entry[q->head];
developer60a3d662023-02-07 15:24:34 +0800134- struct mt76_txwi_cache *txwi = NULL;
135+ struct mt76_rxwi_cache *rxwi = NULL;
136 u32 buf1 = 0, ctrl;
137 int idx = q->head;
138 int rx_token;
139@@ -220,13 +220,13 @@ mt76_dma_add_rx_buf(struct mt76_dev *dev, struct mt76_queue *q,
140 ctrl = FIELD_PREP(MT_DMA_CTL_SD_LEN0, buf[0].len);
developer13655da2023-01-10 19:53:25 +0800141
developer60a3d662023-02-07 15:24:34 +0800142 if (mt76_queue_is_wed_rx(q)) {
143- txwi = mt76_get_rxwi(dev);
144- if (!txwi)
145+ rxwi = mt76_get_rxwi(dev);
146+ if (!rxwi)
147 return -ENOMEM;
developer13655da2023-01-10 19:53:25 +0800148
149- rx_token = mt76_rx_token_consume(dev, data, txwi, buf->addr);
150+ rx_token = mt76_rx_token_consume(dev, data, rxwi, buf->addr);
151 if (rx_token < 0) {
152- mt76_put_rxwi(dev, txwi);
153+ mt76_put_rxwi(dev, rxwi);
154 return -ENOMEM;
155 }
156
developer60a3d662023-02-07 15:24:34 +0800157@@ -241,7 +241,7 @@ mt76_dma_add_rx_buf(struct mt76_dev *dev, struct mt76_queue *q,
developer13655da2023-01-10 19:53:25 +0800158
159 entry->dma_addr[0] = buf->addr;
160 entry->dma_len[0] = buf->len;
161- entry->txwi = txwi;
162+ entry->rxwi = rxwi;
163 entry->buf = data;
164 entry->wcid = 0xffff;
165 entry->skip_buf1 = true;
developer60a3d662023-02-07 15:24:34 +0800166@@ -254,7 +254,7 @@ mt76_dma_add_rx_buf(struct mt76_dev *dev, struct mt76_queue *q,
developer13655da2023-01-10 19:53:25 +0800167 static int
developer57c8f1a2022-12-15 14:09:45 +0800168 mt76_dma_add_buf(struct mt76_dev *dev, struct mt76_queue *q,
169 struct mt76_queue_buf *buf, int nbufs, u32 info,
170- struct sk_buff *skb, void *txwi)
171+ struct sk_buff *skb, void *txwi, void *rxwi)
172 {
173 struct mt76_queue_entry *entry;
174 struct mt76_desc *desc;
developer60a3d662023-02-07 15:24:34 +0800175@@ -307,6 +307,7 @@ mt76_dma_add_buf(struct mt76_dev *dev, struct mt76_queue *q,
developer57c8f1a2022-12-15 14:09:45 +0800176 }
177
178 q->entry[idx].txwi = txwi;
179+ q->entry[idx].rxwi = rxwi;
180 q->entry[idx].skb = skb;
181 q->entry[idx].wcid = 0xffff;
182
developer60a3d662023-02-07 15:24:34 +0800183@@ -406,13 +407,13 @@ mt76_dma_get_buf(struct mt76_dev *dev, struct mt76_queue *q, int idx,
developer57c8f1a2022-12-15 14:09:45 +0800184 u32 id, find = 0;
185 u32 token = FIELD_GET(MT_DMA_CTL_TOKEN,
186 le32_to_cpu(desc->buf1));
187- struct mt76_txwi_cache *t;
188+ struct mt76_rxwi_cache *r;
189
190 if (*more) {
191 spin_lock_bh(&dev->rx_token_lock);
192
193- idr_for_each_entry(&dev->rx_token, t, id) {
194- if (t->dma_addr == le32_to_cpu(desc->buf0)) {
195+ idr_for_each_entry(&dev->rx_token, r, id) {
196+ if (r->dma_addr == le32_to_cpu(desc->buf0)) {
197 find = 1;
developer57c8f1a2022-12-15 14:09:45 +0800198 token = id;
developer60a3d662023-02-07 15:24:34 +0800199
200@@ -430,19 +431,19 @@ mt76_dma_get_buf(struct mt76_dev *dev, struct mt76_queue *q, int idx,
developer57c8f1a2022-12-15 14:09:45 +0800201 return NULL;
202 }
203
204- t = mt76_rx_token_release(dev, token);
205- if (!t)
206+ r = mt76_rx_token_release(dev, token);
207+ if (!r)
208 return NULL;
209
developer60a3d662023-02-07 15:24:34 +0800210- dma_sync_single_for_cpu(dev->dma_dev, t->dma_addr,
211+ dma_sync_single_for_cpu(dev->dma_dev, r->dma_addr,
212 SKB_WITH_OVERHEAD(q->buf_size),
213 page_pool_get_dma_dir(q->page_pool));
developer57c8f1a2022-12-15 14:09:45 +0800214
developer60a3d662023-02-07 15:24:34 +0800215- buf = t->ptr;
216- t->dma_addr = 0;
217- t->ptr = NULL;
218+ buf = r->ptr;
219+ r->dma_addr = 0;
220+ r->ptr = NULL;
developer765f1892023-01-30 14:02:51 +0800221
developer60a3d662023-02-07 15:24:34 +0800222- mt76_put_rxwi(dev, t);
223+ mt76_put_rxwi(dev, r);
developer765f1892023-01-30 14:02:51 +0800224
developer60a3d662023-02-07 15:24:34 +0800225 if (drop) {
226 u32 ctrl = le32_to_cpu(READ_ONCE(desc->ctrl));
227@@ -510,7 +511,7 @@ mt76_dma_tx_queue_skb_raw(struct mt76_dev *dev, struct mt76_queue *q,
developer57c8f1a2022-12-15 14:09:45 +0800228 buf.len = skb->len;
229
230 spin_lock_bh(&q->lock);
231- mt76_dma_add_buf(dev, q, &buf, 1, tx_info, skb, NULL);
232+ mt76_dma_add_buf(dev, q, &buf, 1, tx_info, skb, NULL, NULL);
233 mt76_dma_kick_queue(dev, q);
234 spin_unlock_bh(&q->lock);
235
developer60a3d662023-02-07 15:24:34 +0800236@@ -587,7 +588,7 @@ mt76_dma_tx_queue_skb(struct mt76_dev *dev, struct mt76_queue *q,
developer57c8f1a2022-12-15 14:09:45 +0800237 goto unmap;
238
239 return mt76_dma_add_buf(dev, q, tx_info.buf, tx_info.nbuf,
240- tx_info.info, tx_info.skb, t);
241+ tx_info.info, tx_info.skb, t, NULL);
242
243 unmap:
244 for (n--; n > 0; n--)
developer57c8f1a2022-12-15 14:09:45 +0800245diff --git a/mac80211.c b/mac80211.c
developer60a3d662023-02-07 15:24:34 +0800246index 35fd0347..95861d47 100644
developer57c8f1a2022-12-15 14:09:45 +0800247--- a/mac80211.c
248+++ b/mac80211.c
developer60a3d662023-02-07 15:24:34 +0800249@@ -640,7 +640,6 @@ mt76_alloc_device(struct device *pdev, unsigned int size,
developer57c8f1a2022-12-15 14:09:45 +0800250 spin_lock_init(&dev->lock);
251 spin_lock_init(&dev->cc_lock);
252 spin_lock_init(&dev->status_lock);
253- spin_lock_init(&dev->wed_lock);
254 mutex_init(&dev->mutex);
255 init_waitqueue_head(&dev->tx_wait);
256
developer60a3d662023-02-07 15:24:34 +0800257@@ -671,6 +670,7 @@ mt76_alloc_device(struct device *pdev, unsigned int size,
developer57c8f1a2022-12-15 14:09:45 +0800258 INIT_LIST_HEAD(&dev->txwi_cache);
259 INIT_LIST_HEAD(&dev->rxwi_cache);
260 dev->token_size = dev->drv->token_size;
261+ dev->rx_token_size = dev->drv->rx_token_size;
262
263 for (i = 0; i < ARRAY_SIZE(dev->q_rx); i++)
264 skb_queue_head_init(&dev->rx_skb[i]);
265diff --git a/mt76.h b/mt76.h
developer60a3d662023-02-07 15:24:34 +0800266index 982d0bbf..a36a978b 100644
developer57c8f1a2022-12-15 14:09:45 +0800267--- a/mt76.h
268+++ b/mt76.h
269@@ -166,6 +166,7 @@ struct mt76_queue_entry {
270 };
271 union {
272 struct mt76_txwi_cache *txwi;
273+ struct mt76_rxwi_cache *rxwi;
274 struct urb *urb;
275 int buf_sz;
276 };
developer60a3d662023-02-07 15:24:34 +0800277@@ -357,10 +358,15 @@ struct mt76_txwi_cache {
developer57c8f1a2022-12-15 14:09:45 +0800278 struct list_head list;
279 dma_addr_t dma_addr;
280
281- union {
282- struct sk_buff *skb;
283- void *ptr;
284- };
285+ struct sk_buff *skb;
286+};
287+
288+struct mt76_rxwi_cache {
289+ struct list_head list;
290+ dma_addr_t dma_addr;
291+
292+ void *ptr;
293+ u32 token;
294 };
295
296 struct mt76_rx_tid {
developer60a3d662023-02-07 15:24:34 +0800297@@ -445,6 +451,7 @@ struct mt76_driver_ops {
developer57c8f1a2022-12-15 14:09:45 +0800298 u16 txwi_size;
299 u16 token_size;
300 u8 mcs_rates;
301+ u16 rx_token_size;
302
303 void (*update_survey)(struct mt76_phy *phy);
304
developer60a3d662023-02-07 15:24:34 +0800305@@ -815,7 +822,6 @@ struct mt76_dev {
developer57c8f1a2022-12-15 14:09:45 +0800306
307 struct ieee80211_hw *hw;
308
309- spinlock_t wed_lock;
310 spinlock_t lock;
311 spinlock_t cc_lock;
312
developer60a3d662023-02-07 15:24:34 +0800313@@ -1406,8 +1412,8 @@ mt76_tx_status_get_hw(struct mt76_dev *dev, struct sk_buff *skb)
developer57c8f1a2022-12-15 14:09:45 +0800314 }
315
316 void mt76_put_txwi(struct mt76_dev *dev, struct mt76_txwi_cache *t);
317-void mt76_put_rxwi(struct mt76_dev *dev, struct mt76_txwi_cache *t);
318-struct mt76_txwi_cache *mt76_get_rxwi(struct mt76_dev *dev);
319+void mt76_put_rxwi(struct mt76_dev *dev, struct mt76_rxwi_cache *r);
320+struct mt76_rxwi_cache *mt76_get_rxwi(struct mt76_dev *dev);
321 void mt76_free_pending_rxwi(struct mt76_dev *dev);
322 void mt76_rx_complete(struct mt76_dev *dev, struct sk_buff_head *frames,
323 struct napi_struct *napi);
developer60a3d662023-02-07 15:24:34 +0800324@@ -1560,9 +1566,9 @@ struct mt76_txwi_cache *
developer57c8f1a2022-12-15 14:09:45 +0800325 mt76_token_release(struct mt76_dev *dev, int token, bool *wake);
326 int mt76_token_consume(struct mt76_dev *dev, struct mt76_txwi_cache **ptxwi);
327 void __mt76_set_tx_blocked(struct mt76_dev *dev, bool blocked);
328-struct mt76_txwi_cache *mt76_rx_token_release(struct mt76_dev *dev, int token);
329+struct mt76_rxwi_cache *mt76_rx_token_release(struct mt76_dev *dev, int token);
330 int mt76_rx_token_consume(struct mt76_dev *dev, void *ptr,
331- struct mt76_txwi_cache *r, dma_addr_t phys);
332+ struct mt76_rxwi_cache *r, dma_addr_t phys);
developer60a3d662023-02-07 15:24:34 +0800333 int mt76_create_page_pool(struct mt76_dev *dev, struct mt76_queue *q);
334 static inline void mt76_put_page_pool_buf(void *buf, bool allow_direct)
developer57c8f1a2022-12-15 14:09:45 +0800335 {
336diff --git a/mt7915/dma.c b/mt7915/dma.c
developer60a3d662023-02-07 15:24:34 +0800337index 52fabde0..4dd321ee 100644
developer57c8f1a2022-12-15 14:09:45 +0800338--- a/mt7915/dma.c
339+++ b/mt7915/dma.c
developer60a3d662023-02-07 15:24:34 +0800340@@ -491,7 +491,6 @@ int mt7915_dma_init(struct mt7915_dev *dev, struct mt7915_phy *phy2)
developer57c8f1a2022-12-15 14:09:45 +0800341 mtk_wed_get_rx_capa(&mdev->mmio.wed)) {
342 dev->mt76.q_rx[MT_RXQ_MAIN].flags =
343 MT_WED_Q_RX(MT7915_RXQ_BAND0);
344- dev->mt76.rx_token_size += MT7915_RX_RING_SIZE;
345 }
346
347 ret = mt76_queue_alloc(dev, &dev->mt76.q_rx[MT_RXQ_MAIN],
developer60a3d662023-02-07 15:24:34 +0800348@@ -528,7 +527,6 @@ int mt7915_dma_init(struct mt7915_dev *dev, struct mt7915_phy *phy2)
developer57c8f1a2022-12-15 14:09:45 +0800349 mtk_wed_get_rx_capa(&mdev->mmio.wed)) {
350 dev->mt76.q_rx[MT_RXQ_BAND1].flags =
351 MT_WED_Q_RX(MT7915_RXQ_BAND1);
352- dev->mt76.rx_token_size += MT7915_RX_RING_SIZE;
353 }
354
355 /* rx data queue for band1 */
356diff --git a/mt7915/mmio.c b/mt7915/mmio.c
developer60a3d662023-02-07 15:24:34 +0800357index 890af388..6dec9d60 100644
developer57c8f1a2022-12-15 14:09:45 +0800358--- a/mt7915/mmio.c
359+++ b/mt7915/mmio.c
developer60a3d662023-02-07 15:24:34 +0800360@@ -606,16 +606,16 @@ static void mt7915_mmio_wed_release_rx_buf(struct mtk_wed_device *wed)
developer57c8f1a2022-12-15 14:09:45 +0800361
362 dev = container_of(wed, struct mt7915_dev, mt76.mmio.wed);
363 for (i = 0; i < dev->mt76.rx_token_size; i++) {
364- struct mt76_txwi_cache *t;
365+ struct mt76_rxwi_cache *r;
366
367- t = mt76_rx_token_release(&dev->mt76, i);
368- if (!t || !t->ptr)
369+ r = mt76_rx_token_release(&dev->mt76, i);
370+ if (!r || !r->ptr)
371 continue;
372
developer60a3d662023-02-07 15:24:34 +0800373- mt76_put_page_pool_buf(t->ptr, false);
developer57c8f1a2022-12-15 14:09:45 +0800374- t->ptr = NULL;
developer60a3d662023-02-07 15:24:34 +0800375+ mt76_put_page_pool_buf(r->ptr, false);
developer57c8f1a2022-12-15 14:09:45 +0800376+ r->ptr = NULL;
377
378- mt76_put_rxwi(&dev->mt76, t);
379+ mt76_put_rxwi(&dev->mt76, r);
380 }
381
382 mt76_free_pending_rxwi(&dev->mt76);
developer60a3d662023-02-07 15:24:34 +0800383@@ -624,7 +624,7 @@ static void mt7915_mmio_wed_release_rx_buf(struct mtk_wed_device *wed)
384 static u32 mt7915_mmio_wed_init_rx_buf(struct mtk_wed_device *wed, int size)
385 {
386 struct mtk_rxbm_desc *desc = wed->rx_buf_ring.desc;
387- struct mt76_txwi_cache *t = NULL;
388+ struct mt76_rxwi_cache *r = NULL;
389 struct mt7915_dev *dev;
390 struct mt76_queue *q;
391 int i, len;
392@@ -640,8 +640,8 @@ static u32 mt7915_mmio_wed_init_rx_buf(struct mtk_wed_device *wed, int size)
developer57c8f1a2022-12-15 14:09:45 +0800393 int token;
developer60a3d662023-02-07 15:24:34 +0800394 void *buf;
developer57c8f1a2022-12-15 14:09:45 +0800395
developer60a3d662023-02-07 15:24:34 +0800396- t = mt76_get_rxwi(&dev->mt76);
397- if (!t)
398+ r = mt76_get_rxwi(&dev->mt76);
399+ if (!r)
400 goto unmap;
401
402 buf = mt76_get_page_pool_buf(q, &offset, q->buf_size);
403@@ -653,7 +653,7 @@ static u32 mt7915_mmio_wed_init_rx_buf(struct mtk_wed_device *wed, int size)
404 dma_sync_single_for_device(dev->mt76.dma_dev, addr, len, dir);
405
406 desc->buf0 = cpu_to_le32(addr);
407- token = mt76_rx_token_consume(&dev->mt76, buf, t, addr);
408+ token = mt76_rx_token_consume(&dev->mt76, buf, r, addr);
developer57c8f1a2022-12-15 14:09:45 +0800409 if (token < 0) {
developer60a3d662023-02-07 15:24:34 +0800410 mt76_put_page_pool_buf(buf, false);
411 goto unmap;
412@@ -667,8 +667,8 @@ static u32 mt7915_mmio_wed_init_rx_buf(struct mtk_wed_device *wed, int size)
413 return 0;
414
415 unmap:
416- if (t)
417- mt76_put_rxwi(&dev->mt76, t);
418+ if (r)
419+ mt76_put_rxwi(&dev->mt76, r);
420 mt7915_mmio_wed_release_rx_buf(wed);
421 return -ENOMEM;
422 }
423@@ -818,7 +818,7 @@ int mt7915_mmio_wed_init(struct mt7915_dev *dev, void *pdev_ptr,
424 wed->wlan.reset = mt7915_mmio_wed_reset;
425 wed->wlan.reset_complete = mt7915_mmio_wed_reset_complete;
developer57c8f1a2022-12-15 14:09:45 +0800426
427- dev->mt76.rx_token_size = wed->wlan.rx_npkt;
428+ dev->mt76.rx_token_size += wed->wlan.rx_npkt;
429
430 if (mtk_wed_device_attach(wed))
431 return 0;
developer60a3d662023-02-07 15:24:34 +0800432@@ -1024,6 +1024,7 @@ struct mt7915_dev *mt7915_mmio_probe(struct device *pdev,
developer57c8f1a2022-12-15 14:09:45 +0800433 SURVEY_INFO_TIME_RX |
434 SURVEY_INFO_TIME_BSS_RX,
435 .token_size = MT7915_TOKEN_SIZE,
436+ .rx_token_size = MT7915_RX_TOKEN_SIZE,
437 .tx_prepare_skb = mt7915_tx_prepare_skb,
438 .tx_complete_skb = mt76_connac_tx_complete_skb,
439 .rx_skb = mt7915_queue_rx_skb,
440diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h
developer60a3d662023-02-07 15:24:34 +0800441index a1ef8359..594dfcd5 100644
developer57c8f1a2022-12-15 14:09:45 +0800442--- a/mt7915/mt7915.h
443+++ b/mt7915/mt7915.h
developerc5ce7502022-12-19 11:33:22 +0800444@@ -57,6 +57,7 @@
developer57c8f1a2022-12-15 14:09:45 +0800445 #define MT7915_EEPROM_BLOCK_SIZE 16
developer60a3d662023-02-07 15:24:34 +0800446 #define MT7915_HW_TOKEN_SIZE 4096
developer57c8f1a2022-12-15 14:09:45 +0800447 #define MT7915_TOKEN_SIZE 8192
448+#define MT7915_RX_TOKEN_SIZE 4096
449
450 #define MT7915_CFEND_RATE_DEFAULT 0x49 /* OFDM 24M */
451 #define MT7915_CFEND_RATE_11B 0x03 /* 11B LP, 11M */
452diff --git a/tx.c b/tx.c
developer13655da2023-01-10 19:53:25 +0800453index 6d55566f..a72b7779 100644
developer57c8f1a2022-12-15 14:09:45 +0800454--- a/tx.c
455+++ b/tx.c
456@@ -756,16 +756,16 @@ int mt76_token_consume(struct mt76_dev *dev, struct mt76_txwi_cache **ptxwi)
457 EXPORT_SYMBOL_GPL(mt76_token_consume);
458
459 int mt76_rx_token_consume(struct mt76_dev *dev, void *ptr,
460- struct mt76_txwi_cache *t, dma_addr_t phys)
461+ struct mt76_rxwi_cache *r, dma_addr_t phys)
462 {
463 int token;
464
465 spin_lock_bh(&dev->rx_token_lock);
466- token = idr_alloc(&dev->rx_token, t, 0, dev->rx_token_size,
467+ token = idr_alloc(&dev->rx_token, r, 0, dev->rx_token_size,
468 GFP_ATOMIC);
469 if (token >= 0) {
470- t->ptr = ptr;
471- t->dma_addr = phys;
472+ r->ptr = ptr;
473+ r->dma_addr = phys;
474 }
475 spin_unlock_bh(&dev->rx_token_lock);
476
477@@ -802,15 +802,15 @@ mt76_token_release(struct mt76_dev *dev, int token, bool *wake)
478 }
479 EXPORT_SYMBOL_GPL(mt76_token_release);
480
481-struct mt76_txwi_cache *
482+struct mt76_rxwi_cache *
483 mt76_rx_token_release(struct mt76_dev *dev, int token)
484 {
485- struct mt76_txwi_cache *t;
486+ struct mt76_rxwi_cache *r;
487
488 spin_lock_bh(&dev->rx_token_lock);
489- t = idr_remove(&dev->rx_token, token);
490+ r = idr_remove(&dev->rx_token, token);
491 spin_unlock_bh(&dev->rx_token_lock);
492
493- return t;
494+ return r;
495 }
496 EXPORT_SYMBOL_GPL(mt76_rx_token_release);
497--
developer23c22342023-01-09 13:57:39 +08004982.18.0
developer57c8f1a2022-12-15 14:09:45 +0800499