developer | 05f3b2b | 2024-08-19 19:17:34 +0800 | [diff] [blame] | 1 | From 5ba9ebc9e86610960d798ff1103350d2d3453a90 Mon Sep 17 00:00:00 2001 |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 2 | From: Howard Hsu <howard-yh.hsu@mediatek.com> |
| 3 | Date: Wed, 6 Dec 2023 08:53:03 +0800 |
developer | 05f3b2b | 2024-08-19 19:17:34 +0800 | [diff] [blame] | 4 | Subject: [PATCH 1040/1052] wifi: mt76: mt7915: support scs feature |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 5 | |
| 6 | Add support scs feature for connac2 codebase. This commit includes three |
| 7 | parts. |
| 8 | 1. enable scs feature when interface is up. |
| 9 | 2. support configure scs feature on/off by debugfs scs_enable. |
| 10 | 3. Firmware needs driver to provide the tx_bytes, rx_bytes, |
| 11 | active_station_number, total throughtput and min rssi of all connected |
| 12 | stations. In mt76 driver, we run a delayed work to send all must-need |
| 13 | statistics through mcu command every second. |
| 14 | |
| 15 | Please noted that the scs feature is only enable for apsoc is 7986 or |
| 16 | 7981 (WED Rx 2.0). |
| 17 | |
| 18 | Signed-off-by: Howard Hsu <howard-yh.hsu@mediatek.com> |
| 19 | --- |
| 20 | mt76.h | 2 + |
| 21 | mt76_connac_mcu.h | 1 + |
| 22 | mt7915/init.c | 1 + |
| 23 | mt7915/mac.c | 11 ++++ |
| 24 | mt7915/main.c | 13 +++++ |
| 25 | mt7915/mcu.c | 118 +++++++++++++++++++++++++++++++++++++++++++ |
| 26 | mt7915/mcu.h | 4 ++ |
developer | 753619c | 2024-02-22 13:42:45 +0800 | [diff] [blame] | 27 | mt7915/mt7915.h | 14 +++++ |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 28 | mt7915/mtk_debugfs.c | 24 +++++++++ |
developer | 753619c | 2024-02-22 13:42:45 +0800 | [diff] [blame] | 29 | 9 files changed, 188 insertions(+) |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 30 | |
| 31 | diff --git a/mt76.h b/mt76.h |
developer | 05f3b2b | 2024-08-19 19:17:34 +0800 | [diff] [blame] | 32 | index 16b76b48..43f3c282 100644 |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 33 | --- a/mt76.h |
| 34 | +++ b/mt76.h |
developer | 753619c | 2024-02-22 13:42:45 +0800 | [diff] [blame] | 35 | @@ -311,6 +311,7 @@ struct mt76_sta_stats { |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 36 | u64 tx_nss[4]; /* 1, 2, 3, 4 */ |
| 37 | u64 tx_mcs[16]; /* mcs idx */ |
| 38 | u64 tx_bytes; |
| 39 | + u64 last_tx_bytes; |
| 40 | /* WED TX */ |
| 41 | u32 tx_packets; /* unit: MSDU */ |
| 42 | u32 tx_retries; |
developer | 753619c | 2024-02-22 13:42:45 +0800 | [diff] [blame] | 43 | @@ -320,6 +321,7 @@ struct mt76_sta_stats { |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 44 | u32 rx_packets; |
| 45 | u32 rx_errors; |
| 46 | u32 rx_drops; |
| 47 | + u64 last_rx_bytes; |
| 48 | }; |
| 49 | |
| 50 | enum mt76_wcid_flags { |
| 51 | diff --git a/mt76_connac_mcu.h b/mt76_connac_mcu.h |
developer | 05f3b2b | 2024-08-19 19:17:34 +0800 | [diff] [blame] | 52 | index 49c3f1aa..febe3ed4 100644 |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 53 | --- a/mt76_connac_mcu.h |
| 54 | +++ b/mt76_connac_mcu.h |
developer | 42c7a43 | 2024-07-12 14:39:29 +0800 | [diff] [blame] | 55 | @@ -1238,6 +1238,7 @@ enum { |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 56 | MCU_EXT_CMD_SET_RDD_PATTERN = 0x7d, |
| 57 | MCU_EXT_CMD_MWDS_SUPPORT = 0x80, |
| 58 | MCU_EXT_CMD_SET_SER_TRIGGER = 0x81, |
| 59 | + MCU_EXT_CMD_SCS_FEATURE_CTRL = 0x82, |
| 60 | MCU_EXT_CMD_TWT_AGRT_UPDATE = 0x94, |
| 61 | MCU_EXT_CMD_FW_DBG_CTRL = 0x95, |
| 62 | MCU_EXT_CMD_OFFCH_SCAN_CTRL = 0x9a, |
| 63 | diff --git a/mt7915/init.c b/mt7915/init.c |
developer | 05f3b2b | 2024-08-19 19:17:34 +0800 | [diff] [blame] | 64 | index c4685f21..a26e0d69 100644 |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 65 | --- a/mt7915/init.c |
| 66 | +++ b/mt7915/init.c |
developer | 05f3b2b | 2024-08-19 19:17:34 +0800 | [diff] [blame] | 67 | @@ -1222,6 +1222,7 @@ int mt7915_register_device(struct mt7915_dev *dev) |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 68 | spin_lock_init(&dev->phy.stats_lock); |
| 69 | INIT_WORK(&dev->rc_work, mt7915_mac_sta_rc_work); |
| 70 | INIT_DELAYED_WORK(&dev->mphy.mac_work, mt7915_mac_work); |
| 71 | + INIT_DELAYED_WORK(&dev->scs_work, mt7915_mcu_scs_sta_poll); |
| 72 | INIT_LIST_HEAD(&dev->sta_rc_list); |
| 73 | INIT_LIST_HEAD(&dev->twt_list); |
| 74 | |
| 75 | diff --git a/mt7915/mac.c b/mt7915/mac.c |
developer | 05f3b2b | 2024-08-19 19:17:34 +0800 | [diff] [blame] | 76 | index c421447c..fb989405 100644 |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 77 | --- a/mt7915/mac.c |
| 78 | +++ b/mt7915/mac.c |
developer | a20cdc2 | 2024-05-31 18:57:31 +0800 | [diff] [blame] | 79 | @@ -1463,6 +1463,8 @@ mt7915_mac_full_reset(struct mt7915_dev *dev) |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 80 | if (ext_phy) |
| 81 | cancel_delayed_work_sync(&ext_phy->mac_work); |
| 82 | |
| 83 | + cancel_delayed_work_sync(&dev->scs_work); |
| 84 | + |
| 85 | mutex_lock(&dev->mt76.mutex); |
| 86 | for (i = 0; i < 10; i++) { |
| 87 | if (!mt7915_mac_restart(dev)) |
developer | a20cdc2 | 2024-05-31 18:57:31 +0800 | [diff] [blame] | 88 | @@ -1488,6 +1490,10 @@ mt7915_mac_full_reset(struct mt7915_dev *dev) |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 89 | ieee80211_queue_delayed_work(ext_phy->hw, |
| 90 | &ext_phy->mac_work, |
| 91 | MT7915_WATCHDOG_TIME); |
| 92 | + |
| 93 | + if (mtk_wed_device_active(&dev->mt76.mmio.wed) && |
| 94 | + mtk_wed_get_rx_capa(&dev->mt76.mmio.wed)) |
| 95 | + ieee80211_queue_delayed_work(mt76_hw(dev), &dev->scs_work, HZ); |
| 96 | } |
| 97 | |
| 98 | /* system error recovery */ |
developer | a20cdc2 | 2024-05-31 18:57:31 +0800 | [diff] [blame] | 99 | @@ -1546,6 +1552,7 @@ void mt7915_mac_reset_work(struct work_struct *work) |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 100 | set_bit(MT76_RESET, &phy2->mt76->state); |
| 101 | cancel_delayed_work_sync(&phy2->mt76->mac_work); |
| 102 | } |
| 103 | + cancel_delayed_work_sync(&dev->scs_work); |
| 104 | mt76_worker_disable(&dev->mt76.tx_worker); |
| 105 | mt76_for_each_q_rx(&dev->mt76, i) |
| 106 | napi_disable(&dev->mt76.napi[i]); |
developer | a20cdc2 | 2024-05-31 18:57:31 +0800 | [diff] [blame] | 107 | @@ -1610,6 +1617,10 @@ void mt7915_mac_reset_work(struct work_struct *work) |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 108 | &phy2->mt76->mac_work, |
| 109 | MT7915_WATCHDOG_TIME); |
| 110 | |
| 111 | + if (mtk_wed_device_active(&dev->mt76.mmio.wed) && |
| 112 | + mtk_wed_get_rx_capa(&dev->mt76.mmio.wed)) |
| 113 | + ieee80211_queue_delayed_work(mt76_hw(dev), &dev->scs_work, HZ); |
| 114 | + |
| 115 | dev_info(dev->mt76.dev,"\n%s L1 SER recovery completed.", |
| 116 | wiphy_name(dev->mt76.hw->wiphy)); |
| 117 | } |
| 118 | diff --git a/mt7915/main.c b/mt7915/main.c |
developer | 05f3b2b | 2024-08-19 19:17:34 +0800 | [diff] [blame] | 119 | index 75042189..04301300 100644 |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 120 | --- a/mt7915/main.c |
| 121 | +++ b/mt7915/main.c |
developer | 753619c | 2024-02-22 13:42:45 +0800 | [diff] [blame] | 122 | @@ -89,12 +89,24 @@ int mt7915_run(struct ieee80211_hw *hw) |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 123 | if (ret) |
| 124 | goto out; |
| 125 | |
| 126 | + /* Enable SCS if and only if WED Rx (2.0 and after) is supported. */ |
| 127 | + if (mtk_wed_device_active(&dev->mt76.mmio.wed) && |
| 128 | + mtk_wed_get_rx_capa(&dev->mt76.mmio.wed) && |
| 129 | + !mt76_testmode_enabled(phy->mt76)) { |
| 130 | + ret = mt7915_mcu_set_scs_en(phy, true); |
| 131 | + if (ret) |
| 132 | + goto out; |
| 133 | + } |
| 134 | + |
| 135 | set_bit(MT76_STATE_RUNNING, &phy->mt76->state); |
| 136 | |
| 137 | if (!mt76_testmode_enabled(phy->mt76)) |
| 138 | ieee80211_queue_delayed_work(hw, &phy->mt76->mac_work, |
| 139 | MT7915_WATCHDOG_TIME); |
| 140 | |
| 141 | + if (!running && phy->scs_ctrl.scs_enable) |
| 142 | + ieee80211_queue_delayed_work(hw, &dev->scs_work, HZ); |
| 143 | + |
| 144 | if (!running) |
| 145 | mt7915_mac_reset_counters(phy); |
| 146 | |
developer | 753619c | 2024-02-22 13:42:45 +0800 | [diff] [blame] | 147 | @@ -135,6 +147,7 @@ static void mt7915_stop(struct ieee80211_hw *hw) |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 148 | } |
| 149 | |
| 150 | if (!mt7915_dev_running(dev)) { |
| 151 | + cancel_delayed_work_sync(&dev->scs_work); |
| 152 | mt76_connac_mcu_set_pm(&dev->mt76, dev->phy.mt76->band_idx, 1); |
| 153 | mt7915_mcu_set_mac(dev, dev->phy.mt76->band_idx, false, false); |
| 154 | } |
| 155 | diff --git a/mt7915/mcu.c b/mt7915/mcu.c |
developer | 05f3b2b | 2024-08-19 19:17:34 +0800 | [diff] [blame] | 156 | index 40d94c4f..fcbe4da4 100644 |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 157 | --- a/mt7915/mcu.c |
| 158 | +++ b/mt7915/mcu.c |
developer | 42c7a43 | 2024-07-12 14:39:29 +0800 | [diff] [blame] | 159 | @@ -5238,3 +5238,121 @@ int mt7915_mcu_sw_aci_set(struct mt7915_dev *dev, bool val) |
| 160 | return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SWLNA_ACI_CTRL), &req, |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 161 | sizeof(req), NULL); |
| 162 | } |
developer | 42c7a43 | 2024-07-12 14:39:29 +0800 | [diff] [blame] | 163 | + |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 164 | +int mt7915_mcu_set_scs_en(struct mt7915_phy *phy, u8 enable) |
| 165 | +{ |
| 166 | + struct mt7915_dev *dev = phy->dev; |
| 167 | + struct { |
| 168 | + __le32 subcmd; |
| 169 | + u8 band_idx; |
| 170 | + u8 enable; |
| 171 | + } __packed req = { |
| 172 | + .subcmd = cpu_to_le32(SCS_ENABLE), |
| 173 | + .band_idx = phy->mt76->band_idx, |
| 174 | + .enable = enable + 1, |
| 175 | + }; |
| 176 | + |
| 177 | + phy->scs_ctrl.scs_enable = !!enable; |
| 178 | + |
| 179 | + return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SCS_FEATURE_CTRL), |
| 180 | + &req, sizeof(req), NULL); |
| 181 | +} |
| 182 | + |
| 183 | +void mt7915_sta_scs_para(void *data, struct ieee80211_sta *sta) |
| 184 | +{ |
| 185 | +#define SCS_ACTIVE_STA_CRITERIA_2M 250000 |
| 186 | + struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv; |
| 187 | + struct mt7915_phy *poll_phy = (struct mt7915_phy *)data; |
| 188 | + u8 band_idx = msta->wcid.phy_idx; |
| 189 | + s64 tx_bytes_last_sec, rx_bytes_last_sec; |
| 190 | + u64 total_bytes_last_sec; |
| 191 | + |
| 192 | + if (band_idx > MT_BAND1) |
| 193 | + return; |
| 194 | + |
| 195 | + tx_bytes_last_sec = (s64)msta->wcid.stats.tx_bytes - |
| 196 | + (s64)msta->wcid.stats.last_tx_bytes; |
| 197 | + rx_bytes_last_sec = (s64)msta->wcid.stats.rx_bytes - |
| 198 | + (s64)msta->wcid.stats.last_rx_bytes; |
| 199 | + |
| 200 | + /** |
| 201 | + * Since wo reports rx stats every 900ms, it needs to be converted as |
| 202 | + * statistics every one second. |
| 203 | + */ |
| 204 | + rx_bytes_last_sec = rx_bytes_last_sec / 9 * 10; |
| 205 | + |
| 206 | + poll_phy->scs_ctrl.tx_bytes_last_sec += tx_bytes_last_sec; |
| 207 | + poll_phy->scs_ctrl.rx_bytes_last_sec += rx_bytes_last_sec; |
| 208 | + |
| 209 | + total_bytes_last_sec = tx_bytes_last_sec + rx_bytes_last_sec; |
| 210 | + if (total_bytes_last_sec > SCS_ACTIVE_STA_CRITERIA_2M) { |
| 211 | + poll_phy->scs_ctrl.tput += total_bytes_last_sec >> 17; |
| 212 | + poll_phy->scs_ctrl.active_sta++; |
| 213 | + } |
| 214 | + |
| 215 | + msta->wcid.stats.last_tx_bytes = msta->wcid.stats.tx_bytes; |
| 216 | + msta->wcid.stats.last_rx_bytes = msta->wcid.stats.rx_bytes; |
| 217 | + |
| 218 | + if (poll_phy->scs_ctrl.sta_min_rssi > msta->ack_signal) |
| 219 | + poll_phy->scs_ctrl.sta_min_rssi = msta->ack_signal; |
| 220 | +} |
| 221 | + |
| 222 | +int mt7915_mcu_set_scs_stats(struct mt7915_phy *phy) |
| 223 | +{ |
| 224 | + struct mt7915_dev *dev = phy->dev; |
| 225 | + struct { |
| 226 | + __le32 subcmd; |
| 227 | + u8 band_idx; |
| 228 | + u8 active_sta; |
| 229 | + __le16 tput; |
| 230 | + bool rx_only_mode; |
| 231 | + u8 __rsv; |
| 232 | + s8 min_rssi; |
| 233 | + } __packed req = { |
| 234 | + .subcmd = cpu_to_le32(SCS_SEND_DATA), |
| 235 | + .band_idx = phy->mt76->band_idx, |
| 236 | + .active_sta = phy->scs_ctrl.active_sta, |
| 237 | + .tput = cpu_to_le16(phy->scs_ctrl.tput), |
| 238 | + .rx_only_mode = false, |
| 239 | + .min_rssi = phy->scs_ctrl.sta_min_rssi, |
| 240 | + }; |
| 241 | + |
| 242 | + /* Rx only mode is that Rx percentage is larger than 90% */ |
| 243 | + if (phy->scs_ctrl.tx_bytes_last_sec < phy->scs_ctrl.rx_bytes_last_sec / 9) |
| 244 | + req.rx_only_mode = true; |
| 245 | + |
| 246 | + return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SCS_FEATURE_CTRL), |
| 247 | + &req, sizeof(req), NULL); |
| 248 | +} |
| 249 | + |
| 250 | +void mt7915_mcu_scs_sta_poll(struct work_struct *work) |
| 251 | +{ |
| 252 | + struct mt7915_dev *dev = container_of(work, struct mt7915_dev, |
| 253 | + scs_work.work); |
| 254 | + struct mt7915_phy *phy; |
| 255 | + bool scs_enable_flag = false; |
| 256 | + u8 i; |
| 257 | + |
| 258 | + for (i = MT_BAND0; i < MT_BAND2; i++) { |
| 259 | + if (!dev->mt76.phys[i]) |
| 260 | + continue; |
| 261 | + |
| 262 | + phy = dev->mt76.phys[i]->priv; |
| 263 | + if (!phy->scs_ctrl.scs_enable || |
| 264 | + !test_bit(MT76_STATE_RUNNING, &phy->mt76->state)) |
| 265 | + continue; |
| 266 | + |
| 267 | + ieee80211_iterate_stations_atomic(dev->mt76.phys[i]->hw, |
| 268 | + mt7915_sta_scs_para, phy); |
| 269 | + |
| 270 | + mt7915_mcu_set_scs_stats(phy); |
| 271 | + |
| 272 | + memset(&phy->scs_ctrl, 0, sizeof(phy->scs_ctrl)); |
| 273 | + phy->scs_ctrl.scs_enable = true; |
| 274 | + |
| 275 | + scs_enable_flag = true; |
| 276 | + } |
| 277 | + |
| 278 | + if (scs_enable_flag) |
| 279 | + ieee80211_queue_delayed_work(mt76_hw(dev), &dev->scs_work, HZ); |
| 280 | +} |
| 281 | diff --git a/mt7915/mcu.h b/mt7915/mcu.h |
developer | 05f3b2b | 2024-08-19 19:17:34 +0800 | [diff] [blame] | 282 | index 3089fb64..742a7855 100644 |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 283 | --- a/mt7915/mcu.h |
| 284 | +++ b/mt7915/mcu.h |
developer | 753619c | 2024-02-22 13:42:45 +0800 | [diff] [blame] | 285 | @@ -1200,4 +1200,8 @@ struct mt7915_mcu_edcca_info { |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 286 | }; |
| 287 | #endif |
| 288 | |
| 289 | +enum { |
| 290 | + SCS_SEND_DATA = 0, |
| 291 | + SCS_ENABLE = 3, |
| 292 | +}; |
| 293 | #endif |
| 294 | diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h |
developer | 05f3b2b | 2024-08-19 19:17:34 +0800 | [diff] [blame] | 295 | index c8f9ed52..6b27be9c 100644 |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 296 | --- a/mt7915/mt7915.h |
| 297 | +++ b/mt7915/mt7915.h |
developer | 42c7a43 | 2024-07-12 14:39:29 +0800 | [diff] [blame] | 298 | @@ -283,6 +283,15 @@ struct mt7915_air_monitor_ctrl { |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 299 | }; |
| 300 | #endif |
| 301 | |
| 302 | +struct mt7915_scs_ctrl { |
| 303 | + u64 tx_bytes_last_sec; |
| 304 | + u64 rx_bytes_last_sec; |
| 305 | + bool scs_enable; |
| 306 | + s8 sta_min_rssi; |
| 307 | + u16 tput; |
| 308 | + u8 active_sta; |
| 309 | +}; |
| 310 | + |
| 311 | struct mt7915_phy { |
| 312 | struct mt76_phy *mt76; |
| 313 | struct mt7915_dev *dev; |
developer | 42c7a43 | 2024-07-12 14:39:29 +0800 | [diff] [blame] | 314 | @@ -361,6 +370,7 @@ struct mt7915_phy { |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 315 | |
| 316 | struct mt7915_air_monitor_ctrl amnt_ctrl; |
| 317 | #endif |
| 318 | + struct mt7915_scs_ctrl scs_ctrl; |
| 319 | }; |
| 320 | |
developer | a46f613 | 2024-03-26 14:09:54 +0800 | [diff] [blame] | 321 | #ifdef MTK_DEBUG |
developer | 42c7a43 | 2024-07-12 14:39:29 +0800 | [diff] [blame] | 322 | @@ -493,6 +503,8 @@ struct mt7915_dev { |
developer | a46f613 | 2024-03-26 14:09:54 +0800 | [diff] [blame] | 323 | } adie[ADIE_MAX_CNT]; |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 324 | #endif |
developer | 753619c | 2024-02-22 13:42:45 +0800 | [diff] [blame] | 325 | |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 326 | + struct delayed_work scs_work; |
developer | 753619c | 2024-02-22 13:42:45 +0800 | [diff] [blame] | 327 | + |
| 328 | bool wmm_pbc_enable; |
| 329 | struct work_struct wmm_pbc_work; |
developer | a46f613 | 2024-03-26 14:09:54 +0800 | [diff] [blame] | 330 | u32 adie_type; |
developer | 42c7a43 | 2024-07-12 14:39:29 +0800 | [diff] [blame] | 331 | @@ -821,6 +833,8 @@ int mt7915_mcu_sw_aci_set(struct mt7915_dev *dev, bool val); |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 332 | int mt7915_mcu_ipi_hist_ctrl(struct mt7915_phy *phy, void *data, u8 cmd, bool wait_resp); |
| 333 | int mt7915_mcu_ipi_hist_scan(struct mt7915_phy *phy, void *data, u8 mode, bool wait_resp); |
| 334 | int mt7915_mcu_enable_obss_spr(struct mt7915_phy *phy, u8 action, u8 val); |
| 335 | +int mt7915_mcu_set_scs_en(struct mt7915_phy *phy, u8 enable); |
| 336 | +void mt7915_mcu_scs_sta_poll(struct work_struct *work); |
| 337 | |
| 338 | #ifdef MTK_DEBUG |
| 339 | int mt7915_mtk_init_debugfs(struct mt7915_phy *phy, struct dentry *dir); |
| 340 | diff --git a/mt7915/mtk_debugfs.c b/mt7915/mtk_debugfs.c |
developer | 05f3b2b | 2024-08-19 19:17:34 +0800 | [diff] [blame] | 341 | index c8efd266..e60dc850 100644 |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 342 | --- a/mt7915/mtk_debugfs.c |
| 343 | +++ b/mt7915/mtk_debugfs.c |
developer | a46f613 | 2024-03-26 14:09:54 +0800 | [diff] [blame] | 344 | @@ -3820,6 +3820,29 @@ mt7915_sr_enable_set(void *data, u64 val) |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 345 | DEFINE_DEBUGFS_ATTRIBUTE(fops_sr_enable, NULL, |
| 346 | mt7915_sr_enable_set, "%llx\n"); |
| 347 | |
| 348 | +static int |
| 349 | +mt7915_scs_enable_set(void *data, u64 val) |
| 350 | +{ |
| 351 | + struct mt7915_phy *phy = data; |
| 352 | + int ret; |
| 353 | + |
| 354 | + /* Enable scs if and only if WED Rx (2.0 and after) is supported */ |
| 355 | + if (!mtk_wed_device_active(&phy->dev->mt76.mmio.wed) || |
| 356 | + !mtk_wed_get_rx_capa(&phy->dev->mt76.mmio.wed)) |
| 357 | + return 0; |
| 358 | + |
| 359 | + ret = mt7915_mcu_set_scs_en(phy, (u8) val); |
| 360 | + if (ret) |
| 361 | + return ret; |
| 362 | + |
| 363 | + if (phy->scs_ctrl.scs_enable) |
| 364 | + ieee80211_queue_delayed_work(phy->mt76->hw, &phy->dev->scs_work, HZ); |
| 365 | + |
| 366 | + return 0; |
| 367 | +} |
| 368 | +DEFINE_DEBUGFS_ATTRIBUTE(fops_scs_enable, NULL, |
| 369 | + mt7915_scs_enable_set, "%lld\n"); |
| 370 | + |
| 371 | int mt7915_mtk_init_debugfs(struct mt7915_phy *phy, struct dentry *dir) |
| 372 | { |
| 373 | struct mt7915_dev *dev = phy->dev; |
developer | a46f613 | 2024-03-26 14:09:54 +0800 | [diff] [blame] | 374 | @@ -3912,6 +3935,7 @@ int mt7915_mtk_init_debugfs(struct mt7915_phy *phy, struct dentry *dir) |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame] | 375 | debugfs_create_file("sw_aci", 0600, dir, dev, |
| 376 | &fops_sw_aci); |
| 377 | debugfs_create_file("sr_enable", 0200, dir, phy, &fops_sr_enable); |
| 378 | + debugfs_create_file("scs_enable", 0200, dir, phy, &fops_scs_enable); |
| 379 | return 0; |
| 380 | } |
| 381 | #endif |
| 382 | -- |
| 383 | 2.18.0 |
| 384 | |