blob: 599e1613944e6764731ba1369576fb8e5d437151 [file] [log] [blame]
From 161b4dc2bb1f3d69b57f195fbab8fc8f6dfbe2bc Mon Sep 17 00:00:00 2001
From: "sujuan.chen" <sujuan.chen@mediatek.com>
Date: Fri, 6 Oct 2023 14:01:41 +0800
Subject: [PATCH 054/223] mtk: mt76: change pcie0 R5 to pcie1 to get 6G ICS
Change-Id: I23a94e3e4b797b513a303b13e4c50e0a0d72bffb
---
mt7996/dma.c | 4 ++++
mt7996/init.c | 6 ++----
mt7996/mmio.c | 5 ++++-
3 files changed, 10 insertions(+), 5 deletions(-)
diff --git a/mt7996/dma.c b/mt7996/dma.c
index 759a58e8..5d85e9ea 100644
--- a/mt7996/dma.c
+++ b/mt7996/dma.c
@@ -538,6 +538,10 @@ int mt7996_dma_init(struct mt7996_dev *dev)
if (mt7996_band_valid(dev, MT_BAND2)) {
/* rx data queue for mt7996 band2 */
rx_base = MT_RXQ_RING_BASE(MT_RXQ_BAND2) + hif1_ofs;
+ if (mtk_wed_device_active(wed_hif2) && mtk_wed_get_rx_capa(wed_hif2)) {
+ dev->mt76.q_rx[MT_RXQ_BAND2].flags = MT_WED_Q_RX(0);
+ dev->mt76.q_rx[MT_RXQ_BAND2].wed = wed_hif2;
+ }
ret = mt76_queue_alloc(dev, &dev->mt76.q_rx[MT_RXQ_BAND2],
MT_RXQ_ID(MT_RXQ_BAND2),
MT7996_RX_RING_SIZE,
diff --git a/mt7996/init.c b/mt7996/init.c
index eac00df0..f493a373 100644
--- a/mt7996/init.c
+++ b/mt7996/init.c
@@ -651,10 +651,8 @@ static int mt7996_register_phy(struct mt7996_dev *dev, struct mt7996_phy *phy,
goto error;
if (wed == &dev->mt76.mmio.wed_hif2 && mtk_wed_device_active(wed)) {
- u32 irq_mask = dev->mt76.mmio.irqmask | MT_INT_TX_DONE_BAND2;
-
- mt76_wr(dev, MT_INT1_MASK_CSR, irq_mask);
- mtk_wed_device_start(&dev->mt76.mmio.wed_hif2, irq_mask);
+ mt76_wr(dev, MT_INT_PCIE1_MASK_CSR, MT_INT_TX_RX_DONE_EXT);
+ mtk_wed_device_start(&dev->mt76.mmio.wed_hif2, MT_INT_TX_RX_DONE_EXT);
}
return 0;
diff --git a/mt7996/mmio.c b/mt7996/mmio.c
index 40e45fb2..11470645 100644
--- a/mt7996/mmio.c
+++ b/mt7996/mmio.c
@@ -527,12 +527,15 @@ static void mt7996_irq_tasklet(struct tasklet_struct *t)
dev->mt76.mmio.irqmask);
if (intr1 & MT_INT_RX_TXFREE_EXT)
napi_schedule(&dev->mt76.napi[MT_RXQ_TXFREE_BAND2]);
+
+ if (intr1 & MT_INT_RX_DONE_BAND2_EXT)
+ napi_schedule(&dev->mt76.napi[MT_RXQ_BAND2]);
}
if (mtk_wed_device_active(wed)) {
mtk_wed_device_irq_set_mask(wed, 0);
intr = mtk_wed_device_irq_get(wed, dev->mt76.mmio.irqmask);
- intr |= (intr1 & ~MT_INT_RX_TXFREE_EXT);
+ intr |= (intr1 & ~MT_INT_TX_RX_DONE_EXT);
} else {
mt76_wr(dev, MT_INT_MASK_CSR, 0);
if (dev->hif2)
--
2.45.2