recipes-wifi/linux-mt76/files/patches-3.x/0044-mtk-mt76-mt7996-add-adie-efuse-merge-support.patch

From 031841be718eb6736dec9c52744664433ed2a34e Mon Sep 17 00:00:00 2001
From: StanleyYP Wang <StanleyYP.Wang@mediatek.com>
Date: Fri, 24 Nov 2023 09:49:08 +0800
Subject: [PATCH 044/223] mtk: mt76: mt7996: add adie efuse merge support

Merge adie-dependent parameters in efuse into eeprom after FT.
Note that Eagle BE14000 is not considered yet.
Add efuse dump command.

Change-Id: Ib088b90147c75d7437f40dd3569e3584c6ff9ab0
Signed-off-by: StanleyYP Wang <StanleyYP.Wang@mediatek.com>
---
 mt7996/debugfs.c  |  41 +++++++++++++
 mt7996/eeprom.c   | 144 ++++++++++++++++++++++++++++++++++++++++++++++
 mt7996/main.c     |   4 +-
 mt7996/testmode.c |   8 ++-
 4 files changed, 193 insertions(+), 4 deletions(-)

diff --git a/mt7996/debugfs.c b/mt7996/debugfs.c
index 1f4bad62..70a97d29 100644
--- a/mt7996/debugfs.c
+++ b/mt7996/debugfs.c
@@ -881,6 +881,46 @@ DEFINE_DEBUGFS_ATTRIBUTE(fops_fw_debug_muru_disable,
 			 mt7996_fw_debug_muru_disable_get,
 			 mt7996_fw_debug_muru_disable_set, "%lld\n");
 
+static ssize_t
+mt7996_efuse_get(struct file *file, char __user *user_buf,
+		 size_t count, loff_t *ppos)
+{
+	struct mt7996_dev *dev = file->private_data;
+	struct mt76_dev *mdev = &dev->mt76;
+	u8 *buff = mdev->otp.data;
+	int i;
+	ssize_t ret;
+	u32 block_num;
+
+	mdev->otp.size = MT7996_EEPROM_SIZE;
+	if (is_mt7996(&dev->mt76) && dev->chip_sku == MT7996_VAR_TYPE_444)
+		mdev->otp.size += 3 * MT_EE_CAL_UNIT;
+
+	if (!mdev->otp.data) {
+		mdev->otp.data = devm_kzalloc(mdev->dev, mdev->otp.size, GFP_KERNEL);
+		if (!mdev->otp.data)
+			return -ENOMEM;
+
+		block_num = DIV_ROUND_UP(mdev->otp.size, MT7996_EEPROM_BLOCK_SIZE);
+		for (i = 0; i < block_num; i++) {
+			buff = mdev->otp.data + i * MT7996_EEPROM_BLOCK_SIZE;
+			ret = mt7996_mcu_get_eeprom(dev, i * MT7996_EEPROM_BLOCK_SIZE, buff);
+			if (ret && ret != -EINVAL)
+				return ret;
+		}
+	}
+
+	ret = simple_read_from_buffer(user_buf, count, ppos, mdev->otp.data, mdev->otp.size);
+
+	return ret;
+}
+
+static const struct file_operations mt7996_efuse_ops = {
+	.read = mt7996_efuse_get,
+	.open = simple_open,
+	.llseek = default_llseek,
+};
+
 int mt7996_init_debugfs(struct mt7996_phy *phy)
 {
 	struct mt7996_dev *dev = phy->dev;
@@ -907,6 +947,7 @@ int mt7996_init_debugfs(struct mt7996_phy *phy)
 	debugfs_create_devm_seqfile(dev->mt76.dev, "twt_stats", dir,
 				    mt7996_twt_stats);
 	debugfs_create_file("rf_regval", 0600, dir, dev, &fops_rf_regval);
+	debugfs_create_file("otp", 0400, dir, dev, &mt7996_efuse_ops);
 
 	if (phy->mt76->cap.has_5ghz) {
 		debugfs_create_u32("dfs_hw_pattern", 0400, dir,
diff --git a/mt7996/eeprom.c b/mt7996/eeprom.c
index 7575dcb9..be87afe8 100644
--- a/mt7996/eeprom.c
+++ b/mt7996/eeprom.c
@@ -546,6 +546,146 @@ static int mt7996_eeprom_load_precal(struct mt7996_dev *dev)
 	return mt76_get_of_data_from_nvmem(mdev, dev->cal, "precal", size);
 }
 
+static int mt7996_apply_cal_free_data(struct mt7996_dev *dev)
+{
+#define MT_EE_CAL_FREE_MAX_SIZE		30
+#define MT_EE_7977BN_OFFSET		(0x1200 - 0x500)
+#define MT_EE_END_OFFSET		0xffff
+	enum adie_type {
+		ADIE_7975,
+		ADIE_7976,
+		ADIE_7977,
+		ADIE_7978,
+		ADIE_7979,
+	};
+	static const u16 adie_offs_list[][MT_EE_CAL_FREE_MAX_SIZE] = {
+		[ADIE_7975] = {0x5cd, 0x5cf, 0x5d1, 0x5d3, 0x6c0, 0x6c1, 0x6c2, 0x6c3,
+			       0x7a1, 0x7a6, 0x7a8, 0x7aa, -1},
+		[ADIE_7976] = {0x4c, 0x4d, 0x4e, 0x4f, 0x50, 0x51, 0x53, 0x55, 0x57, 0x59,
+			       0x70, 0x71, 0x790, 0x791, 0x794, 0x795, 0x7a6, 0x7a8, 0x7aa, -1},
+		[ADIE_7977] = {0x4c, 0x4d, 0x4e, 0x4f, 0x50, 0x51, 0x53, 0x55, 0x57, 0x59,
+			       0x69, 0x6a, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, -1},
+		[ADIE_7978] = {0x91, 0x95, 0x100, 0x102, 0x104, 0x106, 0x107,
+			       0x108, 0x109, 0x10a, 0x10b, 0x10c, 0x10e, 0x110, -1},
+		[ADIE_7979] = {0x4c, 0x4d, 0x4e, 0x4f, 0x50, 0x51, 0x53, 0x55, 0x57, 0x59,
+			       0x69, 0x6a, 0x7a, 0x7b, 0x7c, 0x7e, 0x80, -1},
+	};
+	static const u16 eep_offs_list[][MT_EE_CAL_FREE_MAX_SIZE] = {
+		[ADIE_7975] = {0x451, 0x453, 0x455, 0x457, 0x44c, 0x44d, 0x44e, 0x44f,
+			       0xba1, 0xba6, 0xba8, 0xbaa, -1},
+		[ADIE_7976] = {0x44c, 0x44d, 0x44e, 0x44f, 0x450,
+			       0x451, 0x453, 0x455, 0x457, 0x459,
+			       0x470, 0x471, 0xb90, 0xb91, 0xb94, 0xb95,
+			       0xba6, 0xba8, 0xbaa, -1},
+		[ADIE_7977] = {0x124c, 0x124d, 0x124e, 0x124f, 0x1250,
+			       0x1251, 0x1253, 0x1255, 0x1257, 0x1259,
+			       0x1269, 0x126a, 0x127a, 0x127b, 0x127c, 0x127d, 0x127e, -1},
+		[ADIE_7978] = {0xb91, 0xb95, 0x480, 0x482, 0x484, 0x486, 0x487, 0x488, 0x489,
+			       0x48a, 0x48b, 0x48c, 0x48e, 0x490, -1},
+		[ADIE_7979] = {0x124c, 0x124d, 0x124e, 0x124f, 0x1250, 0x1251,
+			       0x1253, 0x1255, 0x1257, 0x1259, 0x1269, 0x126a,
+			       0x127a, 0x127b, 0x127c, 0x127e, 0x1280, -1},
+	};
+	static const u16 adie_base_7996[] = {
+		0x400, 0x1e00, 0x1200
+	};
+	static const u16 adie_base_7992[] = {
+		0x400, 0x1200, 0x0
+	};
+	static const u16 *adie_offs[__MT_MAX_BAND];
+	static const u16 *eep_offs[__MT_MAX_BAND];
+	static const u16 *adie_base;
+	u8 *eeprom = dev->mt76.eeprom.data;
+	u8 buf[MT7996_EEPROM_BLOCK_SIZE];
+	int adie_id, band, i, ret;
+
+	switch (mt76_chip(&dev->mt76)) {
+	case 0x7990:
+		adie_base = adie_base_7996;
+		/* adie 0 */
+		if (dev->fem_type == MT7996_FEM_INT)
+			adie_id = ADIE_7975;
+		else
+			adie_id = ADIE_7976;
+		adie_offs[0] = adie_offs_list[adie_id];
+		eep_offs[0] = eep_offs_list[adie_id];
+
+		/* adie 1 */
+		if (dev->chip_sku != MT7996_VAR_TYPE_404) {
+			adie_offs[1] = adie_offs_list[ADIE_7977];
+			eep_offs[1] = eep_offs_list[ADIE_7977];
+		}
+
+		/* adie 2 */
+		adie_offs[2] = adie_offs_list[ADIE_7977];
+		eep_offs[2] = eep_offs_list[ADIE_7977];
+		break;
+	case 0x7992:
+		adie_base = adie_base_7992;
+		/* adie 0 */
+		if (dev->chip_sku == MT7992_VAR_TYPE_44 &&
+		    dev->fem_type != MT7996_FEM_EXT)
+			adie_id = ADIE_7975;
+		else if (dev->chip_sku == MT7992_VAR_TYPE_24)
+			adie_id = ADIE_7978;
+		else
+			adie_id = ADIE_7976;
+		adie_offs[0] = adie_offs_list[adie_id];
+		eep_offs[0] = eep_offs_list[adie_id];
+
+		/* adie 1 */
+		if (dev->chip_sku == MT7992_VAR_TYPE_44 &&
+		    dev->fem_type != MT7996_FEM_INT)
+			adie_id = ADIE_7977;
+		else if (dev->chip_sku != MT7992_VAR_TYPE_23)
+			adie_id = ADIE_7979;
+		else
+			break;
+		adie_offs[1] = adie_offs_list[adie_id];
+		eep_offs[1] = eep_offs_list[adie_id];
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	for (band = 0; band < __MT_MAX_BAND; band++) {
+		u16 adie_offset, eep_offset;
+		u32 block_num, prev_block_num = -1;
+
+		if (!adie_offs[band])
+			continue;
+
+		for (i = 0; i < MT_EE_CAL_FREE_MAX_SIZE; i++) {
+			adie_offset = adie_offs[band][i] + adie_base[band];
+			eep_offset = eep_offs[band][i];
+			block_num = adie_offset / MT7996_EEPROM_BLOCK_SIZE;
+
+			if (adie_offs[band][i] == MT_EE_END_OFFSET)
+				break;
+
+			if (is_mt7996(&dev->mt76) && dev->chip_sku == MT7996_VAR_TYPE_444 &&
+			    band == MT_BAND1)
+				eep_offset -= MT_EE_7977BN_OFFSET;
+
+			if (prev_block_num != block_num) {
+				ret = mt7996_mcu_get_eeprom(dev, adie_offset, buf);
+				if (ret) {
+					if (ret != -EINVAL)
+						return ret;
+
+					prev_block_num = -1;
+					continue;
+				}
+			}
+
+			eeprom[eep_offset] = buf[adie_offset % MT7996_EEPROM_BLOCK_SIZE];
+			prev_block_num = block_num;
+		}
+	}
+
+	return 0;
+}
+
 int mt7996_eeprom_init(struct mt7996_dev *dev)
 {
 	int ret;
@@ -556,6 +696,10 @@ int mt7996_eeprom_init(struct mt7996_dev *dev)
 
 	mt7996_eeprom_load_precal(dev);
 
+	ret = mt7996_apply_cal_free_data(dev);
+	if (ret)
+		return ret;
+
 	ret = mt7996_eeprom_parse_hw_cap(dev, &dev->phy);
 	if (ret < 0)
 		return ret;
diff --git a/mt7996/main.c b/mt7996/main.c
index dc00cc2f..ea4679dd 100644
--- a/mt7996/main.c
+++ b/mt7996/main.c
@@ -1485,10 +1485,10 @@ mt7996_background_radar_handle_7975_ifem(struct ieee80211_hw *hw,
 	switch (mt76_chip(&dev->mt76)) {
 	case 0x7990:
 		is_ifem_adie = dev->fem_type == MT7996_FEM_INT &&
-			       dev->chip_sku != MT7996_SKU_233;
+			       dev->chip_sku != MT7996_VAR_TYPE_233;
 		break;
 	case 0x7992:
-		is_ifem_adie = dev->chip_sku == MT7992_SKU_44 &&
+		is_ifem_adie = dev->chip_sku == MT7992_VAR_TYPE_44 &&
 			       dev->fem_type != MT7996_FEM_EXT;
 		break;
 	default:
diff --git a/mt7996/testmode.c b/mt7996/testmode.c
index 5c0eb3cb..5a8b6d0a 100644
--- a/mt7996/testmode.c
+++ b/mt7996/testmode.c
@@ -2128,8 +2128,12 @@ mt7996_tm_write_back_to_efuse(struct mt7996_dev *dev)
 		memcpy(req.data, eeprom + i, MT76_TM_EEPROM_BLOCK_SIZE);
 
 		ret = mt7996_mcu_get_eeprom(dev, i, read_buf, sizeof(read_buf));
-		if (ret < 0)
-			return ret;
+		if (ret) {
+			if (ret != -EINVAL)
+				return ret;
+
+			memset(read_buf, 0, MT76_TM_EEPROM_BLOCK_SIZE);
+		}
 
 		if (!memcmp(req.data, read_buf, MT76_TM_EEPROM_BLOCK_SIZE))
 			continue;
-- 
2.45.2