[rdk-b][common][bsp][Refactor and sync kernel/wifi from Openwrt]
[Description]
Refactor and sync kernel/wifi from Openwrt
[Release-log]
N/A
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/generic/backport-5.4/822-v6.2-0001-nvmem-u-boot-env-fix-crc32_data_offset-on-redundant-.patch b/recipes-kernel/linux/linux-mediatek-5.4/generic/backport-5.4/822-v6.2-0001-nvmem-u-boot-env-fix-crc32_data_offset-on-redundant-.patch
new file mode 100644
index 0000000..69d5a1b
--- /dev/null
+++ b/recipes-kernel/linux/linux-mediatek-5.4/generic/backport-5.4/822-v6.2-0001-nvmem-u-boot-env-fix-crc32_data_offset-on-redundant-.patch
@@ -0,0 +1,56 @@
+From 7a69ff9c9bde03a690ea783970f664782fc303d8 Mon Sep 17 00:00:00 2001
+From: Christian Lamparter <chunkeey@gmail.com>
+Date: Fri, 4 Nov 2022 17:52:03 +0100
+Subject: [PATCH] nvmem: u-boot-env: fix crc32_data_offset on redundant
+ u-boot-env
+
+The Western Digital MyBook Live (PowerPC 464/APM82181)
+has a set of redundant u-boot-env. Loading up the driver
+the following error:
+
+| u_boot_env: Invalid calculated CRC32: 0x4f8f2c86 (expected: 0x98b14514)
+| u_boot_env: probe of partition@1e000 failed with error -22
+
+Looking up the userspace libubootenv utilities source [0],
+it looks like the "mark" or "flag" is not part of the
+crc32 sum... which is unfortunate :(
+
+|static int libuboot_load(struct uboot_ctx *ctx)
+|{
+|[...]
+| if (ctx->redundant) {
+| [...]
+| offsetdata = offsetof(struct uboot_env_redund, data);
+| [...] //-----^^
+| }
+| usable_envsize = ctx->size - offsetdata;
+| buf[0] = malloc(bufsize);
+|[...]
+| for (i = 0; i < copies; i++) {
+| data = (uint8_t *)(buf[i] + offsetdata);
+| uint32_t crc;
+|
+| ret = devread(ctx, i, buf[i]);
+| [...]
+| crc = *(uint32_t *)(buf[i] + offsetcrc);
+| dev->crc = crc32(0, (uint8_t *)data, usable_envsize);
+|
+
+[0] https://github.com/sbabic/libubootenv/blob/master/src/uboot_env.c#L951
+Fixes: d5542923f200 ("nvmem: add driver handling U-Boot environment variables")
+Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
+---
+ drivers/nvmem/u-boot-env.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/nvmem/u-boot-env.c
++++ b/drivers/nvmem/u-boot-env.c
+@@ -135,7 +135,7 @@ static int u_boot_env_parse(struct u_boo
+ break;
+ case U_BOOT_FORMAT_REDUNDANT:
+ crc32_offset = offsetof(struct u_boot_env_image_redundant, crc32);
+- crc32_data_offset = offsetof(struct u_boot_env_image_redundant, mark);
++ crc32_data_offset = offsetof(struct u_boot_env_image_redundant, data);
+ data_offset = offsetof(struct u_boot_env_image_redundant, data);
+ break;
+ }
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/generic/backport-5.4/822-v6.2-0002-nvmem-u-boot-env-align-endianness-of-crc32-values.patch b/recipes-kernel/linux/linux-mediatek-5.4/generic/backport-5.4/822-v6.2-0002-nvmem-u-boot-env-align-endianness-of-crc32-values.patch
new file mode 100644
index 0000000..7d6723b
--- /dev/null
+++ b/recipes-kernel/linux/linux-mediatek-5.4/generic/backport-5.4/822-v6.2-0002-nvmem-u-boot-env-align-endianness-of-crc32-values.patch
@@ -0,0 +1,47 @@
+From 0e71cac033bb7689c4dfa2e6814191337ef770f5 Mon Sep 17 00:00:00 2001
+From: INAGAKI Hiroshi <musashino.open@gmail.com>
+Date: Thu, 13 Oct 2022 00:51:33 +0900
+Subject: [PATCH] nvmem: u-boot-env: align endianness of crc32 values
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+This patch fixes crc32 error on Big-Endianness system by conversion of
+calculated crc32 value.
+
+Little-Endianness system:
+
+ obtained crc32: Little
+calculated crc32: Little
+
+Big-Endianness system:
+
+ obtained crc32: Little
+calculated crc32: Big
+
+log (APRESIA ApresiaLightGS120GT-SS, RTL8382M, Big-Endianness):
+
+[ 8.570000] u_boot_env 18001200.spi:flash@0:partitions:partition@c0000: Invalid calculated CRC32: 0x88cd6f09 (expected: 0x096fcd88)
+[ 8.580000] u_boot_env: probe of 18001200.spi:flash@0:partitions:partition@c0000 failed with error -22
+
+Fixes: f955dc1445069 ("nvmem: add driver handling U-Boot environment variables")
+
+Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
+Acked-by: Rafał Miłecki <rafal@milecki.pl>
+Tested-by: Christian Lamparter <chunkeey@gmail.com>
+Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
+---
+ drivers/nvmem/u-boot-env.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/nvmem/u-boot-env.c
++++ b/drivers/nvmem/u-boot-env.c
+@@ -143,7 +143,7 @@ static int u_boot_env_parse(struct u_boo
+ crc32_data_len = priv->mtd->size - crc32_data_offset;
+ data_len = priv->mtd->size - data_offset;
+
+- calc = crc32(~0, buf + crc32_data_offset, crc32_data_len) ^ ~0L;
++ calc = le32_to_cpu((__le32)crc32(~0, buf + crc32_data_offset, crc32_data_len) ^ ~0L);
+ if (calc != crc32) {
+ dev_err(dev, "Invalid calculated CRC32: 0x%08x (expected: 0x%08x)\n", calc, crc32);
+ err = -EINVAL;
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/generic/backport-5.4/822-v6.2-0003-nvmem-u-boot-env-add-Broadcom-format-support.patch b/recipes-kernel/linux/linux-mediatek-5.4/generic/backport-5.4/822-v6.2-0003-nvmem-u-boot-env-add-Broadcom-format-support.patch
new file mode 100644
index 0000000..429b24f
--- /dev/null
+++ b/recipes-kernel/linux/linux-mediatek-5.4/generic/backport-5.4/822-v6.2-0003-nvmem-u-boot-env-add-Broadcom-format-support.patch
@@ -0,0 +1,65 @@
+From 5b4eaafbeac472fc19049152f18e88aecb2b2829 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Mon, 17 Oct 2022 09:17:22 +0200
+Subject: [PATCH] nvmem: u-boot-env: add Broadcom format support
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Broadcom uses U-Boot for a lot of their bcmbca familiy chipsets. They
+decided to store U-Boot environment data inside U-Boot partition and to
+use a custom header (with "uEnv" magic and env data length).
+
+Add support for Broadcom's specific binding and their custom format.
+
+Ref: 6b0584c19d87 ("dt-bindings: nvmem: u-boot,env: add Broadcom's variant binding")
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
+---
+ drivers/nvmem/u-boot-env.c | 14 ++++++++++++++
+ 1 file changed, 14 insertions(+)
+
+--- a/drivers/nvmem/u-boot-env.c
++++ b/drivers/nvmem/u-boot-env.c
+@@ -16,6 +16,7 @@
+ enum u_boot_env_format {
+ U_BOOT_FORMAT_SINGLE,
+ U_BOOT_FORMAT_REDUNDANT,
++ U_BOOT_FORMAT_BROADCOM,
+ };
+
+ struct u_boot_env {
+@@ -40,6 +41,13 @@ struct u_boot_env_image_redundant {
+ uint8_t data[];
+ } __packed;
+
++struct u_boot_env_image_broadcom {
++ __le32 magic;
++ __le32 len;
++ __le32 crc32;
++ uint8_t data[0];
++} __packed;
++
+ static int u_boot_env_read(void *context, unsigned int offset, void *val,
+ size_t bytes)
+ {
+@@ -138,6 +146,11 @@ static int u_boot_env_parse(struct u_boo
+ crc32_data_offset = offsetof(struct u_boot_env_image_redundant, data);
+ data_offset = offsetof(struct u_boot_env_image_redundant, data);
+ break;
++ case U_BOOT_FORMAT_BROADCOM:
++ crc32_offset = offsetof(struct u_boot_env_image_broadcom, crc32);
++ crc32_data_offset = offsetof(struct u_boot_env_image_broadcom, data);
++ data_offset = offsetof(struct u_boot_env_image_broadcom, data);
++ break;
+ }
+ crc32 = le32_to_cpu(*(__le32 *)(buf + crc32_offset));
+ crc32_data_len = priv->mtd->size - crc32_data_offset;
+@@ -202,6 +215,7 @@ static const struct of_device_id u_boot_
+ { .compatible = "u-boot,env", .data = (void *)U_BOOT_FORMAT_SINGLE, },
+ { .compatible = "u-boot,env-redundant-bool", .data = (void *)U_BOOT_FORMAT_REDUNDANT, },
+ { .compatible = "u-boot,env-redundant-count", .data = (void *)U_BOOT_FORMAT_REDUNDANT, },
++ { .compatible = "brcm,env", .data = (void *)U_BOOT_FORMAT_BROADCOM, },
+ {},
+ };
+
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/generic/backport-5.4/backport-5.4.inc b/recipes-kernel/linux/linux-mediatek-5.4/generic/backport-5.4/backport-5.4.inc
index 8147d61..5fb2fd7 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/generic/backport-5.4/backport-5.4.inc
+++ b/recipes-kernel/linux/linux-mediatek-5.4/generic/backport-5.4/backport-5.4.inc
@@ -272,6 +272,9 @@
file://818-v5.8-i2c-pxa-remove-some-unnecessary-debug.patch \
file://820-v5.8-i2c-pxa-use-master-abort-for-device-probes.patch \
file://821-v5.8-i2c-pxa-implement-generic-i2c-bus-recovery.patch \
+ file://822-v6.2-0001-nvmem-u-boot-env-fix-crc32_data_offset-on-redundant-.patch \
+ file://822-v6.2-0002-nvmem-u-boot-env-align-endianness-of-crc32-values.patch \
+ file://822-v6.2-0003-nvmem-u-boot-env-add-Broadcom-format-support.patch \
file://825-v5.8-spi-rb4xx-null-pointer-bug-fix.patch \
file://826-v5.8-spi-rb4xx-update-driver-to-be-device-tree-aware.patch \
file://827-v5.16-spi-add-power-control-when-set_cs.patch \
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988.dtsi b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988.dtsi
index 28e3002..e7f5b6d 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988.dtsi
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988.dtsi
@@ -112,6 +112,12 @@
};
};
+ pmu {
+ compatible = "arm,cortex-a73-pmu";
+ interrupt-parent = <&gic>;
+ interrupt = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
+ };
+
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <1000>;
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_path.c b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_path.c
index c9b1a43..3144511 100755
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_path.c
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_path.c
@@ -426,7 +426,7 @@
int mtk_gmac_xgmii_path_setup(struct mtk_eth *eth, int mac_id)
{
int err;
- u64 path;
+ u64 path = 0;
if (mac_id == 1)
path = MTK_ETH_PATH_GMAC2_XGMII;
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c
index 2d2797d..98507af 100755
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -209,7 +209,7 @@
static int mt7621_gmac0_rgmii_adjust(struct mtk_eth *eth,
phy_interface_t interface)
{
- u32 val;
+ u32 val = 0;
/* Check DDR memory type.
* Currently TRGMII mode with DDR2 memory is not supported.
@@ -297,7 +297,7 @@
phylink_config);
struct mtk_eth *eth = mac->hw;
u32 sid, i;
- int val, ge_mode, err=0;
+ int val = 0, ge_mode, err = 0;
/* MT76x8 has no hardware settings between for the MAC */
if (!MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628) &&
@@ -535,7 +535,7 @@
struct mtk_xgmii *ss = eth->xgmii;
u32 id = mtk_mac2xgmii_id(eth, mac->id);
u32 pmsr = mtk_r32(mac->hw, MTK_MAC_MSR(mac->id));
- u32 val;
+ u32 val = 0;
regmap_read(ss->regmap_sgmii[id], SGMSYS_PCS_CONTROL_1, &val);
@@ -3576,7 +3576,9 @@
continue;
call_netdevice_notifiers(MTK_FE_START_RESET, eth->netdev[i]);
rtnl_unlock();
- wait_for_completion_timeout(&wait_ser_done, 5000);
+ if (!wait_for_completion_timeout(&wait_ser_done, 5000))
+ pr_warn("[%s] wait for MTK_FE_START_RESET failed\n",
+ __func__);
rtnl_lock();
break;
}
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h
index 00eec80..45b2e24 100755
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h
@@ -171,7 +171,7 @@
#define PDMA_BASE 0x6800
#define QDMA_BASE 0x4400
#define WDMA_BASE(x) (0x4800 + ((x) * 0x400))
-#define PPE_BASE(x) ((x == 2) ? 0x2C00 : 0x2200 + ((x) * 0x400))
+#define PPE_BASE(x) ((x == 2) ? 0x2E00 : 0x2200 + ((x) * 0x400))
#elif defined(CONFIG_MEDIATEK_NETSYS_V2)
#define PDMA_BASE 0x6000
#define QDMA_BASE 0x4400
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_hnat/hnat.c b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_hnat/hnat.c
index 5312a0b..e162492 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_hnat/hnat.c
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_hnat/hnat.c
@@ -308,8 +308,9 @@
writel(HASH_SEED_KEY, hnat_priv->ppe_base[ppe_id] + PPE_HASH_SEED);
cr_set_field(hnat_priv->ppe_base[ppe_id] + PPE_TB_CFG, XMODE, 0);
cr_set_field(hnat_priv->ppe_base[ppe_id] + PPE_TB_CFG, TB_ENTRY_SIZE,
- (hnat_priv->data->version == MTK_HNAT_V5) ? ENTRY_128B :
- (hnat_priv->data->version == MTK_HNAT_V4) ? ENTRY_96B : ENTRY_80B);
+ (hnat_priv->data->version == MTK_HNAT_V3) ? ENTRY_128B :
+ (hnat_priv->data->version == MTK_HNAT_V2) ? ENTRY_96B :
+ ENTRY_80B);
cr_set_field(hnat_priv->ppe_base[ppe_id] + PPE_TB_CFG, SMA, SMA_FWD_CPU_BUILD_ENTRY);
/* set ip proto */
@@ -325,12 +326,12 @@
BIT_IPV4_DSL_EN | BIT_IPV6_6RD_EN |
BIT_IPV6_3T_ROUTE_EN | BIT_IPV6_5T_ROUTE_EN);
- if (hnat_priv->data->version == MTK_HNAT_V4 ||
- hnat_priv->data->version == MTK_HNAT_V5)
+ if (hnat_priv->data->version == MTK_HNAT_V2 ||
+ hnat_priv->data->version == MTK_HNAT_V3)
cr_set_bits(hnat_priv->ppe_base[ppe_id] + PPE_FLOW_CFG,
BIT_IPV4_MAPE_EN | BIT_IPV4_MAPT_EN);
- if (hnat_priv->data->version == MTK_HNAT_V5)
+ if (hnat_priv->data->version == MTK_HNAT_V3)
cr_set_bits(hnat_priv->ppe_base[ppe_id] + PPE_FLOW_CFG,
BIT_IPV6_NAT_EN | BIT_IPV6_NAPT_EN |
BIT_CS0_RM_ALL_IP6_IP_EN);
@@ -378,13 +379,13 @@
cr_set_field(hnat_priv->ppe_base[ppe_id] + PPE_GLO_CFG, TTL0_DRP, 0);
cr_set_field(hnat_priv->ppe_base[ppe_id] + PPE_GLO_CFG, MCAST_TB_EN, 1);
- if (hnat_priv->data->version == MTK_HNAT_V4 ||
- hnat_priv->data->version == MTK_HNAT_V5) {
+ if (hnat_priv->data->version == MTK_HNAT_V2 ||
+ hnat_priv->data->version == MTK_HNAT_V3) {
writel(0xcb777, hnat_priv->ppe_base[ppe_id] + PPE_DFT_CPORT1);
writel(0x7f, hnat_priv->ppe_base[ppe_id] + PPE_SBW_CTRL);
}
- if (hnat_priv->data->version == MTK_HNAT_V5) {
+ if (hnat_priv->data->version == MTK_HNAT_V3) {
cr_set_field(hnat_priv->ppe_base[ppe_id] + PPE_SB_FIFO_DBG,
SB_MED_FULL_DRP_EN, 1);
}
@@ -433,7 +434,7 @@
writel(hnat_priv->foe_table_dev[ppe_id], hnat_priv->ppe_base[ppe_id] + PPE_TB_BASE);
memset(hnat_priv->foe_table_cpu[ppe_id], 0, foe_table_sz);
- if (hnat_priv->data->version == MTK_HNAT_V1)
+ if (hnat_priv->data->version == MTK_HNAT_V1_1)
exclude_boundary_entry(hnat_priv->foe_table_cpu[ppe_id]);
if (hnat_priv->data->per_flow_accounting) {
@@ -525,12 +526,12 @@
BIT_IPV6_6RD_EN | BIT_IPV6_3T_ROUTE_EN |
BIT_IPV6_5T_ROUTE_EN | BIT_FUC_FOE | BIT_FMC_FOE);
- if (hnat_priv->data->version == MTK_HNAT_V4 ||
- hnat_priv->data->version == MTK_HNAT_V5)
+ if (hnat_priv->data->version == MTK_HNAT_V2 ||
+ hnat_priv->data->version == MTK_HNAT_V3)
cr_clr_bits(hnat_priv->ppe_base[ppe_id] + PPE_FLOW_CFG,
BIT_IPV4_MAPE_EN | BIT_IPV4_MAPT_EN);
- if (hnat_priv->data->version == MTK_HNAT_V5)
+ if (hnat_priv->data->version == MTK_HNAT_V3)
cr_clr_bits(hnat_priv->ppe_base[ppe_id] + PPE_FLOW_CFG,
BIT_IPV6_NAT_EN | BIT_IPV6_NAPT_EN |
BIT_CS0_RM_ALL_IP6_IP_EN);
@@ -596,8 +597,8 @@
*/
if (hnat_priv->data->whnat) {
ra_sw_nat_hook_rx =
- (hnat_priv->data->version == MTK_HNAT_V4 ||
- hnat_priv->data->version == MTK_HNAT_V5) ?
+ (hnat_priv->data->version == MTK_HNAT_V2 ||
+ hnat_priv->data->version == MTK_HNAT_V3) ?
mtk_sw_nat_hook_rx : NULL;
ra_sw_nat_hook_tx = mtk_sw_nat_hook_tx;
ppe_dev_register_hook = mtk_ppe_dev_register_hook;
@@ -659,7 +660,7 @@
hnat_priv->ppe_base[ppe_id] + PPE_TB_BASE);
memset(hnat_priv->foe_table_cpu[ppe_id], 0, foe_table_sz);
- if (hnat_priv->data->version == MTK_HNAT_V1)
+ if (hnat_priv->data->version == MTK_HNAT_V1_1)
exclude_boundary_entry(hnat_priv->foe_table_cpu[ppe_id]);
if (hnat_priv->data->per_flow_accounting) {
@@ -840,7 +841,7 @@
}
timer_setup(&hnat_priv->hnat_sma_build_entry_timer, hnat_sma_build_entry, 0);
- if (hnat_priv->data->version == MTK_HNAT_V3) {
+ if (hnat_priv->data->version == MTK_HNAT_V1_3) {
timer_setup(&hnat_priv->hnat_reset_timestamp_timer, hnat_reset_timestamp, 0);
hnat_priv->hnat_reset_timestamp_timer.expires = jiffies;
add_timer(&hnat_priv->hnat_reset_timestamp_timer);
@@ -886,7 +887,7 @@
hnat_deinit_debugfs(hnat_priv);
hnat_release_netdev();
del_timer_sync(&hnat_priv->hnat_sma_build_entry_timer);
- if (hnat_priv->data->version == MTK_HNAT_V3)
+ if (hnat_priv->data->version == MTK_HNAT_V1_3)
del_timer_sync(&hnat_priv->hnat_reset_timestamp_timer);
if (IS_HQOS_MODE && IS_GMAC1_MODE)
@@ -900,7 +901,7 @@
.whnat = false,
.per_flow_accounting = false,
.mcast = false,
- .version = MTK_HNAT_V1,
+ .version = MTK_HNAT_V1_1,
};
static const struct mtk_hnat_data hnat_data_v2 = {
@@ -908,7 +909,7 @@
.whnat = true,
.per_flow_accounting = true,
.mcast = false,
- .version = MTK_HNAT_V2,
+ .version = MTK_HNAT_V1_2,
};
static const struct mtk_hnat_data hnat_data_v3 = {
@@ -916,7 +917,7 @@
.whnat = false,
.per_flow_accounting = false,
.mcast = false,
- .version = MTK_HNAT_V3,
+ .version = MTK_HNAT_V1_3,
};
static const struct mtk_hnat_data hnat_data_v4 = {
@@ -924,7 +925,7 @@
.whnat = true,
.per_flow_accounting = true,
.mcast = false,
- .version = MTK_HNAT_V4,
+ .version = MTK_HNAT_V2,
};
static const struct mtk_hnat_data hnat_data_v5 = {
@@ -932,7 +933,7 @@
.whnat = true,
.per_flow_accounting = true,
.mcast = false,
- .version = MTK_HNAT_V5,
+ .version = MTK_HNAT_V3,
};
const struct of_device_id of_hnat_match[] = {
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_hnat/hnat.h b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_hnat/hnat.h
index 95c7cd6..f2d5dc8 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_hnat/hnat.h
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_hnat/hnat.h
@@ -834,11 +834,11 @@
};
enum mtk_hnat_version {
- MTK_HNAT_V1 = 1, /* version 1: mt7621, mt7623 */
- MTK_HNAT_V2, /* version 2: mt7622 */
- MTK_HNAT_V3, /* version 3: mt7629 */
- MTK_HNAT_V4, /* version 4: mt7981, mt7986 */
- MTK_HNAT_V5, /* version 5: mt7988 */
+ MTK_HNAT_V1_1 = 1, /* version 1.1: mt7621, mt7623 */
+ MTK_HNAT_V1_2, /* version 1.2: mt7622 */
+ MTK_HNAT_V1_3, /* version 1.3: mt7629 */
+ MTK_HNAT_V2, /* version 2: mt7981, mt7986 */
+ MTK_HNAT_V3, /* version 3: mt7988 */
};
struct mtk_hnat_data {
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_hnat/hnat_debugfs.c b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_hnat/hnat_debugfs.c
index dd31560..81d528f 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_hnat/hnat_debugfs.c
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_hnat/hnat_debugfs.c
@@ -828,7 +828,7 @@
cnt_r1 = readl(h->ppe_base[ppe_id] + PPE_MIB_SER_R1);
cnt_r2 = readl(h->ppe_base[ppe_id] + PPE_MIB_SER_R2);
- if (hnat_priv->data->version == MTK_HNAT_V5) {
+ if (hnat_priv->data->version == MTK_HNAT_V3) {
cnt_r3 = readl(h->ppe_base[ppe_id] + PPE_MIB_SER_R3);
*bytes = cnt_r0 + ((u64)cnt_r1 << 32);
*packets = cnt_r2 + ((u64)cnt_r3 << 32);
@@ -2106,7 +2106,7 @@
"scheduler: %d\nhw resv: %d\nsw resv: %d\n", scheduler,
(qtx_cfg >> 8) & 0xff, qtx_cfg & 0xff);
- if (hnat_priv->data->version != MTK_HNAT_V1) {
+ if (hnat_priv->data->version != MTK_HNAT_V1_1) {
/* Switch to debug mode */
cr_set_field(h->fe_base + QTX_MIB_IF, MIB_ON_QTX_CFG, 1);
cr_set_field(h->fe_base + QTX_MIB_IF, VQTX_MIB_EN, 1);
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_hnat/hnat_mcast.c b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_hnat/hnat_mcast.c
index 210b191..edf17cb 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_hnat/hnat_mcast.c
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_hnat/hnat_mcast.c
@@ -289,7 +289,7 @@
if (!pmcast)
return -1;
- if (hnat_priv->data->version == MTK_HNAT_V1)
+ if (hnat_priv->data->version == MTK_HNAT_V1_1)
pmcast->max_entry = 0x10;
else
pmcast->max_entry = MAX_MCAST_ENTRY;
@@ -306,7 +306,7 @@
hnat_priv->pmcast = pmcast;
/* mt7629 should checkout mcast entry life time manualy */
- if (hnat_priv->data->version == MTK_HNAT_V3) {
+ if (hnat_priv->data->version == MTK_HNAT_V1_3) {
timer_setup(&hnat_priv->hnat_mcast_check_timer,
hnat_mcast_check_timestamp, 0);
hnat_priv->hnat_mcast_check_timer.expires = jiffies;
@@ -341,7 +341,7 @@
if (!pmcast)
return -EINVAL;
- if (hnat_priv->data->version == MTK_HNAT_V3)
+ if (hnat_priv->data->version == MTK_HNAT_V1_3)
del_timer_sync(&hnat_priv->hnat_mcast_check_timer);
flush_work(&pmcast->work);
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_hnat/hnat_nf_hook.c b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_hnat/hnat_nf_hook.c
index 24350c9..02ec4f0 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_hnat/hnat_nf_hook.c
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_hnat/hnat_nf_hook.c
@@ -440,11 +440,11 @@
}
if (IS_BOND_MODE &&
- (((hnat_priv->data->version == MTK_HNAT_V4 ||
- hnat_priv->data->version == MTK_HNAT_V5) &&
+ (((hnat_priv->data->version == MTK_HNAT_V2 ||
+ hnat_priv->data->version == MTK_HNAT_V3) &&
(skb_hnat_entry(skb) != 0x7fff)) ||
- ((hnat_priv->data->version != MTK_HNAT_V4 &&
- hnat_priv->data->version != MTK_HNAT_V5) &&
+ ((hnat_priv->data->version != MTK_HNAT_V2 &&
+ hnat_priv->data->version != MTK_HNAT_V3) &&
(skb_hnat_entry(skb) != 0x3fff))))
skb_set_hash(skb, skb_hnat_entry(skb) >> 1, PKT_HASH_TYPE_L4);
@@ -1071,8 +1071,8 @@
entry.bfib1.vlan_layer += (hw_path->flags & FLOW_OFFLOAD_PATH_VLAN) ? 1 : 0;
entry.bfib1.vpm = (entry.bfib1.vlan_layer) ? 1 : 0;
entry.bfib1.cah = 1;
- entry.bfib1.time_stamp = (hnat_priv->data->version == MTK_HNAT_V4 ||
- hnat_priv->data->version == MTK_HNAT_V5) ?
+ entry.bfib1.time_stamp = (hnat_priv->data->version == MTK_HNAT_V2 ||
+ hnat_priv->data->version == MTK_HNAT_V3) ?
readl(hnat_priv->fe_base + 0x0010) & (0xFF) :
readl(hnat_priv->fe_base + 0x0010) & (0x7FFF);
@@ -1082,7 +1082,7 @@
if (hnat_priv->data->mcast &&
is_multicast_ether_addr(ð->h_dest[0])) {
entry.ipv4_hnapt.iblk2.mcast = 1;
- if (hnat_priv->data->version == MTK_HNAT_V3) {
+ if (hnat_priv->data->version == MTK_HNAT_V1_3) {
entry.bfib1.sta = 1;
entry.ipv4_hnapt.m_timestamp = foe_timestamp(hnat_priv);
}
@@ -1091,8 +1091,8 @@
}
entry.ipv4_hnapt.iblk2.port_ag =
- (hnat_priv->data->version == MTK_HNAT_V4 ||
- hnat_priv->data->version == MTK_HNAT_V5) ? 0xf : 0x3f;
+ (hnat_priv->data->version == MTK_HNAT_V2 ||
+ hnat_priv->data->version == MTK_HNAT_V3) ? 0xf : 0x3f;
break;
case IPV4_DSLITE:
case IPV4_MAP_E:
@@ -1104,7 +1104,7 @@
if (hnat_priv->data->mcast &&
is_multicast_ether_addr(ð->h_dest[0])) {
entry.ipv6_5t_route.iblk2.mcast = 1;
- if (hnat_priv->data->version == MTK_HNAT_V3) {
+ if (hnat_priv->data->version == MTK_HNAT_V1_3) {
entry.bfib1.sta = 1;
entry.ipv4_hnapt.m_timestamp = foe_timestamp(hnat_priv);
}
@@ -1113,8 +1113,8 @@
}
entry.ipv6_5t_route.iblk2.port_ag =
- (hnat_priv->data->version == MTK_HNAT_V4 ||
- hnat_priv->data->version == MTK_HNAT_V5) ? 0xf : 0x3f;
+ (hnat_priv->data->version == MTK_HNAT_V2 ||
+ hnat_priv->data->version == MTK_HNAT_V3) ? 0xf : 0x3f;
break;
}
return entry;
@@ -1458,12 +1458,15 @@
if (IS_HQOS_MODE) {
entry.ipv4_hnapt.iblk2.qid =
- (hnat_priv->data->version == MTK_HNAT_V4 ||
- hnat_priv->data->version == MTK_HNAT_V5) ?
+ (hnat_priv->data->version ==
+ MTK_HNAT_V2 ||
+ hnat_priv->data->version ==
+ MTK_HNAT_V3) ?
skb->mark & 0x7f : skb->mark & 0xf;
#if defined(CONFIG_MEDIATEK_NETSYS_V3)
if ((IS_HQOS_UL_MODE && IS_WAN(dev)) ||
- (IS_HQOS_DL_MODE && IS_LAN(dev)) ||
+ (IS_HQOS_DL_MODE &&
+ IS_LAN_GRP(dev)) ||
(IS_PPPQ_MODE &&
IS_PPPQ_PATH(dev, skb)))
entry.ipv4_hnapt.tport_id = 1;
@@ -1599,16 +1602,16 @@
if (IS_IPV4_GRP(foe)) {
entry.ipv4_hnapt.iblk2.dp = gmac;
entry.ipv4_hnapt.iblk2.port_mg =
- (hnat_priv->data->version == MTK_HNAT_V1) ? 0x3f : 0;
+ (hnat_priv->data->version == MTK_HNAT_V1_1) ? 0x3f : 0;
if (qos_toggle) {
- if (hnat_priv->data->version == MTK_HNAT_V4 ||
- hnat_priv->data->version == MTK_HNAT_V5) {
+ if (hnat_priv->data->version == MTK_HNAT_V2 ||
+ hnat_priv->data->version == MTK_HNAT_V3) {
entry.ipv4_hnapt.iblk2.qid = qid & 0x7f;
} else {
/* qid[5:0]= port_mg[1:0]+ qid[3:0] */
entry.ipv4_hnapt.iblk2.qid = qid & 0xf;
- if (hnat_priv->data->version != MTK_HNAT_V1)
+ if (hnat_priv->data->version != MTK_HNAT_V1_1)
entry.ipv4_hnapt.iblk2.port_mg |=
((qid >> 4) & 0x3);
@@ -1628,7 +1631,7 @@
else
#if defined(CONFIG_MEDIATEK_NETSYS_V3)
if ((IS_HQOS_UL_MODE && IS_WAN(dev)) ||
- (IS_HQOS_DL_MODE && IS_LAN(dev)) ||
+ (IS_HQOS_DL_MODE && IS_LAN_GRP(dev)) ||
(IS_PPPQ_MODE &&
IS_PPPQ_PATH(dev, skb)))
entry.ipv4_hnapt.tport_id = 1;
@@ -1646,16 +1649,16 @@
} else {
entry.ipv6_5t_route.iblk2.dp = gmac;
entry.ipv6_5t_route.iblk2.port_mg =
- (hnat_priv->data->version == MTK_HNAT_V1) ? 0x3f : 0;
+ (hnat_priv->data->version == MTK_HNAT_V1_1) ? 0x3f : 0;
if (qos_toggle) {
- if (hnat_priv->data->version == MTK_HNAT_V4 ||
- hnat_priv->data->version == MTK_HNAT_V5) {
+ if (hnat_priv->data->version == MTK_HNAT_V2 ||
+ hnat_priv->data->version == MTK_HNAT_V3) {
entry.ipv6_5t_route.iblk2.qid = qid & 0x7f;
} else {
/* qid[5:0]= port_mg[1:0]+ qid[3:0] */
entry.ipv6_5t_route.iblk2.qid = qid & 0xf;
- if (hnat_priv->data->version != MTK_HNAT_V1)
+ if (hnat_priv->data->version != MTK_HNAT_V1_1)
entry.ipv6_5t_route.iblk2.port_mg |=
((qid >> 4) & 0x3);
@@ -1674,7 +1677,7 @@
else
#if defined(CONFIG_MEDIATEK_NETSYS_V3)
if ((IS_HQOS_UL_MODE && IS_WAN(dev)) ||
- (IS_HQOS_DL_MODE && IS_LAN(dev)) ||
+ (IS_HQOS_DL_MODE && IS_LAN_GRP(dev)) ||
(IS_PPPQ_MODE &&
IS_PPPQ_PATH(dev, skb)))
entry.ipv6_5t_route.tport_id = 1;
@@ -1801,10 +1804,10 @@
/* MT7622 wifi hw_nat not support QoS */
if (IS_IPV4_GRP(entry)) {
entry->ipv4_hnapt.iblk2.fqos = 0;
- if ((hnat_priv->data->version == MTK_HNAT_V2 &&
+ if ((hnat_priv->data->version == MTK_HNAT_V1_2 &&
gmac_no == NR_WHNAT_WDMA_PORT) ||
- ((hnat_priv->data->version == MTK_HNAT_V4 ||
- hnat_priv->data->version == MTK_HNAT_V5) &&
+ ((hnat_priv->data->version == MTK_HNAT_V2 ||
+ hnat_priv->data->version == MTK_HNAT_V3) &&
(gmac_no == NR_WDMA0_PORT || gmac_no == NR_WDMA1_PORT))) {
entry->ipv4_hnapt.winfo.bssid = skb_hnat_bss_id(skb);
entry->ipv4_hnapt.winfo.wcid = skb_hnat_wc_id(skb);
@@ -1871,10 +1874,10 @@
#endif
} else {
entry->ipv6_5t_route.iblk2.fqos = 0;
- if ((hnat_priv->data->version == MTK_HNAT_V2 &&
+ if ((hnat_priv->data->version == MTK_HNAT_V1_2 &&
gmac_no == NR_WHNAT_WDMA_PORT) ||
- ((hnat_priv->data->version == MTK_HNAT_V4 ||
- hnat_priv->data->version == MTK_HNAT_V5) &&
+ ((hnat_priv->data->version == MTK_HNAT_V2 ||
+ hnat_priv->data->version == MTK_HNAT_V3) &&
(gmac_no == NR_WDMA0_PORT || gmac_no == NR_WDMA1_PORT))) {
entry->ipv6_5t_route.winfo.bssid = skb_hnat_bss_id(skb);
entry->ipv6_5t_route.winfo.wcid = skb_hnat_wc_id(skb);
@@ -2155,7 +2158,7 @@
mtk_hnat_dscp_update(skb, entry);
/* update mcast timestamp*/
- if (hnat_priv->data->version == MTK_HNAT_V3 &&
+ if (hnat_priv->data->version == MTK_HNAT_V1_3 &&
hnat_priv->data->mcast && entry->bfib1.sta == 1)
entry->ipv4_hnapt.m_timestamp = foe_timestamp(hnat_priv);
@@ -2410,7 +2413,7 @@
struct sk_buff *skb,
const struct nf_hook_state *state)
{
- if ((hnat_priv->data->version == MTK_HNAT_V2) &&
+ if ((hnat_priv->data->version == MTK_HNAT_V1_2) &&
unlikely(IS_EXT(state->in) && IS_EXT(state->out)))
hnat_set_head_frags(state, skb, 1, hnat_set_alg);
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_sgmii.c b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_sgmii.c
index 872c27e..64a6353 100755
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_sgmii.c
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_sgmii.c
@@ -41,7 +41,7 @@
{
u32 id = mtk_mac2xgmii_id(ss->eth, mac_id);
- if (id < 0 || id >= MTK_MAX_DEVS ||
+ if (id >= MTK_MAX_DEVS ||
!ss->regmap_sgmii[id] || !ss->regmap_pextp[id])
return;
@@ -161,7 +161,7 @@
int mtk_sgmii_setup_mode_an(struct mtk_xgmii *ss, unsigned int mac_id)
{
struct mtk_eth *eth = ss->eth;
- unsigned int val;
+ unsigned int val = 0;
u32 id = mtk_mac2xgmii_id(ss->eth, mac_id);
if (!ss->regmap_sgmii[id])
@@ -216,7 +216,7 @@
const struct phylink_link_state *state)
{
struct mtk_eth *eth = ss->eth;
- unsigned int val;
+ unsigned int val = 0;
u32 id = mtk_mac2xgmii_id(eth, mac_id);
if (!ss->regmap_sgmii[id])
@@ -285,7 +285,7 @@
void mtk_sgmii_restart_an(struct mtk_eth *eth, int mac_id)
{
struct mtk_xgmii *ss = eth->xgmii;
- unsigned int val, sid = mtk_mac2xgmii_id(eth, mac_id);
+ unsigned int val = 0, sid = mtk_mac2xgmii_id(eth, mac_id);
/* Decide how GMAC and SGMIISYS be mapped */
sid = (MTK_HAS_CAPS(eth->soc->caps, MTK_SHARED_SGMII)) ?
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9990-mt7622-backport-nf-hw-offload-framework-and-ups.patch b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9990-mt7622-backport-nf-hw-offload-framework-and-ups.patch
index 31bfae5..9b4cd67 100755
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9990-mt7622-backport-nf-hw-offload-framework-and-ups.patch
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9990-mt7622-backport-nf-hw-offload-framework-and-ups.patch
@@ -1466,9 +1466,9 @@
+ mtk_foe_entry_set_dsa(foe, dsa_port);
+
+ if (dev == eth->netdev[0])
-+ pse_port = 1;
++ pse_port = PSE_GDM1_PORT;
+ else if (dev == eth->netdev[1])
-+ pse_port = 2;
++ pse_port = PSE_GDM2_PORT;
+ else
+ return -EOPNOTSUPP;
+
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9993-add-wed.patch b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9993-add-wed.patch
index 2d27d90..7aabbeb 100755
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9993-add-wed.patch
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9993-add-wed.patch
@@ -1341,7 +1341,7 @@
+ if (mtk_flow_get_wdma_info(dev, dest_mac, &info) == 0) {
+ mtk_foe_entry_set_wdma(foe, info.wdma_idx, info.queue, info.bss,
+ info.wcid);
-+ pse_port = 3;
++ pse_port = PSE_PPE0_PORT;
+ *wed_index = info.wdma_idx;
+ goto out;
+ }
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9994-ethernet-update-ppe-from-mt7622-to-mt7986.patch b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9994-ethernet-update-ppe-from-mt7622-to-mt7986.patch
index a349e14..1bfb09a 100755
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9994-ethernet-update-ppe-from-mt7622-to-mt7986.patch
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9994-ethernet-update-ppe-from-mt7622-to-mt7986.patch
@@ -306,12 +306,12 @@
if (mtk_flow_get_wdma_info(dev, dest_mac, &info) == 0) {
mtk_foe_entry_set_wdma(foe, info.wdma_idx, info.queue, info.bss,
info.wcid);
- pse_port = 3;
+ pse_port = PSE_PPE0_PORT;
+#if defined(CONFIG_MEDIATEK_NETSYS_V2)
+ if (info.wdma_idx == 0)
-+ pse_port = 8;
++ pse_port = PSE_WDMA0_PORT;
+ else if (info.wdma_idx == 1)
-+ pse_port = 9;
++ pse_port = PSE_WDMA1_PORT;
+ else
+ return -EOPNOTSUPP;
+#endif
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9999-add-wed-ser-support.patch b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9999-1-add-wed-ser-support.patch
similarity index 99%
rename from recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9999-add-wed-ser-support.patch
rename to recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9999-1-add-wed-ser-support.patch
index df34806..3e2b018 100755
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9999-add-wed-ser-support.patch
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9999-1-add-wed-ser-support.patch
@@ -16,7 +16,7 @@
index c582bb9..5259141 100644
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -3619,10 +3619,14 @@ static void mtk_pending_work(struct work_struct *work)
+@@ -3619,12 +3619,16 @@ static void mtk_pending_work(struct work_struct *work)
for (i = 0; i < MTK_MAC_COUNT; i++) {
if (!eth->netdev[i])
continue;
@@ -25,7 +25,9 @@
+#else
call_netdevice_notifiers(MTK_FE_START_RESET, eth->netdev[i]);
rtnl_unlock();
- wait_for_completion_timeout(&wait_ser_done, 5000);
+ if (!wait_for_completion_timeout(&wait_ser_done, 5000))
+ pr_warn("[%s] wait for MTK_FE_START_RESET failed\n",
+ __func__);
rtnl_lock();
+#endif
break;
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9999-flow-offload-add-mtkhnat-flow-accounting.patch b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9999-2-flow-offload-add-mtkhnat-flow-accounting.patch
similarity index 100%
rename from recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9999-flow-offload-add-mtkhnat-flow-accounting.patch
rename to recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9999-2-flow-offload-add-mtkhnat-flow-accounting.patch
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9999-flow-offload-add-mtkhnat-qdma-qos.patch b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9999-3-flow-offload-add-mtkhnat-qdma-qos.patch
similarity index 99%
rename from recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9999-flow-offload-add-mtkhnat-qdma-qos.patch
rename to recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9999-3-flow-offload-add-mtkhnat-qdma-qos.patch
index 66cb14e..e6d8691 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9999-flow-offload-add-mtkhnat-qdma-qos.patch
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9999-3-flow-offload-add-mtkhnat-qdma-qos.patch
@@ -242,7 +242,7 @@
+ mtk_foe_entry_set_qid(foe, dsa_port & MTK_QDMA_TX_MASK);
+
if (dev == eth->netdev[0])
- pse_port = 1;
+ pse_port = PSE_GDM1_PORT;
else if (dev == eth->netdev[1])
@@ -433,7 +443,7 @@ mtk_flow_offload_replace(struct mtk_eth *eth, struct flow_cls_offload *f)
if (data.pppoe.num == 1)
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9999-flow-offload-ovs-support.patch b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9999-4-flow-offload-ovs-support.patch
similarity index 100%
rename from recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9999-flow-offload-ovs-support.patch
rename to recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9999-4-flow-offload-ovs-support.patch
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9999-update-net-bridge-for-bridger.patch b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9999-5-update-net-bridge-for-bridger.patch
similarity index 100%
rename from recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9999-update-net-bridge-for-bridger.patch
rename to recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9999-5-update-net-bridge-for-bridger.patch
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9999-1-ethernet-update-ppe-from-mt7986-to-mt7988.patch b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9999-6-ethernet-update-ppe-from-mt7986-to-mt7988.patch
similarity index 82%
rename from recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9999-1-ethernet-update-ppe-from-mt7986-to-mt7988.patch
rename to recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9999-6-ethernet-update-ppe-from-mt7986-to-mt7988.patch
index 543fd1c..e590ce2 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9999-1-ethernet-update-ppe-from-mt7986-to-mt7988.patch
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9999-6-ethernet-update-ppe-from-mt7986-to-mt7988.patch
@@ -24,6 +24,16 @@
reason = FIELD_GET(MTK_RXD5_PPE_CPU_REASON_V2, trxd.rxd5);
if (reason == MTK_PPE_CPU_REASON_HIT_UNBIND_RATE_REACHED) {
for (i = 0; i < eth->ppe_num; i++) {
+@@ -4448,7 +4448,8 @@ static int mtk_probe(struct platform_device *pdev)
+
+ for (i = 0; i < eth->ppe_num; i++) {
+ eth->ppe[i] = mtk_ppe_init(eth,
+- eth->base + MTK_ETH_PPE_BASE + i * 0x400,
++ eth->base + MTK_ETH_PPE_BASE +
++ (i == 2 ? 0xC00 : i * 0x400),
+ 2, eth->soc->hash_way, i,
+ eth->soc->has_accounting);
+ if (!eth->ppe[i]) {
@@ -4626,11 +4626,15 @@ static const struct mtk_soc_data mt7988_data = {
.required_clks = MT7988_CLKS_BITMAP,
.required_pctl = false,
@@ -44,7 +54,7 @@
index 5b39d87..94bd423 100644
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
-@@ -118,7 +118,7 @@
+@@ -118,7 +118,8 @@
#define MTK_GDMA_UCS_EN BIT(20)
#define MTK_GDMA_STRP_CRC BIT(16)
#define MTK_GDMA_TO_PDMA 0x0
@@ -52,6 +62,7 @@
+#if defined(CONFIG_MEDIATEK_NETSYS_V2) || defined(CONFIG_MEDIATEK_NETSYS_V3)
#define MTK_GDMA_TO_PPE0 0x3333
#define MTK_GDMA_TO_PPE1 0x4444
++#define MTK_GMAC_TO_PPE2 0xcccc
#else
diff --git a/drivers/net/ethernet/mediatek/mtk_ppe.c b/drivers/net/ethernet/mediatek/mtk_ppe.c
index 98f61fe..bd504d4 100755
@@ -75,6 +86,23 @@
*ib2 |= FIELD_PREP(MTK_FOE_IB2_RX_IDX, txq);
l2->winfo = FIELD_PREP(MTK_FOE_WINFO_WCID, wcid) |
+@@ -422,11 +422,16 @@ int mtk_foe_entry_set_wdma(struct mtk_foe_entry *entry, int wdma_idx, int txq,
+
+ int mtk_foe_entry_set_qid(struct mtk_foe_entry *entry, int qid)
+ {
++ struct mtk_foe_mac_info *l2 = mtk_foe_entry_l2(entry);
+ u32 *ib2 = mtk_foe_entry_ib2(entry);
+
+ *ib2 &= ~MTK_FOE_IB2_QID;
+ *ib2 |= FIELD_PREP(MTK_FOE_IB2_QID, qid);
++#if defined(CONFIG_MEDIATEK_NETSYS_V3)
++ l2->tport_id = 1;
++#else
+ *ib2 |= MTK_FOE_IB2_PSE_QOS;
++#endif
+
+ return 0;
+ }
@@ -867,13 +867,16 @@ int mtk_ppe_start(struct mtk_ppe *ppe)
mtk_ppe_init_foe_table(ppe);
ppe_w32(ppe, MTK_PPE_TB_BASE, ppe->foe_phys);
@@ -107,12 +135,15 @@
index 703b2bd..03b4dfb 100644
--- a/drivers/net/ethernet/mediatek/mtk_ppe.h
+++ b/drivers/net/ethernet/mediatek/mtk_ppe.h
-@@ -8,7 +8,7 @@
+@@ -8,7 +8,10 @@
#include <linux/bitfield.h>
#include <linux/rhashtable.h>
-#if defined(CONFIG_MEDIATEK_NETSYS_V2)
-+#if defined(CONFIG_MEDIATEK_NETSYS_V2) || defined(CONFIG_MEDIATEK_NETSYS_V3)
++#if defined(CONFIG_MEDIATEK_NETSYS_V3)
++#define MTK_MAX_PPE_NUM 3
++#define MTK_ETH_PPE_BASE 0x2000
++#elif defined(CONFIG_MEDIATEK_NETSYS_V2)
#define MTK_MAX_PPE_NUM 2
#define MTK_ETH_PPE_BASE 0x2000
#else
@@ -154,7 +185,7 @@
#define MTK_FOE_WINFO_BSS GENMASK(5, 0)
#define MTK_FOE_WINFO_WCID GENMASK(15, 6)
#else
-@@ -128,7 +139,12 @@ struct mtk_foe_mac_info {
+@@ -128,7 +139,17 @@ struct mtk_foe_mac_info {
u16 pppoe_id;
u16 src_mac_lo;
@@ -164,6 +195,11 @@
+ u16 resv1;
+ u32 winfo;
+ u32 winfo_pao;
++ u16 cdrt_id:8;
++ u16 tops_entry:6;
++ u16 resv3:2;
++ u16 tport_id:4;
++ u16 resv4:12;
+#elif defined(CONFIG_MEDIATEK_NETSYS_V2)
u16 minfo;
u16 winfo;
@@ -186,12 +222,21 @@
@@ -195,7 +195,7 @@ mtk_flow_set_output_device(struct mtk_eth *eth, struct mtk_foe_entry *foe,
mtk_foe_entry_set_wdma(foe, info.wdma_idx, info.queue, info.bss,
info.wcid);
- pse_port = 3;
+ pse_port = PSE_PPE0_PORT;
-#if defined(CONFIG_MEDIATEK_NETSYS_V2)
+#if defined(CONFIG_MEDIATEK_NETSYS_V2) || defined(CONFIG_MEDIATEK_NETSYS_V3)
if (info.wdma_idx == 0)
- pse_port = 8;
+ pse_port = PSE_WDMA0_PORT;
else if (info.wdma_idx == 1)
+@@ -220,6 +220,8 @@ mtk_flow_set_output_device(struct mtk_eth *eth, struct mtk_foe_entry *foe,
+ pse_port = PSE_GDM1_PORT;
+ else if (dev == eth->netdev[1])
+ pse_port = PSE_GDM2_PORT;
++ else if (dev == eth->netdev[2])
++ pse_port = PSE_GDM3_PORT;
+ else
+ return -EOPNOTSUPP;
+
@@ -452,7 +452,7 @@ mtk_flow_offload_replace(struct mtk_eth *eth, struct flow_cls_offload *f)
return -ENOMEM;
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/patches-5.4/0495-mtd-spinand-winbond-Support-for-W25N01KV.patch b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/patches-5.4/0495-mtd-spinand-winbond-Support-for-W25N01KV.patch
new file mode 100644
index 0000000..f4eb1cd
--- /dev/null
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/patches-5.4/0495-mtd-spinand-winbond-Support-for-W25N01KV.patch
@@ -0,0 +1,76 @@
+--- a/drivers/mtd/nand/spi/Kconfig 2022-11-28 18:40:18.994239565 +0800
++++ b/drivers/mtd/nand/spi/Kconfig 2022-11-28 18:39:50.477971561 +0800
+@@ -7,11 +7,3 @@ menuconfig MTD_SPI_NAND
+ help
+ This is the framework for the SPI NAND device drivers.
+
+-config MTD_SPI_NAND_W25N01KV
+- tristate "Winbond W25N01KV Support"
+- select MTD_SPI_NAND
+- default n
+- help
+- Winbond W25N01KV share the same ID with W25N01GV. However, they have
+- different attributes.
+-
+diff -uprN a/drivers/mtd/nand/spi/winbond.c b/drivers/mtd/nand/spi/winbond.c
+--- a/drivers/mtd/nand/spi/winbond.c 2022-11-28 18:40:18.994239565 +0800
++++ b/drivers/mtd/nand/spi/winbond.c 2022-11-28 18:39:50.477971561 +0800
+@@ -26,13 +26,11 @@
+ #define W25N01_M02GV_STATUS_ECC_1_BITFLIPS (1 << 4)
+ #define W25N01_M02GV_STATUS_ECC_UNCOR_ERROR (2 << 4)
+
+-#if IS_ENABLED(CONFIG_MTD_SPI_NAND_W25N01KV)
+ #define W25N01KV_STATUS_ECC_MASK (3 << 4)
+ #define W25N01KV_STATUS_ECC_NO_BITFLIPS (0 << 4)
+ #define W25N01KV_STATUS_ECC_1_3_BITFLIPS (1 << 4)
+ #define W25N01KV_STATUS_ECC_4_BITFLIPS (3 << 4)
+ #define W25N01KV_STATUS_ECC_UNCOR_ERROR (2 << 4)
+-#endif
+
+ static SPINAND_OP_VARIANTS(read_cache_variants,
+ SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
+@@ -116,7 +114,6 @@ static int w25m02gv_select_target(struct
+ return spi_mem_exec_op(spinand->spimem, &op);
+ }
+
+-#if IS_ENABLED(CONFIG_MTD_SPI_NAND_W25N01KV)
+ static int w25n01kv_ecc_get_status(struct spinand_device *spinand,
+ u8 status)
+ {
+@@ -139,7 +136,6 @@ static int w25n01kv_ecc_get_status(struc
+
+ return -EINVAL;
+ }
+-#endif
+
+ static int w25n02kv_n04kv_ecc_get_status(struct spinand_device *spinand,
+ u8 status)
+@@ -181,10 +177,9 @@ static const struct spinand_info winbond
+ 0,
+ SPINAND_ECCINFO(&w25m02gv_ooblayout, NULL),
+ SPINAND_SELECT_TARGET(w25m02gv_select_target)),
+-#if IS_ENABLED(CONFIG_MTD_SPI_NAND_W25N01KV)
+ SPINAND_INFO("W25N01KV",
+- SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xaa, 0x21),
+- NAND_MEMORG(1, 2048, 96, 64, 1024, 20, 1, 1, 1),
++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xae, 0x21),
++ NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
+ NAND_ECCREQ(4, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+@@ -192,7 +187,6 @@ static const struct spinand_info winbond
+ 0,
+ SPINAND_ECCINFO(&w25n02kv_n04kv_ooblayout,
+ w25n01kv_ecc_get_status)),
+-#else
+ SPINAND_INFO("W25N01GV",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xaa, 0x21),
+ NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
+@@ -202,7 +196,6 @@ static const struct spinand_info winbond
+ &update_cache_variants),
+ 0,
+ SPINAND_ECCINFO(&w25m02gv_ooblayout, NULL)),
+-#endif
+ SPINAND_INFO("W25N02KV",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xaa, 0x22),
+ NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 2, 1, 1),
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/patches-5.4/492-mtd-tests-fix-pagetest-load.patch b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/patches-5.4/492-mtd-tests-fix-pagetest-load.patch
new file mode 100644
index 0000000..f10b5c5
--- /dev/null
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/patches-5.4/492-mtd-tests-fix-pagetest-load.patch
@@ -0,0 +1,42 @@
+--- a/drivers/mtd/tests/pagetest.c 2022-11-28 16:08:26.978090509 +0800
++++ b/drivers/mtd/tests/pagetest.c 2022-11-28 16:10:04.351026850 +0800
+@@ -25,6 +25,10 @@ static int dev = -EINVAL;
+ module_param(dev, int, S_IRUGO);
+ MODULE_PARM_DESC(dev, "MTD device number to use");
+
++static int count = 10000;
++module_param(count, int, 0444);
++MODULE_PARM_DESC(count, "Number of operations to do (default is 10000)");
++
+ static struct mtd_info *mtd;
+ static unsigned char *twopages;
+ static unsigned char *writebuf;
+@@ -331,7 +335,7 @@ static int __init mtd_pagetest_init(void
+ return -EINVAL;
+ }
+
+- pr_info("MTD device: %d\n", dev);
++ pr_info("MTD device: %d count:%d\n", dev, count);
+
+ mtd = get_mtd_device(NULL, dev);
+ if (IS_ERR(mtd)) {
+@@ -376,6 +380,7 @@ static int __init mtd_pagetest_init(void
+ if (err)
+ goto out;
+
++LOOP:
+ /* Erase all eraseblocks */
+ pr_info("erasing whole device\n");
+ err = mtdtest_erase_good_eraseblocks(mtd, bbt, 0, ebcnt);
+@@ -435,7 +440,10 @@ static int __init mtd_pagetest_init(void
+ if (err)
+ goto out;
+
+- pr_info("finished with %d errors\n", errcnt);
++ pr_info("finished with %d errors count:%d\n", errcnt, count);
++
++ if (count-- > 0)
++ goto LOOP;
+ out:
+
+ kfree(bbt);
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/patches-5.4/747-net-phy-aquantia-add-AQR113C.patch b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/patches-5.4/747-net-phy-aquantia-add-AQR113C.patch
index 4842524..8d01cab 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/patches-5.4/747-net-phy-aquantia-add-AQR113C.patch
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/patches-5.4/747-net-phy-aquantia-add-AQR113C.patch
@@ -10,6 +10,20 @@
#define MDIO_PHYXS_VEND_IF_STATUS 0xe812
#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_MASK GENMASK(7, 3)
+@@ -352,6 +352,13 @@ static int aqr107_read_status(struct phy_device *phydev)
+ break;
+ }
+
++ /* Handle the case when the link speed is unknown */
++ if (phydev->speed == SPEED_UNKNOWN) {
++ val = aqr107_read_rate(phydev);
++ if (val < 0)
++ return val;
++ }
++
+ val = aqr107_read_downshift_event(phydev);
+ if (val <= 0)
+ return val;
@@ -695,6 +696,24 @@ static struct phy_driver aqr_driver[] = {
.ack_interrupt = aqr_ack_interrupt,
.read_status = aqr_read_status,
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/patches-5.4/752-net-dsa-phy-coverity-scan.patch b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/patches-5.4/752-net-dsa-phy-coverity-scan.patch
new file mode 100644
index 0000000..17921e8
--- /dev/null
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/patches-5.4/752-net-dsa-phy-coverity-scan.patch
@@ -0,0 +1,175 @@
+diff -Naur a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c
+--- a/drivers/net/dsa/mt7530.c 2022-11-25 14:10:39.452491570 +0800
++++ b/drivers/net/dsa/mt7530.c 2022-11-28 09:47:11.157096408 +0800
+@@ -2476,7 +2476,7 @@
+ mt7531_cpu_port_config(struct dsa_switch *ds, int port)
+ {
+ struct mt7530_priv *priv = ds->priv;
+- phy_interface_t interface;
++ phy_interface_t interface = PHY_INTERFACE_MODE_NA;
+ int speed;
+
+ switch (port) {
+@@ -2496,6 +2496,8 @@
+ priv->p6_interface = interface;
+ break;
+ };
++ if (interface == PHY_INTERFACE_MODE_NA)
++ dev_err(priv->dev, "invalid interface\n");
+
+ if (interface == PHY_INTERFACE_MODE_2500BASEX)
+ speed = SPEED_2500;
+diff -Naur a/drivers/net/dsa/mt7531_phy.c b/drivers/net/dsa/mt7531_phy.c
+--- a/drivers/net/dsa/mt7531_phy.c 2022-11-25 14:10:47.032465430 +0800
++++ b/drivers/net/dsa/mt7531_phy.c 2022-11-29 09:56:05.024665073 +0800
+@@ -252,7 +252,7 @@
+ u16 dev1e_17a_tmp, dev1e_e0_tmp;
+
+ /* *** Iext/Rext Cal start ************ */
+- all_ana_cal_status = ANACAL_INIT;
++ //all_ana_cal_status = ANACAL_INIT;
+ /* analog calibration enable, Rext calibration enable */
+ /* 1e_db[12]:rg_cal_ckinv, [8]:rg_ana_calen, [4]:rg_rext_calen, [0]:rg_zcalen_a */
+ /* 1e_dc[0]:rg_txvos_calen */
+@@ -296,7 +296,7 @@
+ all_ana_cal_status = ANACAL_FINISH;
+ //printk(" GE Rext AnaCal Done! (%d)(0x%x) \r\n", cnt, rg_zcal_ctrl);
+ } else {
+- dev1e_17a_tmp = tc_phy_read_dev_reg(ds, PHY0, 0x1e, 0x017a);
++ //dev1e_17a_tmp = tc_phy_read_dev_reg(ds, PHY0, 0x1e, 0x017a);
+ dev1e_e0_tmp = tc_phy_read_dev_reg(ds, PHY0, 0x1e, 0xe0);
+ if ((rg_zcal_ctrl == 0x3F) || (rg_zcal_ctrl == 0x00)) {
+ all_ana_cal_status = ANACAL_SATURATION; /* need to FT(IC fail?) */
+@@ -718,32 +718,34 @@
+ } else if (phyaddr == 1) {
+ if (calibration_pair == ANACAL_PAIR_A)
+ tx_amp_temp = tx_amp_temp - 1;
+- else if(calibration_pair == ANACAL_PAIR_B)
+- tx_amp_temp = tx_amp_temp ;
++ //else if(calibration_pair == ANACAL_PAIR_B)
++ // tx_amp_temp = tx_amp_temp;
+ else if(calibration_pair == ANACAL_PAIR_C)
+ tx_amp_temp = tx_amp_temp - 1;
+ else if(calibration_pair == ANACAL_PAIR_D)
+ tx_amp_temp = tx_amp_temp - 1;
+ } else if (phyaddr == 2) {
+- if (calibration_pair == ANACAL_PAIR_A)
+- tx_amp_temp = tx_amp_temp;
+- else if(calibration_pair == ANACAL_PAIR_B)
++ //if (calibration_pair == ANACAL_PAIR_A)
++ // tx_amp_temp = tx_amp_temp;
++ //else if(calibration_pair == ANACAL_PAIR_B)
++ if(calibration_pair == ANACAL_PAIR_B)
+ tx_amp_temp = tx_amp_temp - 1;
+- else if(calibration_pair == ANACAL_PAIR_C)
+- tx_amp_temp = tx_amp_temp;
++ //else if(calibration_pair == ANACAL_PAIR_C)
++ // tx_amp_temp = tx_amp_temp;
+ else if(calibration_pair == ANACAL_PAIR_D)
+ tx_amp_temp = tx_amp_temp - 1;
+- } else if (phyaddr == 3) {
+- tx_amp_temp = tx_amp_temp;
++ //} else if (phyaddr == 3) {
++ // tx_amp_temp = tx_amp_temp;
+ } else if (phyaddr == 4) {
+- if (calibration_pair == ANACAL_PAIR_A)
+- tx_amp_temp = tx_amp_temp;
+- else if(calibration_pair == ANACAL_PAIR_B)
++ //if (calibration_pair == ANACAL_PAIR_A)
++ // tx_amp_temp = tx_amp_temp;
++ //else if(calibration_pair == ANACAL_PAIR_B)
++ if(calibration_pair == ANACAL_PAIR_B)
+ tx_amp_temp = tx_amp_temp - 1;
+- else if(calibration_pair == ANACAL_PAIR_C)
+- tx_amp_temp = tx_amp_temp;
+- else if(calibration_pair == ANACAL_PAIR_D)
+- tx_amp_temp = tx_amp_temp;
++ //else if(calibration_pair == ANACAL_PAIR_C)
++ // tx_amp_temp = tx_amp_temp;
++ //else if(calibration_pair == ANACAL_PAIR_D)
++ // tx_amp_temp = tx_amp_temp;
+ }
+ reg_temp = tc_phy_read_dev_reg(ds, phyaddr, 0x1e, tx_amp_reg)&(~0xff00);
+ tc_phy_write_dev_reg(ds, phyaddr, 0x1e, tx_amp_reg_100,(tx_amp_temp|((tx_amp_temp)<<tx_amp_reg_shift)));
+@@ -858,7 +860,7 @@
+ reg_backup = 0x0000;
+ reg_backup |= ((tx_amp_temp << 10) | (tx_amp_temp << 0));
+ tc_phy_write_dev_reg(ds, phyaddr, 0x1e, 0x12, reg_backup);
+- reg_backup = tc_phy_read_dev_reg(ds, phyaddr, 0x1e, 0x12);
++ //reg_backup = tc_phy_read_dev_reg(ds, phyaddr, 0x1e, 0x12);
+ //printk("PORT[%d] 1e.012 = %x (OFFSET_1000M_PAIR_A)\n", phyaddr, reg_backup);
+ reg_backup = tc_phy_read_dev_reg(ds, phyaddr, 0x1e, 0x16);
+ reg_tmp = ((reg_backup & 0x3f) >> 0);
+@@ -866,7 +868,7 @@
+ reg_backup = (reg_backup & (~0x3f));
+ reg_backup |= (tx_amp_temp << 0);
+ tc_phy_write_dev_reg(ds, phyaddr, 0x1e, 0x16, reg_backup);
+- reg_backup = tc_phy_read_dev_reg(ds, phyaddr, 0x1e, 0x16);
++ //reg_backup = tc_phy_read_dev_reg(ds, phyaddr, 0x1e, 0x16);
+ //printk("PORT[%d] 1e.016 = %x (OFFSET_TESTMODE_1000M_PAIR_A)\n", phyaddr, reg_backup);
+ }
+ else if(calibration_pair == ANACAL_PAIR_B){
+@@ -876,7 +878,7 @@
+ reg_backup = 0x0000;
+ reg_backup |= ((tx_amp_temp << 8) | (tx_amp_temp << 0));
+ tc_phy_write_dev_reg(ds, phyaddr, 0x1e, 0x17, reg_backup);
+- reg_backup = tc_phy_read_dev_reg(ds, phyaddr, 0x1e, 0x17);
++ //reg_backup = tc_phy_read_dev_reg(ds, phyaddr, 0x1e, 0x17);
+ //printk("PORT[%d] 1e.017 = %x (OFFSET_1000M_PAIR_B)\n", phyaddr, reg_backup);
+ reg_backup = tc_phy_read_dev_reg(ds, phyaddr, 0x1e, 0x18);
+ reg_tmp = ((reg_backup & 0x3f) >> 0);
+@@ -884,7 +886,7 @@
+ reg_backup = (reg_backup & (~0x3f));
+ reg_backup |= (tx_amp_temp << 0);
+ tc_phy_write_dev_reg(ds, phyaddr, 0x1e, 0x18, reg_backup);
+- reg_backup = tc_phy_read_dev_reg(ds, phyaddr, 0x1e, 0x18);
++ //reg_backup = tc_phy_read_dev_reg(ds, phyaddr, 0x1e, 0x18);
+ //printk("PORT[%d] 1e.018 = %x (OFFSET_TESTMODE_1000M_PAIR_B)\n", phyaddr, reg_backup);
+ }
+ else if(calibration_pair == ANACAL_PAIR_C){
+@@ -894,7 +896,7 @@
+ reg_backup = (reg_backup & (~0x3f00));
+ reg_backup |= (tx_amp_temp << 8);
+ tc_phy_write_dev_reg(ds, phyaddr, 0x1e, 0x19, reg_backup);
+- reg_backup = tc_phy_read_dev_reg(ds, phyaddr, 0x1e, 0x19);
++ //reg_backup = tc_phy_read_dev_reg(ds, phyaddr, 0x1e, 0x19);
+ //printk("PORT[%d] 1e.019 = %x (OFFSET_1000M_PAIR_C)\n", phyaddr, reg_backup);
+ reg_backup = tc_phy_read_dev_reg(ds, phyaddr, 0x1e, 0x20);
+ reg_tmp = ((reg_backup & 0x3f) >> 0);
+@@ -902,7 +904,7 @@
+ reg_backup = (reg_backup & (~0x3f));
+ reg_backup |= (tx_amp_temp << 0);
+ tc_phy_write_dev_reg(ds, phyaddr, 0x1e, 0x20, reg_backup);
+- reg_backup = tc_phy_read_dev_reg(ds, phyaddr, 0x1e, 0x20);
++ //reg_backup = tc_phy_read_dev_reg(ds, phyaddr, 0x1e, 0x20);
+ //printk("PORT[%d] 1e.020 = %x (OFFSET_TESTMODE_1000M_PAIR_C)\n", phyaddr, reg_backup);
+ }
+ else if(calibration_pair == ANACAL_PAIR_D){
+@@ -912,7 +914,7 @@
+ reg_backup = (reg_backup & (~0x3f00));
+ reg_backup |= (tx_amp_temp << 8);
+ tc_phy_write_dev_reg(ds, phyaddr, 0x1e, 0x21, reg_backup);
+- reg_backup = tc_phy_read_dev_reg(ds, phyaddr, 0x1e, 0x21);
++ //reg_backup = tc_phy_read_dev_reg(ds, phyaddr, 0x1e, 0x21);
+ //printk("PORT[%d] 1e.021 = %x (OFFSET_1000M_PAIR_D)\n", phyaddr, reg_backup);
+ reg_backup = tc_phy_read_dev_reg(ds, phyaddr, 0x1e, 0x22);
+ reg_tmp = ((reg_backup & 0x3f) >> 0);
+@@ -920,7 +922,7 @@
+ reg_backup = (reg_backup & (~0x3f));
+ reg_backup |= (tx_amp_temp << 0);
+ tc_phy_write_dev_reg(ds, phyaddr, 0x1e, 0x22, reg_backup);
+- reg_backup = tc_phy_read_dev_reg(ds, phyaddr, 0x1e, 0x22);
++ //reg_backup = tc_phy_read_dev_reg(ds, phyaddr, 0x1e, 0x22);
+ //printk("PORT[%d] 1e.022 = %x (OFFSET_TESTMODE_1000M_PAIR_D)\n", phyaddr, reg_backup);
+ }
+
+@@ -1352,7 +1354,7 @@
+
+ int mt7531_phy_setup(struct dsa_switch *ds)
+ {
+- int ret;
++ int ret = 0;
+ int i;
+
+ mt7531_phy_setting(ds);
+
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/patches-5.4/patches-5.4.inc b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/patches-5.4/patches-5.4.inc
index 183d182..1634496 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/patches-5.4/patches-5.4.inc
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/patches-5.4/patches-5.4.inc
@@ -36,6 +36,7 @@
file://0402-sound-add-mt7986-driver.patch \
file://0490-mtd-spinand-winbond-Support-for-W25MxxGV-W25NxxKV-series.patch \
file://0491-mtd-spinand-macronix-suppress-mx35lf1ge4ab-warning-log.patch \
+ file://0495-mtd-spinand-winbond-Support-for-W25N01KV.patch \
file://0500-v5.6-crypto-backport-inside-secure.patch \
file://0501-crypto-add-eip97-inside-secure-support.patch \
file://0502-dts-mt7623-eip97-inside-secure-support.patch \
@@ -90,6 +91,7 @@
file://413-mtd-spinand-gigadevice-Add-support-for-GD5FxGQxUExxG-GD5FxGQxUExxH-and-GD5FxGMxUExxG-series.patch \
file://414-mtd-spinand-fix-gigadevice-read-dummy.patch \
file://415-mtd-spinand-fix-F50L1G41LB-ecc-check.patch \
+ file://492-mtd-tests-fix-pagetest-load.patch \
file://500-auxadc-add-auxadc-32k-clk.patch \
file://6001-mtk-thermal-add-lvts-support.patch \
file://7000-fix-race-inside-napi-enable.patch \
@@ -112,6 +114,7 @@
file://749-net-dsa-support-mt7988.patch \
file://750-add-mdio-bus-for-gphy-calibration.patch \
file://751-net-phy-aquantia-add-firmware-download.patch \
+ file://752-net-dsa-phy-coverity-scan.patch \
file://8000-PATCH-1-4-tphy-support-type-switch-by-pericfg.patch \
file://8001-PATCH-2-4-dt-bindings-phy-Add-PHY_TYPE_DP-definition.patch \
file://8002-PATCH-3-4-dt-bindings-phy-Add-PHY_TYPE_XPCS-definition.patch \