[rdkb][common][bsp][Refactor and sync kernel from openwrt]
[Description]
6692806 [kernel][mt7981/mt7988][eth][phy: mediatek-ge: Fix Kconfig syntax error]
6912a9e [kernel][mt7988][eth][phy: mediatek-2p5ge: Change LED pinmux after setting correct polarity]
921d65f [kernel][mt7988][eth][phy: mediatek-ge: Change LED pinmux after setting correct polarity]
3e5de12 [kernel][mt7981/mt7988][eth][revert: phy: mediatek-ge: Fix TX-VCM calibration pre-setting]
6995ee6 [ADMA v1 RSS disable]
dde109a [kernel][mt7981/mt7988][eth][phy: mediatek-ge: Change default fine-tuning settings]
0f7c902 [mt7988][eth][arm64: dts: Add GbE & Internal 2.5GbE LED pinmux]
[Release-log]
Change-Id: I6e0f4fbd4c0f582253221dd65c51c58066b1b4eb
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-emmc.dts b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-emmc.dts
index e658fd3..bbfa4dc 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-emmc.dts
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-emmc.dts
@@ -106,6 +106,13 @@
};
};
+ gbe_led0_pins: gbe-pins {
+ mux {
+ function = "led";
+ groups = "gbe_led0";
+ };
+ };
+
pcie0_pins: pcie0-pins {
mux {
function = "pcie";
@@ -272,6 +279,8 @@
compatible = "mediatek,dsa-slave-mdio";
#address-cells = <1>;
#size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&gbe_led0_pins>;
sphy0: switch_phy0@0 {
compatible = "ethernet-phy-id03a2.9481";
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-sd.dts b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-sd.dts
index 546ac73..a8ce4f3 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-sd.dts
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-sd.dts
@@ -97,6 +97,13 @@
};
};
+ gbe_led0_pins: gbe-pins {
+ mux {
+ function = "led";
+ groups = "gbe_led0";
+ };
+ };
+
pcie0_pins: pcie0-pins {
mux {
function = "pcie";
@@ -263,6 +270,8 @@
compatible = "mediatek,dsa-slave-mdio";
#address-cells = <1>;
#size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&gbe_led0_pins>;
sphy0: switch_phy0@0 {
compatible = "ethernet-phy-id03a2.9481";
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-snfi-nand.dts b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-snfi-nand.dts
index 3a2bf1b..c4b2721 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-snfi-nand.dts
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-snfi-nand.dts
@@ -131,6 +131,13 @@
};
};
+ gbe_led0_pins: gbe-pins {
+ mux {
+ function = "led";
+ groups = "gbe_led0";
+ };
+ };
+
pcie0_pins: pcie0-pins {
mux {
function = "pcie";
@@ -298,6 +305,8 @@
compatible = "mediatek,dsa-slave-mdio";
#address-cells = <1>;
#size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&gbe_led0_pins>;
sphy0: switch_phy0@0 {
compatible = "ethernet-phy-id03a2.9481";
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nand.dts b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nand.dts
index 200d63d..e4630ae 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nand.dts
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nand.dts
@@ -256,6 +256,13 @@
};
};
+ gbe_led0_pins: gbe-pins {
+ mux {
+ function = "led";
+ groups = "gbe_led0";
+ };
+ };
+
i2c0_pins: i2c0-pins-g0 {
mux {
function = "i2c";
@@ -443,6 +450,8 @@
compatible = "mediatek,dsa-slave-mdio";
#address-cells = <1>;
#size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&gbe_led0_pins>;
sphy0: switch_phy0@0 {
compatible = "ethernet-phy-id03a2.9481";
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nor.dts b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nor.dts
index cdc7c90..f4953b3 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nor.dts
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nor.dts
@@ -131,6 +131,13 @@
};
};
+ gbe_led0_pins: gbe-pins {
+ mux {
+ function = "led";
+ groups = "gbe_led0";
+ };
+ };
+
pcie0_pins: pcie0-pins {
mux {
function = "pcie";
@@ -290,6 +297,8 @@
compatible = "mediatek,dsa-slave-mdio";
#address-cells = <1>;
#size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&gbe_led0_pins>;
sphy0: switch_phy0@0 {
compatible = "ethernet-phy-id03a2.9481";
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-e2p5g-spim-nand.dts b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-e2p5g-spim-nand.dts
index 15a77c5..1fd6282 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-e2p5g-spim-nand.dts
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-e2p5g-spim-nand.dts
@@ -203,6 +203,13 @@
};
&pio {
+ gbe_led0_pins: gbe-pins {
+ mux {
+ function = "led";
+ groups = "gbe_led0";
+ };
+ };
+
i2c0_pins: i2c0-pins-g0 {
mux {
function = "i2c";
@@ -373,6 +380,8 @@
compatible = "mediatek,dsa-slave-mdio";
#address-cells = <1>;
#size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&gbe_led0_pins>;
sphy0: switch_phy0@0 {
compatible = "ethernet-phy-id03a2.9481";
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-i2p5g-spim-nand.dts b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-i2p5g-spim-nand.dts
index c589a4b..7cd5748 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-i2p5g-spim-nand.dts
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-i2p5g-spim-nand.dts
@@ -131,6 +131,20 @@
};
&pio {
+ gbe_led0_pins: gbe-pins {
+ mux {
+ function = "led";
+ groups = "gbe_led0";
+ };
+ };
+
+ i2p5gbe_led0_pins: 2p5gbe-pins {
+ mux {
+ function = "led";
+ groups = "2p5gbe_led0";
+ };
+ };
+
pcie0_pins: pcie0-pins {
mux {
function = "pcie";
@@ -218,6 +232,8 @@
#address-cells = <1>;
#size-cells = <0>;
phy0: ethernet-phy@0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2p5gbe_led0_pins>;
reg = <15>;
compatible = "ethernet-phy-ieee802.3-c45";
phy-mode = "xgmii";
@@ -281,6 +297,8 @@
compatible = "mediatek,dsa-slave-mdio";
#address-cells = <1>;
#size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&gbe_led0_pins>;
sphy0: switch_phy0@0 {
compatible = "ethernet-phy-id03a2.9481";
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-sfp-spim-nand.dts b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-sfp-spim-nand.dts
index 43332d4..22048ac 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-sfp-spim-nand.dts
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-sfp-spim-nand.dts
@@ -228,6 +228,13 @@
};
&pio {
+ gbe_led0_pins: gbe-pins {
+ mux {
+ function = "led";
+ groups = "gbe_led0";
+ };
+ };
+
i2c0_pins: i2c0-pins-g0 {
mux {
function = "i2c";
@@ -370,6 +377,8 @@
mdio1: mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&gbe_led0_pins>;
gsw_phy0: ethernet-phy@0 {
compatible = "ethernet-phy-id03a2.9481";
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-spim-nand-4pcie.dts b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-spim-nand-4pcie.dts
index 67852a1..f970199 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-spim-nand-4pcie.dts
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-spim-nand-4pcie.dts
@@ -217,6 +217,13 @@
};
};
+ gbe_led0_pins: gbe-pins {
+ mux {
+ function = "led";
+ groups = "gbe_led0";
+ };
+ };
+
i2c0_pins: i2c0-pins-g0 {
mux {
function = "i2c";
@@ -373,6 +380,8 @@
mdio1: mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&gbe_led0_pins>;
gsw_phy0: ethernet-phy@0 {
compatible = "ethernet-phy-id03a2.9481";
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-spim-nand.dts b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-spim-nand.dts
index 0d9b049..407b8ed 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-spim-nand.dts
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-spim-nand.dts
@@ -227,6 +227,13 @@
};
};
+ gbe_led0_pins: gbe-pins {
+ mux {
+ function = "led";
+ groups = "gbe_led0";
+ };
+ };
+
i2c0_pins: i2c0-pins-g0 {
mux {
function = "i2c";
@@ -393,6 +400,8 @@
mdio1: mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&gbe_led0_pins>;
gsw_phy0: ethernet-phy@0 {
compatible = "ethernet-phy-id03a2.9481";
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-10g-emmc.dts b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-10g-emmc.dts
index 396f15e..bbfd3c6 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-10g-emmc.dts
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-10g-emmc.dts
@@ -106,6 +106,13 @@
};
};
+ gbe_led0_pins: gbe-pins {
+ mux {
+ function = "led";
+ groups = "gbe_led0";
+ };
+ };
+
pcie0_pins: pcie0-pins {
mux {
function = "pcie";
@@ -256,6 +263,8 @@
compatible = "mediatek,dsa-slave-mdio";
#address-cells = <1>;
#size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&gbe_led0_pins>;
sphy0: switch_phy0@0 {
compatible = "ethernet-phy-id03a2.9481";
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-10g-sd.dts b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-10g-sd.dts
index 43e20eb..750d9f1 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-10g-sd.dts
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-10g-sd.dts
@@ -97,6 +97,13 @@
};
};
+ gbe_led0_pins: gbe-pins {
+ mux {
+ function = "led";
+ groups = "gbe_led0";
+ };
+ };
+
pcie0_pins: pcie0-pins {
mux {
function = "pcie";
@@ -247,6 +254,8 @@
compatible = "mediatek,dsa-slave-mdio";
#address-cells = <1>;
#size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&gbe_led0_pins>;
sphy0: switch_phy0@0 {
compatible = "ethernet-phy-id03a2.9481";
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-10g-snfi-nand.dts b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-10g-snfi-nand.dts
index cfec58a..bdc5d9e 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-10g-snfi-nand.dts
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-10g-snfi-nand.dts
@@ -131,6 +131,13 @@
};
};
+ gbe_led0_pins: gbe-pins {
+ mux {
+ function = "led";
+ groups = "gbe_led0";
+ };
+ };
+
pcie0_pins: pcie0-pins {
mux {
function = "pcie";
@@ -282,6 +289,8 @@
compatible = "mediatek,dsa-slave-mdio";
#address-cells = <1>;
#size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&gbe_led0_pins>;
sphy0: switch_phy0@0 {
compatible = "ethernet-phy-id03a2.9481";
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-10g-spim-nand.dts b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-10g-spim-nand.dts
index 82e0d11..ba261f6 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-10g-spim-nand.dts
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-10g-spim-nand.dts
@@ -251,6 +251,13 @@
};
};
+ gbe_led0_pins: gbe-pins {
+ mux {
+ function = "led";
+ groups = "gbe_led0";
+ };
+ };
+
i2c0_pins: i2c0-pins-g0 {
mux {
function = "i2c";
@@ -422,6 +429,8 @@
compatible = "mediatek,dsa-slave-mdio";
#address-cells = <1>;
#size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&gbe_led0_pins>;
sphy0: switch_phy0@0 {
compatible = "ethernet-phy-id03a2.9481";
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-10g-spim-nor.dts b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-10g-spim-nor.dts
index 7878c52..28c1f7e 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-10g-spim-nor.dts
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-10g-spim-nor.dts
@@ -131,6 +131,13 @@
};
};
+ gbe_led0_pins: gbe-pins {
+ mux {
+ function = "led";
+ groups = "gbe_led0";
+ };
+ };
+
pcie0_pins: pcie0-pins {
mux {
function = "pcie";
@@ -274,6 +281,8 @@
compatible = "mediatek,dsa-slave-mdio";
#address-cells = <1>;
#size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&gbe_led0_pins>;
sphy0: switch_phy0@0 {
compatible = "ethernet-phy-id03a2.9481";
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-e2p5g-spim-nand.dts b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-e2p5g-spim-nand.dts
index da6f941..830b223 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-e2p5g-spim-nand.dts
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-e2p5g-spim-nand.dts
@@ -198,6 +198,13 @@
};
&pio {
+ gbe_led0_pins: gbe-pins {
+ mux {
+ function = "led";
+ groups = "gbe_led0";
+ };
+ };
+
i2c0_pins: i2c0-pins-g0 {
mux {
function = "i2c";
@@ -352,6 +359,8 @@
compatible = "mediatek,dsa-slave-mdio";
#address-cells = <1>;
#size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&gbe_led0_pins>;
sphy0: switch_phy0@0 {
compatible = "ethernet-phy-id03a2.9481";
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-i2p5g-spim-nand.dts b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-i2p5g-spim-nand.dts
index 8d18686..e8b6f14 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-i2p5g-spim-nand.dts
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-i2p5g-spim-nand.dts
@@ -131,6 +131,20 @@
};
&pio {
+ gbe_led0_pins: gbe-pins {
+ mux {
+ function = "led";
+ groups = "gbe_led0";
+ };
+ };
+
+ i2p5gbe_led0_pins: 2p5gbe-pins {
+ mux {
+ function = "led";
+ groups = "2p5gbe_led0";
+ };
+ };
+
pcie0_pins: pcie0-pins {
mux {
function = "pcie";
@@ -210,6 +224,8 @@
#address-cells = <1>;
#size-cells = <0>;
phy0: ethernet-phy@0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2p5gbe_led0_pins>;
reg = <15>;
compatible = "ethernet-phy-ieee802.3-c45";
phy-mode = "xgmii";
@@ -268,6 +284,8 @@
compatible = "mediatek,dsa-slave-mdio";
#address-cells = <1>;
#size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&gbe_led0_pins>;
sphy0: switch_phy0@0 {
compatible = "ethernet-phy-id03a2.9481";
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-gsw-10g-sfp-spim-nand.dts b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-gsw-10g-sfp-spim-nand.dts
index c2ff33d..8c0436c 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-gsw-10g-sfp-spim-nand.dts
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-gsw-10g-sfp-spim-nand.dts
@@ -212,6 +212,13 @@
};
&pio {
+ gbe_led0_pins: gbe-pins {
+ mux {
+ function = "led";
+ groups = "gbe_led0";
+ };
+ };
+
i2c0_pins: i2c0-pins-g0 {
mux {
function = "i2c";
@@ -338,6 +345,8 @@
mdio1: mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&gbe_led0_pins>;
gsw_phy0: ethernet-phy@0 {
compatible = "ethernet-phy-id03a2.9481";
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-gsw-10g-spim-nand.dts b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-gsw-10g-spim-nand.dts
index 0adbca3..af63d6c 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-gsw-10g-spim-nand.dts
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-gsw-10g-spim-nand.dts
@@ -227,6 +227,13 @@
};
};
+ gbe_led0_pins: gbe-pins {
+ mux {
+ function = "led";
+ groups = "gbe_led0";
+ };
+ };
+
i2c0_pins: i2c0-pins-g0 {
mux {
function = "i2c";
@@ -377,6 +384,8 @@
mdio1: mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&gbe_led0_pins>;
gsw_phy0: ethernet-phy@0 {
compatible = "ethernet-phy-id03a2.9481";
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h
index 32b7f6b..6035f46 100755
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h
@@ -258,8 +258,8 @@
#define MTK_MAX_IRQ_NUM (4)
#else
#define MTK_PDMA_RSS_GLO_CFG 0x2800
-#define MTK_RX_NAPI_NUM (2)
-#define MTK_MAX_IRQ_NUM (4)
+#define MTK_RX_NAPI_NUM (1)
+#define MTK_MAX_IRQ_NUM (3)
#endif
#define MTK_RSS_RING1 (1)
#define MTK_RSS_EN BIT(0)
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/phy/mediatek-2p5ge.c b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/phy/mediatek-2p5ge.c
index 30f53fc..f5964c3 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/phy/mediatek-2p5ge.c
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/phy/mediatek-2p5ge.c
@@ -5,6 +5,7 @@
#include <linux/nvmem-consumer.h>
#include <linux/of_address.h>
#include <linux/of_platform.h>
+#include <linux/pinctrl/consumer.h>
#include <linux/phy.h>
#define MEDAITEK_2P5GE_PHY_DMB_FW "mediatek-2p5ge-phy-dmb.bin"
@@ -21,6 +22,10 @@
#define PHY_AUX_DPX_MASK GENMASK(5, 5)
#define PHY_AUX_SPEED_MASK GENMASK(4, 2)
+/* Registers on MDIO_MMD_VEND2 */
+#define MTK_PHY_LED0_ON_CTRL (0x24)
+#define MTK_PHY_LED0_POLARITY BIT(14)
+
enum {
PHY_AUX_SPD_10 = 0,
PHY_AUX_SPD_100,
@@ -28,6 +33,22 @@
PHY_AUX_SPD_2500,
};
+static int mt798x_2p5ge_phy_probe(struct phy_device *phydev)
+{
+ struct pinctrl *pinctrl;
+
+ phy_set_bits_mmd(phydev, MDIO_MMD_VEND2, MTK_PHY_LED0_ON_CTRL,
+ MTK_PHY_LED0_POLARITY);
+
+ pinctrl = devm_pinctrl_get_select_default(&phydev->mdio.dev);
+ if (IS_ERR(pinctrl)) {
+ dev_err(&phydev->mdio.dev, "Fail to set LED pins!\n");
+ return PTR_ERR(pinctrl);
+ }
+
+ return 0;
+}
+
static int mt798x_2p5ge_phy_config_init(struct phy_device *phydev)
{
int ret;
@@ -194,6 +215,7 @@
{
PHY_ID_MATCH_EXACT(0x00339c11),
.name = "MediaTek MT798x 2.5GbE PHY",
+ .probe = mt798x_2p5ge_phy_probe,
.config_init = mt798x_2p5ge_phy_config_init,
.config_aneg = mt798x_2p5ge_phy_config_aneg,
.get_features = mt798x_2p5ge_phy_get_features,
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/phy/mediatek-ge.c b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/phy/mediatek-ge.c
index 2140945..b99ee0b 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/phy/mediatek-ge.c
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/phy/mediatek-ge.c
@@ -4,6 +4,7 @@
#include <linux/nvmem-consumer.h>
#include <linux/of_address.h>
#include <linux/of_platform.h>
+#include <linux/pinctrl/consumer.h>
#include <linux/phy.h>
#define MTK_GPHY_ID_MT7530 0x03a29412
@@ -153,28 +154,28 @@
#define MTK_PHY_DA_CALIN_FLAG BIT(0)
#define MTK_PHY_RG_DASN_DAC_IN0_A (0x17d)
-#define MTK_PHY_FORCE_DASN_DAC_IN0_A BIT(15)
+#define MTK_PHY_DASN_DAC_IN0_A_MASK GENMASK(9, 0)
#define MTK_PHY_RG_DASN_DAC_IN0_B (0x17e)
-#define MTK_PHY_FORCE_DASN_DAC_IN0_B BIT(15)
+#define MTK_PHY_DASN_DAC_IN0_B_MASK GENMASK(9, 0)
#define MTK_PHY_RG_DASN_DAC_IN0_C (0x17f)
-#define MTK_PHY_FORCE_DASN_DAC_IN0_C BIT(15)
+#define MTK_PHY_DASN_DAC_IN0_C_MASK GENMASK(9, 0)
#define MTK_PHY_RG_DASN_DAC_IN0_D (0x180)
-#define MTK_PHY_FORCE_DASN_DAC_IN0_D BIT(15)
+#define MTK_PHY_DASN_DAC_IN0_D_MASK GENMASK(9, 0)
#define MTK_PHY_RG_DASN_DAC_IN1_A (0x181)
-#define MTK_PHY_FORCE_DASN_DAC_IN1_A BIT(15)
+#define MTK_PHY_DASN_DAC_IN1_A_MASK GENMASK(9, 0)
#define MTK_PHY_RG_DASN_DAC_IN1_B (0x182)
-#define MTK_PHY_FORCE_DASN_DAC_IN1_B BIT(15)
+#define MTK_PHY_DASN_DAC_IN1_B_MASK GENMASK(9, 0)
#define MTK_PHY_RG_DASN_DAC_IN1_C (0x183)
-#define MTK_PHY_FORCE_DASN_DAC_IN1_C BIT(15)
+#define MTK_PHY_DASN_DAC_IN1_C_MASK GENMASK(9, 0)
#define MTK_PHY_RG_DASN_DAC_IN1_D (0x184)
-#define MTK_PHY_FORCE_DASN_DAC_IN1_D BIT(15)
+#define MTK_PHY_DASN_DAC_IN1_D_MASK GENMASK(9, 0)
#define MTK_PHY_RG_DEV1E_REG19b (0x19b)
#define MTK_PHY_BYPASS_DSP_LPI_READY BIT(8)
@@ -670,48 +671,47 @@
phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_ANA_CAL_RG1,
MTK_PHY_RG_TXVOS_CALEN);
- /* Also clear bit[9:0] for MTK_PHY_RG_DASN_DAC_IN0/1_A/B/C/D */
switch (rg_txreserve_x) {
case PAIR_A:
- phy_write_mmd(phydev, MDIO_MMD_VEND1,
- MTK_PHY_RG_DASN_DAC_IN0_A,
- MTK_PHY_FORCE_DASN_DAC_IN0_A);
- phy_write_mmd(phydev, MDIO_MMD_VEND1,
- MTK_PHY_RG_DASN_DAC_IN1_A,
- MTK_PHY_FORCE_DASN_DAC_IN1_A);
+ phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1,
+ MTK_PHY_RG_DASN_DAC_IN0_A,
+ MTK_PHY_DASN_DAC_IN0_A_MASK);
+ phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1,
+ MTK_PHY_RG_DASN_DAC_IN1_A,
+ MTK_PHY_DASN_DAC_IN1_A_MASK);
phy_set_bits_mmd(phydev, MDIO_MMD_VEND1,
MTK_PHY_RG_ANA_CAL_RG0,
MTK_PHY_RG_ZCALEN_A);
break;
case PAIR_B:
- phy_write_mmd(phydev, MDIO_MMD_VEND1,
- MTK_PHY_RG_DASN_DAC_IN0_B,
- MTK_PHY_FORCE_DASN_DAC_IN0_B);
- phy_write_mmd(phydev, MDIO_MMD_VEND1,
- MTK_PHY_RG_DASN_DAC_IN1_B,
- MTK_PHY_FORCE_DASN_DAC_IN1_B);
+ phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1,
+ MTK_PHY_RG_DASN_DAC_IN0_B,
+ MTK_PHY_DASN_DAC_IN0_B_MASK);
+ phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1,
+ MTK_PHY_RG_DASN_DAC_IN1_B,
+ MTK_PHY_DASN_DAC_IN1_B_MASK);
phy_set_bits_mmd(phydev, MDIO_MMD_VEND1,
MTK_PHY_RG_ANA_CAL_RG1,
MTK_PHY_RG_ZCALEN_B);
break;
case PAIR_C:
- phy_write_mmd(phydev, MDIO_MMD_VEND1,
- MTK_PHY_RG_DASN_DAC_IN0_C,
- MTK_PHY_FORCE_DASN_DAC_IN0_C);
- phy_write_mmd(phydev, MDIO_MMD_VEND1,
- MTK_PHY_RG_DASN_DAC_IN1_C,
- MTK_PHY_FORCE_DASN_DAC_IN1_C);
+ phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1,
+ MTK_PHY_RG_DASN_DAC_IN0_C,
+ MTK_PHY_DASN_DAC_IN0_C_MASK);
+ phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1,
+ MTK_PHY_RG_DASN_DAC_IN1_C,
+ MTK_PHY_DASN_DAC_IN1_C_MASK);
phy_set_bits_mmd(phydev, MDIO_MMD_VEND1,
MTK_PHY_RG_ANA_CAL_RG1,
MTK_PHY_RG_ZCALEN_C);
break;
case PAIR_D:
- phy_write_mmd(phydev, MDIO_MMD_VEND1,
- MTK_PHY_RG_DASN_DAC_IN0_D,
- MTK_PHY_FORCE_DASN_DAC_IN0_D);
- phy_write_mmd(phydev, MDIO_MMD_VEND1,
- MTK_PHY_RG_DASN_DAC_IN1_D,
- MTK_PHY_FORCE_DASN_DAC_IN1_D);
+ phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1,
+ MTK_PHY_RG_DASN_DAC_IN0_D,
+ MTK_PHY_DASN_DAC_IN0_D_MASK);
+ phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1,
+ MTK_PHY_RG_DASN_DAC_IN1_D,
+ MTK_PHY_DASN_DAC_IN1_D_MASK);
phy_set_bits_mmd(phydev, MDIO_MMD_VEND1,
MTK_PHY_RG_ANA_CAL_RG1,
MTK_PHY_RG_ZCALEN_D);
@@ -837,6 +837,11 @@
__phy_write(phydev, 0x12, 0x0);
__phy_write(phydev, 0x10, 0x83aa);
+ /* TrFreeze = 0 */
+ __phy_write(phydev, 0x11, 0x0);
+ __phy_write(phydev, 0x12, 0x0);
+ __phy_write(phydev, 0x10, 0x9686);
+
/* SSTrKp1000Slv = 5 */
__phy_write(phydev, 0x11, 0xbaef);
__phy_write(phydev, 0x12, 0x2e);
@@ -881,15 +886,6 @@
phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_DEV1E_REG27D,
MTK_PHY_VGASTATE_FFE_THR_ST2_MASK, 0x1e);
- /* TX shape */
- /* 10/100/1000 TX shaper is enabled by default */
- for (i = 0x202; i < 0x230; i += 2) {
- if (i == 0x20c || i == 0x218 || i == 0x224)
- continue;
- phy_write_mmd(phydev, MDIO_MMD_VEND2, i, 0x2219);
- phy_write_mmd(phydev, MDIO_MMD_VEND2, i + 1, 0x23);
- }
-
/* Disable LDO pump */
phy_write_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_LDO_PUMP_EN_PAIRAB, 0x0);
phy_write_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_LDO_PUMP_EN_PAIRCD, 0x0);
@@ -926,11 +922,6 @@
__phy_write(phydev, 0x12, 0xc);
__phy_write(phydev, 0x10, 0x8fae);
- /* TrFreeze = 0 */
- __phy_write(phydev, 0x11, 0x0);
- __phy_write(phydev, 0x12, 0x0);
- __phy_write(phydev, 0x10, 0x9686);
-
/* ResetSyncOffset = 6 */
__phy_write(phydev, 0x11, 0x600);
__phy_write(phydev, 0x12, 0x0);
@@ -1088,8 +1079,7 @@
__phy_write(phydev, 0x10, 0x96ca);
/* DfeTailEnableVgaThresh1000 = 27 */
- /* InhibitDisableDfeTail1000 = 1 */
- __phy_write(phydev, 0x11, 0x37);
+ __phy_write(phydev, 0x11, 0x36);
__phy_write(phydev, 0x12, 0x0);
__phy_write(phydev, 0x10, 0x8f80);
phy_restore_page(phydev, MTK_PHY_PAGE_STANDARD, 0);
@@ -1249,6 +1239,51 @@
static int mt7988_phy_probe(struct phy_device *phydev)
{
+ struct device_node *np;
+ void __iomem *boottrap;
+ u32 reg;
+ int port;
+ int ret;
+ struct pinctrl *pinctrl;
+
+ /* Setup LED polarity according to boottrap's polarity */
+ np = of_find_compatible_node(NULL, NULL, "mediatek,boottrap");
+ if (!np)
+ return -ENOENT;
+ boottrap = of_iomap(np, 0);
+ if (!boottrap)
+ return -ENOMEM;
+ reg = readl(boottrap);
+ port = phydev->mdio.addr;
+ if ((port == GPHY_PORT0 && reg & BIT(8)) ||
+ (port == GPHY_PORT1 && reg & BIT(9)) ||
+ (port == GPHY_PORT2 && reg & BIT(10)) ||
+ (port == GPHY_PORT3 && reg & BIT(11))) {
+ phy_write_mmd(phydev, MDIO_MMD_VEND2, MTK_PHY_LED0_ON_CTRL,
+ MTK_PHY_LED0_ENABLE | MTK_PHY_LED0_ON_LINK10 |
+ MTK_PHY_LED0_ON_LINK100 |
+ MTK_PHY_LED0_ON_LINK1000);
+ } else {
+ phy_write_mmd(phydev, MDIO_MMD_VEND2, MTK_PHY_LED0_ON_CTRL,
+ MTK_PHY_LED0_ENABLE | MTK_PHY_LED0_POLARITY |
+ MTK_PHY_LED0_ON_LINK10 |
+ MTK_PHY_LED0_ON_LINK100 |
+ MTK_PHY_LED0_ON_LINK1000);
+ }
+ phy_write_mmd(phydev, MDIO_MMD_VEND2, MTK_PHY_LED0_BLINK_CTRL,
+ MTK_PHY_LED0_1000TX | MTK_PHY_LED0_1000RX |
+ MTK_PHY_LED0_100TX | MTK_PHY_LED0_100RX |
+ MTK_PHY_LED0_10TX | MTK_PHY_LED0_10RX);
+
+ if (port == GPHY_PORT3) {
+ pinctrl = devm_pinctrl_get_select_default(&phydev->mdio.bus->dev);
+ if (IS_ERR(pinctrl)) {
+ ret = PTR_ERR(pinctrl);
+ dev_err(&phydev->mdio.dev, "Fail to set LED pins!\n");
+ return -EINVAL;
+ }
+ }
+
mt798x_phy_common_finetune(phydev);
mt7988_phy_finetune(phydev);
mt798x_phy_eee(phydev);
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/patches-5.4/756-net-phy-mediatek-ge-add-mt798x-support.patch b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/patches-5.4/756-net-phy-mediatek-ge-add-mt798x-support.patch
index aee8abf..b1734f8 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/patches-5.4/756-net-phy-mediatek-ge-add-mt798x-support.patch
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/patches-5.4/756-net-phy-mediatek-ge-add-mt798x-support.patch
@@ -9,7 +9,7 @@
+ help
+ Supports the MediaTek Gigabit Ethernet PHYs.
+
-++config MEDIATEK_GE_PHY_SOC
++config MEDIATEK_GE_PHY_SOC
+ bool "MediaTek SoC Ethernet PHYs"
+ depends on (ARM64 && ARCH_MEDIATEK && MEDIATEK_GE_PHY) || COMPILE_TEST
+ select NVMEM_MTK_EFUSE