commit 6392c3438a50c80afcd1a61fd9c5241b8cffa2ea
author developer <developer@mediatek.com> Mon Mar 27 09:46:48 2023 +0800
committer developer <developer@mediatek.com> Mon Mar 27 09:46:48 2023 +0800
tree 0027f2d018b1b09bc6be83bbba97f8eb45708917
parent 16d5ca06c8dea9a26608931c3721e32b86366bf5

[rdkb][common][bsp][Refactor and sync kernel from openwrt]

[Description]
0ecd22e [MAC80211][hnat][Update conntrack of per flow accounting data lost issue]
4f4c741 [kernel][common][eth][Change heartbeat check cycle for Aquantia firwmare download]
ca26ee5 [Change spi driver]
8c2d0df [kernel][common][eth][Refactor heartbeat check for Aquantia firwmare download]
cce7a6e [kernel][mt7988][eth][Refactor USXGMII reset sequence]
1991df1 [SBC][MT7988][Add reserved memory for BL32]

[Release-log]

Change-Id: I245a0cba885b3735ed4d9e46a500c30e56bc07f6