[rdk-b][common][bsp][Refactor and sync kernel/wifi from Openwrt]
[Description]
Refactor and sync kernel/wifi from Openwrt
[Release-log]
N/A
diff --git a/recipes-kernel/linux-mt76/files/patches/1123-mt76-add-ibf-control-vendor-cmd.patch b/recipes-kernel/linux-mt76/files/patches/1123-mt76-add-ibf-control-vendor-cmd.patch
new file mode 100755
index 0000000..6473cb6
--- /dev/null
+++ b/recipes-kernel/linux-mt76/files/patches/1123-mt76-add-ibf-control-vendor-cmd.patch
@@ -0,0 +1,150 @@
+From bb8f76430a25f016c63a62f8b1ae5995398911ef Mon Sep 17 00:00:00 2001
+From: mtk27835 <shurong.wen@mediatek.com>
+Date: Wed, 7 Sep 2022 14:01:29 -0700
+Subject: [PATCH] [PATCH 1123] mt76: add ibf control vendor cmd
+
+Signed-off-by: mtk27835 <shurong.wen@mediatek.com>
+---
+ mt7915/vendor.c | 70 +++++++++++++++++++++++++++++++++++++++++++++++++
+ mt7915/vendor.h | 25 +++++++++++++++++-
+ 2 files changed, 94 insertions(+), 1 deletion(-)
+
+diff --git a/mt7915/vendor.c b/mt7915/vendor.c
+index 7f67c0d..cbbb084 100644
+--- a/mt7915/vendor.c
++++ b/mt7915/vendor.c
+@@ -78,6 +78,16 @@ edcca_ctrl_policy[NUM_MTK_VENDOR_ATTRS_EDCCA_CTRL] = {
+ [MTK_VENDOR_ATTR_EDCCA_CTRL_COMPENSATE] = { .type = NLA_S8 },
+ };
+
++static const struct nla_policy
++ibf_ctrl_policy[NUM_MTK_VENDOR_ATTRS_IBF_CTRL] = {
++ [MTK_VENDOR_ATTR_IBF_CTRL_ENABLE] = { .type = NLA_U8 },
++};
++
++static struct nla_policy
++ibf_dump_policy[NUM_MTK_VENDOR_ATTRS_IBF_DUMP] = {
++ [MTK_VENDOR_ATTR_IBF_DUMP_ENABLE] = { .type = NLA_U8 },
++};
++
+
+ struct csi_null_tone {
+ u8 start;
+@@ -1120,6 +1130,54 @@ static int mt7915_vendor_3wire_ctrl(struct wiphy *wiphy,
+ return mt7915_mcu_set_cfg(phy, CFGINFO_3WIRE_EN_CFG, three_wire_mode);
+ }
+
++static int mt7915_vendor_ibf_ctrl(struct wiphy *wiphy,
++ struct wireless_dev *wdev,
++ const void *data,
++ int data_len)
++{
++ struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
++ struct mt7915_phy *phy = mt7915_hw_phy(hw);
++ struct mt7915_dev *dev = phy->dev;
++ struct nlattr *tb[NUM_MTK_VENDOR_ATTRS_IBF_CTRL];
++ int err;
++ u8 val;
++
++ err = nla_parse(tb, MTK_VENDOR_ATTR_IBF_CTRL_MAX, data, data_len,
++ ibf_ctrl_policy, NULL);
++ if (err)
++ return err;
++
++ if (tb[MTK_VENDOR_ATTR_IBF_CTRL_ENABLE]) {
++ val = nla_get_u8(tb[MTK_VENDOR_ATTR_IBF_CTRL_ENABLE]);
++
++ dev->ibf = !!val;
++
++ err = mt7915_mcu_set_txbf(dev, MT_BF_TYPE_UPDATE);
++ if (err)
++ return err;
++ }
++ return 0;
++}
++
++static int
++mt7915_vendor_ibf_ctrl_dump(struct wiphy *wiphy, struct wireless_dev *wdev,
++ struct sk_buff *skb, const void *data, int data_len,
++ unsigned long *storage)
++{
++ struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
++ struct mt7915_phy *phy = mt7915_hw_phy(hw);
++ struct mt7915_dev *dev = phy->dev;
++
++ if (*storage == 1)
++ return -ENOENT;
++ *storage = 1;
++
++ if (nla_put_u8(skb, MTK_VENDOR_ATTR_IBF_DUMP_ENABLE, dev->ibf))
++ return -ENOMEM;
++
++ return 1;
++}
++
+
+ static const struct wiphy_vendor_command mt7915_vendor_commands[] = {
+ {
+@@ -1212,6 +1270,18 @@ static const struct wiphy_vendor_command mt7915_vendor_commands[] = {
+ .doit = mt7915_vendor_3wire_ctrl,
+ .policy = three_wire_ctrl_policy,
+ .maxattr = MTK_VENDOR_ATTR_3WIRE_CTRL_MAX,
++ },
++ {
++ .info = {
++ .vendor_id = MTK_NL80211_VENDOR_ID,
++ .subcmd = MTK_NL80211_VENDOR_SUBCMD_IBF_CTRL,
++ },
++ .flags = WIPHY_VENDOR_CMD_NEED_NETDEV |
++ WIPHY_VENDOR_CMD_NEED_RUNNING,
++ .doit = mt7915_vendor_ibf_ctrl,
++ .dumpit = mt7915_vendor_ibf_ctrl_dump,
++ .policy = ibf_ctrl_policy,
++ .maxattr = MTK_VENDOR_ATTR_IBF_CTRL_MAX,
+ }
+ };
+
+diff --git a/mt7915/vendor.h b/mt7915/vendor.h
+index e0c5fd9..5aac559 100644
+--- a/mt7915/vendor.h
++++ b/mt7915/vendor.h
+@@ -11,7 +11,8 @@ enum mtk_nl80211_vendor_subcmds {
+ MTK_NL80211_VENDOR_SUBCMD_HEMU_CTRL = 0xc5,
+ MTK_NL80211_VENDOR_SUBCMD_PHY_CAPA_CTRL = 0xc6,
+ MTK_NL80211_VENDOR_SUBCMD_EDCCA_CTRL = 0xc7,
+- MTK_NL80211_VENDOR_SUBCMD_3WIRE_CTRL = 0xc8
++ MTK_NL80211_VENDOR_SUBCMD_3WIRE_CTRL = 0xc8,
++ MTK_NL80211_VENDOR_SUBCMD_IBF_CTRL = 0xc9,
+ };
+
+
+@@ -206,4 +207,26 @@ enum mtk_vendor_attr_phy_capa_dump {
+ NUM_MTK_VENDOR_ATTRS_PHY_CAPA_DUMP - 1
+ };
+
++enum mtk_vendor_attr_ibf_ctrl {
++ MTK_VENDOR_ATTR_IBF_CTRL_UNSPEC,
++
++ MTK_VENDOR_ATTR_IBF_CTRL_ENABLE,
++
++ /* keep last */
++ NUM_MTK_VENDOR_ATTRS_IBF_CTRL,
++ MTK_VENDOR_ATTR_IBF_CTRL_MAX =
++ NUM_MTK_VENDOR_ATTRS_IBF_CTRL - 1
++};
++
++enum mtk_vendor_attr_ibf_dump {
++ MTK_VENDOR_ATTR_IBF_DUMP_UNSPEC,
++
++ MTK_VENDOR_ATTR_IBF_DUMP_ENABLE,
++
++ /* keep last */
++ NUM_MTK_VENDOR_ATTRS_IBF_DUMP,
++ MTK_VENDOR_ATTR_IBF_DUMP_MAX =
++ NUM_MTK_VENDOR_ATTRS_IBF_DUMP - 1
++};
++
+ #endif
+--
+2.32.0
+
diff --git a/recipes-kernel/linux-mt76/files/patches/3001-mt76-add-wed-tx-wds-support.patch b/recipes-kernel/linux-mt76/files/patches/3001-mt76-add-wed-tx-wds-support.patch
new file mode 100755
index 0000000..aa7f160
--- /dev/null
+++ b/recipes-kernel/linux-mt76/files/patches/3001-mt76-add-wed-tx-wds-support.patch
@@ -0,0 +1,232 @@
+From f9508e4fbb8e78c849d27394c99295319ccf8a28 Mon Sep 17 00:00:00 2001
+From: Sujuan Chen <sujuan.chen@mediatek.com>
+Date: Sat, 10 Sep 2022 17:09:21 +0800
+Subject: [PATCH] 3001-add-wed-tx-wds-support-on-mt7986
+
+Signed-off-by: Sujuan Chen <sujuan.chen@mediatek.com>
+---
+ mac80211.c | 5 ++++-
+ mt76.h | 2 ++
+ mt7915/init.c | 9 +++++++++
+ mt7915/main.c | 47 +++++++++++++++++++++++++++++++++++++++++++----
+ mt7915/mcu.c | 12 ++++++++++--
+ mt7915/mcu.h | 1 +
+ mt7915/mmio.c | 1 +
+ mt7915/mt7915.h | 4 ++++
+ 8 files changed, 74 insertions(+), 7 deletions(-)
+
+diff --git a/mac80211.c b/mac80211.c
+index 4eaf317..c477d62 100644
+--- a/mac80211.c
++++ b/mac80211.c
+@@ -1360,7 +1360,10 @@ void __mt76_sta_remove(struct mt76_dev *dev, struct ieee80211_vif *vif,
+
+ mt76_packet_id_flush(dev, wcid);
+
+- mt76_wcid_mask_clear(dev->wcid_mask, idx);
++ if (dev->drv->wed_wds_check(dev, sta))
++ mt76_wcid_mask_clear(dev->wcid_wds_mask, idx);
++ else
++ mt76_wcid_mask_clear(dev->wcid_mask, idx);
+ mt76_wcid_mask_clear(dev->wcid_phy_mask, idx);
+ }
+ EXPORT_SYMBOL_GPL(__mt76_sta_remove);
+diff --git a/mt76.h b/mt76.h
+index 4a41949..b7da992 100644
+--- a/mt76.h
++++ b/mt76.h
+@@ -426,6 +426,7 @@ struct mt76_driver_ops {
+
+ void (*sta_remove)(struct mt76_dev *dev, struct ieee80211_vif *vif,
+ struct ieee80211_sta *sta);
++ bool (*wed_wds_check)(struct mt76_dev *dev, struct ieee80211_sta *sta);
+ };
+
+ struct mt76_channel_state {
+@@ -800,6 +801,7 @@ struct mt76_dev {
+ spinlock_t status_lock;
+
+ u32 wcid_mask[DIV_ROUND_UP(MT76_N_WCIDS, 32)];
++ u32 wcid_wds_mask[DIV_ROUND_UP(MT76_N_WCIDS, 32)];
+ u32 wcid_phy_mask[DIV_ROUND_UP(MT76_N_WCIDS, 32)];
+
+ u64 vif_mask;
+diff --git a/mt7915/init.c b/mt7915/init.c
+index 538ff5c..cd9d846 100644
+--- a/mt7915/init.c
++++ b/mt7915/init.c
+@@ -695,6 +695,15 @@ mt7915_init_hardware(struct mt7915_dev *dev, struct mt7915_phy *phy2)
+ return ret;
+ }
+
++ /* wds workaround for mt7986 */
++ if (mtk_wed_device_active(&dev->mt76.mmio.wed) && is_mt7986(&dev->mt76)) {
++ for(idx = MT7915_WTBL_WDS_START; idx < MT7915_WTBL_WDS_END; idx++)
++ mt76_wcid_mask_set(dev->mt76.wcid_mask, idx);
++
++ for (idx = 0; idx < DIV_ROUND_UP(MT7915_WTBL_STA, 32); idx++)
++ dev->mt76.wcid_wds_mask[idx] = ~dev->mt76.wcid_mask[idx];
++ }
++
+ /* Beacon and mgmt frames should occupy wcid 0 */
+ idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT7915_WTBL_STA);
+ if (idx)
+diff --git a/mt7915/main.c b/mt7915/main.c
+index b77b3be..144718e 100644
+--- a/mt7915/main.c
++++ b/mt7915/main.c
+@@ -658,6 +658,24 @@ mt7915_channel_switch_beacon(struct ieee80211_hw *hw,
+ mutex_unlock(&dev->mt76.mutex);
+ }
+
++bool
++mt7915_wed_wds_check(struct mt76_dev *mdev, struct ieee80211_sta *sta)
++{
++ struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv;
++
++ if (!mtk_wed_device_active(&mdev->mmio.wed))
++ return false;
++
++ if(!is_mt7986(mdev))
++ return false;
++
++ if((msta->wcid.idx < MT7915_WTBL_WDS_START ||
++ msta->wcid.idx > MT7915_WTBL_WDS_END))
++ return false;
++
++ return true;
++}
++
+ int mt7915_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif,
+ struct ieee80211_sta *sta)
+ {
+@@ -670,8 +688,18 @@ int mt7915_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif,
+ #endif
+ int ret, idx;
+ u32 addr;
++ bool wed_wds = false;
+
+- idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT7915_WTBL_STA);
++ if (mtk_wed_device_active(&mdev->mmio.wed) && is_mt7986(mdev))
++ wed_wds = !!test_bit(MT_WCID_FLAG_4ADDR, &msta->wcid.flags);
++
++ if (wed_wds)
++ idx = mt76_wcid_alloc(mdev->wcid_wds_mask, MT7915_WTBL_STA);
++ else {
++ idx = mt76_wcid_alloc(mdev->wcid_mask, MT7915_WTBL_STA);
++ if (idx < 0)
++ idx = mt76_wcid_alloc(mdev->wcid_wds_mask, MT7915_WTBL_STA);
++ }
+ if (idx < 0)
+ return -ENOSPC;
+
+@@ -1107,6 +1135,14 @@ static void mt7915_sta_set_4addr(struct ieee80211_hw *hw,
+ else
+ clear_bit(MT_WCID_FLAG_4ADDR, &msta->wcid.flags);
+
++ if (mtk_wed_device_active(&dev->mt76.mmio.wed) &&
++ is_mt7986(&dev->mt76) &&
++ (msta->wcid.idx < MT7915_WTBL_WDS_START ||
++ msta->wcid.idx > MT7915_WTBL_WDS_END)) {
++ mt7915_sta_remove(hw, vif, sta);
++ mt7915_sta_add(hw, vif, sta);
++ }
++
+ mt76_connac_mcu_wtbl_update_hdr_trans(&dev->mt76, vif, sta);
+ }
+
+@@ -1449,9 +1485,12 @@ mt7915_net_fill_forward_path(struct ieee80211_hw *hw,
+ /* fw will find the wcid by dest addr */
+ if(is_mt7915(&dev->mt76))
+ path->mtk_wdma.wcid = 0xff;
+- else
+- path->mtk_wdma.wcid = 0x3ff;
+-
++ else {
++ if (test_bit(MT_WCID_FLAG_4ADDR, &msta->wcid.flags))
++ path->mtk_wdma.wcid = msta->wcid.idx;
++ else
++ path->mtk_wdma.wcid = 0x3ff;
++ }
+ path->mtk_wdma.queue = phy != &dev->phy;
+
+ ctx->dev = NULL;
+diff --git a/mt7915/mcu.c b/mt7915/mcu.c
+index a041bb2..73efa55 100644
+--- a/mt7915/mcu.c
++++ b/mt7915/mcu.c
+@@ -2348,6 +2348,7 @@ mt7915_mcu_init_rx_airtime(struct mt7915_dev *dev)
+ int mt7915_run_firmware(struct mt7915_dev *dev)
+ {
+ int ret;
++ struct mtk_wed_device *wed = &dev->mt76.mmio.wed;
+
+ /* force firmware operation mode into normal state,
+ * which should be set before firmware download stage.
+@@ -2377,8 +2378,15 @@ int mt7915_run_firmware(struct mt7915_dev *dev)
+ if (ret)
+ return ret;
+
+- if (mtk_wed_device_active(&dev->mt76.mmio.wed) && is_mt7915(&dev->mt76))
+- mt7915_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(CAPABILITY), 0, 0, 0);
++ if (mtk_wed_device_active(wed)) {
++ if (is_mt7915(&dev->mt76))
++ mt7915_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(CAPABILITY),
++ 0, 0, 0);
++ else
++ mt7915_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(SET),
++ MCU_WA_PARAM_WED_VERSION,
++ wed->rev_id, 0);
++ }
+
+ ret = mt7915_mcu_set_mwds(dev, 1);
+ if (ret)
+diff --git a/mt7915/mcu.h b/mt7915/mcu.h
+index 9d0fac4..1f56db6 100644
+--- a/mt7915/mcu.h
++++ b/mt7915/mcu.h
+@@ -268,6 +268,7 @@ enum {
+ MCU_WA_PARAM_RED_SHOW_STA = 0xf,
+ MCU_WA_PARAM_RED_TARGET_DELAY = 0x10,
+ #endif
++ MCU_WA_PARAM_WED_VERSION = 0x32,
+ };
+
+ enum mcu_mmps_mode {
+diff --git a/mt7915/mmio.c b/mt7915/mmio.c
+index b0d8a61..de797fd 100644
+--- a/mt7915/mmio.c
++++ b/mt7915/mmio.c
+@@ -774,6 +774,7 @@ struct mt7915_dev *mt7915_mmio_probe(struct device *pdev,
+ .sta_add = mt7915_mac_sta_add,
+ .sta_remove = mt7915_mac_sta_remove,
+ .update_survey = mt7915_update_channel,
++ .wed_wds_check = mt7915_wed_wds_check,
+ };
+ struct mt7915_dev *dev;
+ struct mt76_dev *mdev;
+diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h
+index e329f74..33c00af 100644
+--- a/mt7915/mt7915.h
++++ b/mt7915/mt7915.h
+@@ -18,6 +18,9 @@
+ #define MT7915_WTBL_STA (MT7915_WTBL_RESERVED - \
+ MT7915_MAX_INTERFACES)
+
++#define MT7915_WTBL_WDS_START 256
++#define MT7915_WTBL_WDS_END 271
++
+ #define MT7915_WATCHDOG_TIME (HZ / 10)
+ #define MT7915_RESET_TIMEOUT (30 * HZ)
+
+@@ -699,6 +702,7 @@ void mt7915_tx_token_put(struct mt7915_dev *dev);
+ void mt7915_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
+ struct sk_buff *skb);
+ bool mt7915_rx_check(struct mt76_dev *mdev, void *data, int len);
++bool mt7915_wed_wds_check(struct mt76_dev *mdev, struct ieee80211_sta *sta);
+ void mt7915_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta, bool ps);
+ void mt7915_stats_work(struct work_struct *work);
+ int mt76_dfs_start_rdd(struct mt7915_dev *dev, bool force);
+--
+2.18.0
+
diff --git a/recipes-kernel/linux-mt76/files/patches/3002-mt76-add-wed-rx-support.patch b/recipes-kernel/linux-mt76/files/patches/3002-mt76-add-wed-rx-support.patch
index 499e4c6..4b7c349 100644
--- a/recipes-kernel/linux-mt76/files/patches/3002-mt76-add-wed-rx-support.patch
+++ b/recipes-kernel/linux-mt76/files/patches/3002-mt76-add-wed-rx-support.patch
@@ -8,7 +8,7 @@
dma.c | 250 ++++++++++++++++++++++++++++++++++++++--------
dma.h | 10 ++
mac80211.c | 8 +-
- mt76.h | 25 ++++-
+ mt76.h | 24 ++++-
mt7603/dma.c | 2 +-
mt7603/mt7603.h | 2 +-
mt7615/mac.c | 2 +-
@@ -17,19 +17,16 @@
mt76x02.h | 2 +-
mt76x02_txrx.c | 2 +-
mt7915/dma.c | 25 +++--
- mt7915/init.c | 9 ++
mt7915/mac.c | 103 ++++++++++++++++++-
- mt7915/main.c | 26 ++++-
- mt7915/mcu.c | 14 ++-
- mt7915/mcu.h | 1 +
+ mt7915/mcu.c | 3 +
mt7915/mmio.c | 26 ++++-
- mt7915/mt7915.h | 10 +-
+ mt7915/mt7915.h | 7 +-
mt7915/regs.h | 14 ++-
mt7921/mac.c | 2 +-
mt7921/mt7921.h | 4 +-
mt7921/pci_mac.c | 4 +-
tx.c | 34 +++++++
- 24 files changed, 505 insertions(+), 81 deletions(-)
+ 21 files changed, 460 insertions(+), 75 deletions(-)
diff --git a/dma.c b/dma.c
index 8ea09e6..3317d2b 100644
@@ -504,10 +501,10 @@
#define MT_RX_INFO_LEN 4
#define MT_FCE_INFO_LEN 4
diff --git a/mac80211.c b/mac80211.c
-index 2f0605d..a2bd8ca 100644
+index 4eaf317..731b78f 100644
--- a/mac80211.c
+++ b/mac80211.c
-@@ -598,11 +598,14 @@ mt76_alloc_device(struct device *pdev, unsigned int size,
+@@ -599,11 +599,14 @@ mt76_alloc_device(struct device *pdev, unsigned int size,
BIT(NL80211_IFTYPE_ADHOC);
spin_lock_init(&dev->token_lock);
@@ -522,7 +519,7 @@
dev->token_size = dev->drv->token_size;
for (i = 0; i < ARRAY_SIZE(dev->q_rx); i++)
-@@ -1300,7 +1303,10 @@ void mt76_rx_poll_complete(struct mt76_dev *dev, enum mt76_rxq_id q,
+@@ -1301,7 +1304,10 @@ void mt76_rx_poll_complete(struct mt76_dev *dev, enum mt76_rxq_id q,
while ((skb = __skb_dequeue(&dev->rx_skb[q])) != NULL) {
mt76_check_sta(dev, skb);
@@ -535,7 +532,7 @@
mt76_rx_complete(dev, &frames, napi);
diff --git a/mt76.h b/mt76.h
-index 4a41949..fb3ae86 100644
+index b7da992..20fd0ec 100644
--- a/mt76.h
+++ b/mt76.h
@@ -20,6 +20,8 @@
@@ -584,7 +581,7 @@
void (*rx_poll_complete)(struct mt76_dev *dev, enum mt76_rxq_id q);
-@@ -756,6 +763,7 @@ struct mt76_dev {
+@@ -757,6 +764,7 @@ struct mt76_dev {
struct ieee80211_hw *hw;
spinlock_t lock;
@@ -592,7 +589,7 @@
spinlock_t cc_lock;
u32 cur_cc_bss_rx;
-@@ -781,6 +789,7 @@ struct mt76_dev {
+@@ -782,6 +790,7 @@ struct mt76_dev {
struct sk_buff_head rx_skb[__MT_RXQ_MAX];
struct list_head txwi_cache;
@@ -600,7 +597,7 @@
struct mt76_queue *q_mcu[__MT_MCUQ_MAX];
struct mt76_queue q_rx[__MT_RXQ_MAX];
const struct mt76_queue_ops *queue_ops;
-@@ -794,12 +803,16 @@ struct mt76_dev {
+@@ -795,6 +804,9 @@ struct mt76_dev {
u16 wed_token_count;
u16 token_count;
u16 token_size;
@@ -610,14 +607,7 @@
wait_queue_head_t tx_wait;
/* spinclock used to protect wcid pktid linked list */
- spinlock_t status_lock;
-
- u32 wcid_mask[DIV_ROUND_UP(MT76_N_WCIDS, 32)];
-+ u32 wcid_wds_mask[DIV_ROUND_UP(MT76_N_WCIDS, 32)];
- u32 wcid_phy_mask[DIV_ROUND_UP(MT76_N_WCIDS, 32)];
-
- u64 vif_mask;
-@@ -1357,6 +1370,8 @@ mt76_tx_status_get_hw(struct mt76_dev *dev, struct sk_buff *skb)
+@@ -1359,6 +1371,8 @@ mt76_tx_status_get_hw(struct mt76_dev *dev, struct sk_buff *skb)
}
void mt76_put_txwi(struct mt76_dev *dev, struct mt76_txwi_cache *t);
@@ -626,7 +616,7 @@
void mt76_rx_complete(struct mt76_dev *dev, struct sk_buff_head *frames,
struct napi_struct *napi);
void mt76_rx_poll_complete(struct mt76_dev *dev, enum mt76_rxq_id q,
-@@ -1501,6 +1516,12 @@ struct mt76_txwi_cache *
+@@ -1503,6 +1517,12 @@ struct mt76_txwi_cache *
mt76_token_release(struct mt76_dev *dev, int token, bool *wake);
int mt76_token_consume(struct mt76_dev *dev, struct mt76_txwi_cache **ptxwi);
void __mt76_set_tx_blocked(struct mt76_dev *dev, bool blocked);
@@ -836,26 +826,6 @@
/* rx data queue for band1 */
ret = mt76_queue_alloc(dev, &dev->mt76.q_rx[MT_RXQ_BAND1],
MT_RXQ_ID(MT_RXQ_BAND1),
-diff --git a/mt7915/init.c b/mt7915/init.c
-index 538ff5c..cd9d846 100644
---- a/mt7915/init.c
-+++ b/mt7915/init.c
-@@ -695,6 +695,15 @@ mt7915_init_hardware(struct mt7915_dev *dev, struct mt7915_phy *phy2)
- return ret;
- }
-
-+ /* wds workaround for mt7986 */
-+ if (mtk_wed_device_active(&dev->mt76.mmio.wed) && is_mt7986(&dev->mt76)) {
-+ for(idx = MT7915_WTBL_WDS_START; idx < MT7915_WTBL_WDS_END; idx++)
-+ mt76_wcid_mask_set(dev->mt76.wcid_mask, idx);
-+
-+ for (idx = 0; idx < DIV_ROUND_UP(MT7915_WTBL_STA, 32); idx++)
-+ dev->mt76.wcid_wds_mask[idx] = ~dev->mt76.wcid_mask[idx];
-+ }
-+
- /* Beacon and mgmt frames should occupy wcid 0 */
- idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT7915_WTBL_STA);
- if (idx)
diff --git a/mt7915/mac.c b/mt7915/mac.c
index 0a13b7d..4e1dfc9 100644
--- a/mt7915/mac.c
@@ -1005,60 +975,8 @@
mt76_rx(&dev->mt76, q, skb);
return;
}
-diff --git a/mt7915/main.c b/mt7915/main.c
-index b77b3be..29ee700 100644
---- a/mt7915/main.c
-+++ b/mt7915/main.c
-@@ -670,8 +670,15 @@ int mt7915_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif,
- #endif
- int ret, idx;
- u32 addr;
-+ bool wed_wds = false;
-
-- idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT7915_WTBL_STA);
-+ if (mtk_wed_device_active(&mdev->mmio.wed) && is_mt7986(mdev))
-+ wed_wds = !!test_bit(MT_WCID_FLAG_4ADDR, &msta->wcid.flags);
-+
-+ if (wed_wds)
-+ idx = mt76_wcid_alloc(mdev->wcid_wds_mask, MT7915_WTBL_STA);
-+ else
-+ idx = mt76_wcid_alloc(mdev->wcid_mask, MT7915_WTBL_STA);
- if (idx < 0)
- return -ENOSPC;
-
-@@ -1107,6 +1114,14 @@ static void mt7915_sta_set_4addr(struct ieee80211_hw *hw,
- else
- clear_bit(MT_WCID_FLAG_4ADDR, &msta->wcid.flags);
-
-+ if (mtk_wed_device_active(&dev->mt76.mmio.wed) &&
-+ is_mt7986(&dev->mt76) &&
-+ (msta->wcid.idx < MT7915_WTBL_WDS_START ||
-+ msta->wcid.idx > MT7915_WTBL_WDS_END)) {
-+ mt7915_sta_remove(hw, vif, sta);
-+ mt7915_sta_add(hw, vif, sta);
-+ }
-+
- mt76_connac_mcu_wtbl_update_hdr_trans(&dev->mt76, vif, sta);
- }
-
-@@ -1449,9 +1464,12 @@ mt7915_net_fill_forward_path(struct ieee80211_hw *hw,
- /* fw will find the wcid by dest addr */
- if(is_mt7915(&dev->mt76))
- path->mtk_wdma.wcid = 0xff;
-- else
-- path->mtk_wdma.wcid = 0x3ff;
--
-+ else {
-+ if (test_bit(MT_WCID_FLAG_4ADDR, &msta->wcid.flags))
-+ path->mtk_wdma.wcid = msta->wcid.idx;
-+ else
-+ path->mtk_wdma.wcid = 0x3ff;
-+ }
- path->mtk_wdma.queue = phy != &dev->phy;
-
- ctx->dev = NULL;
diff --git a/mt7915/mcu.c b/mt7915/mcu.c
-index a041bb2..3d50b78 100644
+index 73efa55..22f68da 100644
--- a/mt7915/mcu.c
+++ b/mt7915/mcu.c
@@ -1722,6 +1722,7 @@ int mt7915_mcu_add_sta(struct mt7915_dev *dev, struct ieee80211_vif *vif,
@@ -1078,43 +996,6 @@
return mt76_mcu_skb_send_msg(&dev->mt76, skb,
MCU_EXT_CMD(STA_REC_UPDATE), true);
}
-@@ -2348,6 +2351,7 @@ mt7915_mcu_init_rx_airtime(struct mt7915_dev *dev)
- int mt7915_run_firmware(struct mt7915_dev *dev)
- {
- int ret;
-+ struct mtk_wed_device *wed = &dev->mt76.mmio.wed;
-
- /* force firmware operation mode into normal state,
- * which should be set before firmware download stage.
-@@ -2377,8 +2381,14 @@ int mt7915_run_firmware(struct mt7915_dev *dev)
- if (ret)
- return ret;
-
-- if (mtk_wed_device_active(&dev->mt76.mmio.wed) && is_mt7915(&dev->mt76))
-- mt7915_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(CAPABILITY), 0, 0, 0);
-+ if (mtk_wed_device_active(wed)) {
-+ if (is_mt7915(&dev->mt76))
-+ mt7915_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(CAPABILITY),
-+ 0, 0, 0);
-+ mt7915_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(SET),
-+ MCU_WA_PARAM_WED_VERSION,
-+ wed->rev_id, 0);
-+ }
-
- ret = mt7915_mcu_set_mwds(dev, 1);
- if (ret)
-diff --git a/mt7915/mcu.h b/mt7915/mcu.h
-index 9d0fac4..1f56db6 100644
---- a/mt7915/mcu.h
-+++ b/mt7915/mcu.h
-@@ -268,6 +268,7 @@ enum {
- MCU_WA_PARAM_RED_SHOW_STA = 0xf,
- MCU_WA_PARAM_RED_TARGET_DELAY = 0x10,
- #endif
-+ MCU_WA_PARAM_WED_VERSION = 0x32,
- };
-
- enum mcu_mmps_mode {
diff --git a/mt7915/mmio.c b/mt7915/mmio.c
index b0d8a61..111444d 100644
--- a/mt7915/mmio.c
@@ -1197,20 +1078,10 @@
dev->mt76.dma_dev = wed->dev;
mdev->token_size = wed->wlan.token_start;
diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h
-index e329f74..b10b90a 100644
+index 33c00af..b805aae 100644
--- a/mt7915/mt7915.h
+++ b/mt7915/mt7915.h
-@@ -18,6 +18,9 @@
- #define MT7915_WTBL_STA (MT7915_WTBL_RESERVED - \
- MT7915_MAX_INTERFACES)
-
-+#define MT7915_WTBL_WDS_START 256
-+#define MT7915_WTBL_WDS_END 274
-+
- #define MT7915_WATCHDOG_TIME (HZ / 10)
- #define MT7915_RESET_TIMEOUT (30 * HZ)
-
-@@ -78,6 +81,7 @@
+@@ -81,6 +81,7 @@
#define MT7915_MAX_STA_TWT_AGRT 8
#define MT7915_MIN_TWT_DUR 64
#define MT7915_MAX_QUEUE (MT_RXQ_BAND2 + __MT_MCUQ_MAX + 2)
@@ -1218,7 +1089,7 @@
struct mt7915_vif;
struct mt7915_sta;
-@@ -544,7 +548,9 @@ void mt7915_wfsys_reset(struct mt7915_dev *dev);
+@@ -547,7 +548,9 @@ void mt7915_wfsys_reset(struct mt7915_dev *dev);
irqreturn_t mt7915_irq_handler(int irq, void *dev_instance);
u64 __mt7915_get_tsf(struct ieee80211_hw *hw, struct mt7915_vif *mvif);
u32 mt7915_wed_init_buf(void *ptr, dma_addr_t phys, int token_id);
@@ -1229,15 +1100,15 @@
int mt7915_register_device(struct mt7915_dev *dev);
void mt7915_unregister_device(struct mt7915_dev *dev);
int mt7915_eeprom_init(struct mt7915_dev *dev);
-@@ -697,7 +703,7 @@ int mt7915_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
+@@ -700,7 +703,7 @@ int mt7915_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
struct mt76_tx_info *tx_info);
void mt7915_tx_token_put(struct mt7915_dev *dev);
void mt7915_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
- struct sk_buff *skb);
+ struct sk_buff *skb, u32 info);
bool mt7915_rx_check(struct mt76_dev *mdev, void *data, int len);
+ bool mt7915_wed_wds_check(struct mt76_dev *mdev, struct ieee80211_sta *sta);
void mt7915_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta, bool ps);
- void mt7915_stats_work(struct work_struct *work);
diff --git a/mt7915/regs.h b/mt7915/regs.h
index 432ed30..36ef8a9 100644
--- a/mt7915/regs.h
diff --git a/recipes-kernel/linux-mt76/files/patches/3007-mt76-mt7915-enable-red-per-band-token-drop-for-HW-Pa.patch b/recipes-kernel/linux-mt76/files/patches/3007-mt76-mt7915-enable-red-per-band-token-drop-for-HW-Pa.patch
new file mode 100644
index 0000000..e6dc07a
--- /dev/null
+++ b/recipes-kernel/linux-mt76/files/patches/3007-mt76-mt7915-enable-red-per-band-token-drop-for-HW-Pa.patch
@@ -0,0 +1,142 @@
+From 17753f183bce83f2b2f03e9f15312f84b67558e9 Mon Sep 17 00:00:00 2001
+From: Peter Chiu <chui-hao.chiu@mediatek.com>
+Date: Fri, 2 Sep 2022 14:40:40 +0800
+Subject: [PATCH] mt76: mt7915: enable red per-band token drop for HW Path
+
+Limit the number of token used by each band. If a band uses too many token,
+it may hurt the throughput of the other band. The SW path can solve this
+problem by AQL.
+
+Signed-off-by: Peter Chiu <chui-hao.chiu@mediatek.com>
+---
+ mt7915/mcu.c | 53 +++++++++++++++++++++++++++++++++++++++----------
+ mt7915/mcu.h | 1 +
+ mt7915/mt7915.h | 2 +-
+ 3 files changed, 45 insertions(+), 11 deletions(-)
+
+diff --git a/mt7915/mcu.c b/mt7915/mcu.c
+index 1cbdf0cf..c29eb80a 100644
+--- a/mt7915/mcu.c
++++ b/mt7915/mcu.c
+@@ -2410,8 +2410,13 @@ int mt7915_run_firmware(struct mt7915_dev *dev)
+ mt7915_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(SET),
+ MCU_WA_PARAM_WED_VERSION,
+ wed->rev_id, 0);
++
++ mt7915_mcu_set_red(dev, true);
++ } else {
++ mt7915_mcu_set_red(dev, false);
+ }
+
++
+ ret = mt7915_mcu_set_mwds(dev, 1);
+ if (ret)
+ return ret;
+@@ -2421,12 +2426,7 @@ int mt7915_run_firmware(struct mt7915_dev *dev)
+ if (ret)
+ return ret;
+
+- ret = mt7915_mcu_init_rx_airtime(dev);
+- if (ret)
+- return ret;
+-
+- return mt7915_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(SET),
+- MCU_WA_PARAM_RED, 0, 0);
++ return mt7915_mcu_init_rx_airtime(dev);
+ }
+
+ int mt7915_mcu_init(struct mt7915_dev *dev)
+@@ -4230,6 +4230,35 @@ int mt7915_dbg_mcu_wa_cmd(struct mt7915_dev *dev, int cmd, u32 a1, u32 a2, u32 a
+
+ return mt76_mcu_send_msg(&dev->mt76, cmd, &req, sizeof(req), wait_resp);
+ }
++#endif
++
++static int mt7915_red_set_watermark(struct mt7915_dev *dev)
++{
++#define RED_GLOBAL_TOKEN_WATERMARK 2
++#define TOTAL_HW_TOKEN_SIZE 8192
++ struct {
++ __le32 args[3];
++
++ u8 cmd;
++ u8 version;
++ u8 __rsv1[4];
++ u16 len;
++
++ __le16 high_mark;
++ __le16 low_mark;
++ u8 __rsv2[12];
++ } req = {
++ .args[0] = cpu_to_le32(MCU_WA_PARAM_RED_SETTING),
++ .cmd = RED_GLOBAL_TOKEN_WATERMARK,
++ .len = cpu_to_le16(sizeof(req) - 12),
++
++ .high_mark = cpu_to_le16(TOTAL_HW_TOKEN_SIZE - 256),
++ .low_mark = cpu_to_le16(TOTAL_HW_TOKEN_SIZE - 256 - 1536),
++ };
++
++ return mt76_mcu_send_msg(&dev->mt76, MCU_WA_PARAM_CMD(SET), &req,
++ sizeof(req), false);
++}
+
+ int mt7915_mcu_set_red(struct mt7915_dev *dev, bool enabled)
+ {
+@@ -4240,17 +4269,21 @@ int mt7915_mcu_set_red(struct mt7915_dev *dev, bool enabled)
+ u32 red_type = enabled > 0 ? RED_BY_WA_ENABLE : RED_DISABLE;
+ __le32 req = cpu_to_le32(red_type);
+
++ if (enabled) {
++ ret = mt7915_red_set_watermark(dev);
++ if (ret < 0)
++ return ret;
++ }
++
+ ret = mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RED_ENABLE), &req,
+ sizeof(req), false);
+ if (ret < 0)
+ return ret;
+
+- mt7915_dbg_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(SET),
+- MCU_WA_PARAM_RED, enabled, 0, true);
++ return mt7915_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(SET),
++ MCU_WA_PARAM_RED, enabled, 0);
+
+- return 0;
+ }
+-#endif
+
+ int mt7915_mcu_rf_regval(struct mt7915_dev *dev, u32 regidx, u32 *val, bool set)
+ {
+diff --git a/mt7915/mcu.h b/mt7915/mcu.h
+index ce50e606..230ad9db 100644
+--- a/mt7915/mcu.h
++++ b/mt7915/mcu.h
+@@ -269,6 +269,7 @@ enum {
+ MCU_WA_PARAM_RED_TARGET_DELAY = 0x10,
+ #endif
+ MCU_WA_PARAM_WED_VERSION = 0x32,
++ MCU_WA_PARAM_RED_SETTING = 0x40,
+ };
+
+ enum mcu_mmps_mode {
+diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h
+index f2081640..f2a1e615 100644
+--- a/mt7915/mt7915.h
++++ b/mt7915/mt7915.h
+@@ -749,11 +749,11 @@ int mt7915_vendor_amnt_sta_remove(struct mt7915_phy *phy,
+ #endif
+ int mt7915_mcu_set_edcca(struct mt7915_phy *phy, int mode, u8 *value,
+ s8 compensation);
++int mt7915_mcu_set_red(struct mt7915_dev *dev, bool enabled);
+
+ #ifdef MTK_DEBUG
+ int mt7915_mtk_init_debugfs(struct mt7915_phy *phy, struct dentry *dir);
+ int mt7915_dbg_mcu_wa_cmd(struct mt7915_dev *dev, int cmd, u32 a1, u32 a2, u32 a3, bool wait_resp);
+-int mt7915_mcu_set_red(struct mt7915_dev *dev, bool enabled);
+ void mt7915_dump_tmac_info(u8 *tmac_info);
+ int mt7915_mcu_set_txpower_level(struct mt7915_phy *phy, u8 drop_level);
+ void mt7915_packet_log_to_host(struct mt7915_dev *dev, const void *data, int len, int type, int des_len);
+--
+2.18.0
+
diff --git a/recipes-kernel/linux-mt76/files/patches/patches.inc b/recipes-kernel/linux-mt76/files/patches/patches.inc
index 2250c90..86258ac 100644
--- a/recipes-kernel/linux-mt76/files/patches/patches.inc
+++ b/recipes-kernel/linux-mt76/files/patches/patches.inc
@@ -30,10 +30,13 @@
file://1120-mt76-mt7915-initialize-wcid.patch \
file://1121-mt76-HEMU-Add-dump-support.patch \
file://1122-mt76-mt7915-add-vendor-subcmd-three-wire-PTA-ctrl.patch \
+ file://1123-mt76-add-ibf-control-vendor-cmd.patch \
file://3001-mt76-add-wed-tx-support.patch \
+ file://3001-mt76-add-wed-tx-wds-support.patch \
file://3002-mt76-add-wed-rx-support.patch \
file://3003-mt76-add-fill-receive-path-to-report-wed-idx.patch \
file://3004-mt76-add-ser-spport-when-wed-on.patch \
file://3005-mt76-mt7915-add-statistic-for-HW-Tx-Path.patch \
file://3006-mt76-mt7915-add-statistic-for-HW-Rx-Path.patch \
+ file://3007-mt76-mt7915-enable-red-per-band-token-drop-for-HW-Pa.patch \
"
diff --git a/recipes-kernel/linux-mt76/linux-mt76.bb b/recipes-kernel/linux-mt76/linux-mt76.bb
index b74aed7..471f86d 100644
--- a/recipes-kernel/linux-mt76/linux-mt76.bb
+++ b/recipes-kernel/linux-mt76/linux-mt76.bb
@@ -7,7 +7,7 @@
PV = "1.0"
-SRCREV ?= "5ec78e1ec43d1e39edfea1efb9fd4541fa004af0"
+SRCREV ?= "d70546462b7b51ebc2bcdd5c534fdf3465be62a4"
SRC_URI = " \
git://git@github.com/openwrt/mt76.git;protocol=https \
file://COPYING;subdir=git \
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9996-add-wed-tx-wds-support-for-mt7986.patch b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9996-add-wed-tx-wds-support-for-mt7986.patch
new file mode 100755
index 0000000..27977ac
--- /dev/null
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9996-add-wed-tx-wds-support-for-mt7986.patch
@@ -0,0 +1,63 @@
+From 3bddc232ca043699e893d279a3ec1f72ff6b9fae Mon Sep 17 00:00:00 2001
+From: Sujuan Chen <sujuan.chen@mediatek.com>
+Date: Sat, 10 Sep 2022 15:42:32 +0800
+Subject: [PATCH] 9996-add-wed-tx-wds-support-on-panther
+
+Signed-off-by: Sujuan Chen <sujuan.chen@mediatek.com>
+---
+ drivers/net/ethernet/mediatek/mtk_wed.c | 6 ++++++
+ drivers/net/ethernet/mediatek/mtk_wed_regs.h | 1 +
+ include/linux/soc/mediatek/mtk_wed.h | 1 +
+ 3 files changed, 8 insertions(+)
+
+diff --git a/drivers/net/ethernet/mediatek/mtk_wed.c b/drivers/net/ethernet/mediatek/mtk_wed.c
+index 48b0353..2700176 100644
+--- a/drivers/net/ethernet/mediatek/mtk_wed.c
++++ b/drivers/net/ethernet/mediatek/mtk_wed.c
+@@ -809,6 +809,7 @@ mtk_wed_attach(struct mtk_wed_device *dev)
+ __releases(RCU)
+ {
+ struct mtk_wed_hw *hw;
++ u16 ver;
+ int ret = 0;
+
+ RCU_LOCKDEP_WARN(!rcu_read_lock_held(),
+@@ -839,6 +840,11 @@ mtk_wed_attach(struct mtk_wed_device *dev)
+
+ dev->ver = FIELD_GET(MTK_WED_REV_ID_MAJOR,
+ wed_r32(dev, MTK_WED_REV_ID));
++ if (dev->ver > MTK_WED_V1)
++ ver = FIELD_GET(MTK_WED_REV_ID_MINOR,
++ wed_r32(dev, MTK_WED_REV_ID));
++
++ dev->rev_id = ((dev->ver << 28) | ver << 16);
+
+ ret = mtk_wed_buffer_alloc(dev);
+ if (ret) {
+diff --git a/drivers/net/ethernet/mediatek/mtk_wed_regs.h b/drivers/net/ethernet/mediatek/mtk_wed_regs.h
+index e107de7..b189761 100644
+--- a/drivers/net/ethernet/mediatek/mtk_wed_regs.h
++++ b/drivers/net/ethernet/mediatek/mtk_wed_regs.h
+@@ -31,6 +31,7 @@ struct mtk_wdma_desc {
+ #define MTK_WED_REV_ID 0x000
+ #define MTK_WED_REV_ID_MAJOR GENMASK(7, 0)
+ #endif
++#define MTK_WED_REV_ID_MINOR GENMASK(27, 16)
+
+ #define MTK_WED_RESET 0x008
+ #define MTK_WED_RESET_TX_BM BIT(0)
+diff --git a/include/linux/soc/mediatek/mtk_wed.h b/include/linux/soc/mediatek/mtk_wed.h
+index ffd547a..631360b 100644
+--- a/include/linux/soc/mediatek/mtk_wed.h
++++ b/include/linux/soc/mediatek/mtk_wed.h
+@@ -42,6 +42,7 @@ struct mtk_wed_device {
+ int wdma_idx;
+ int irq;
+ u8 ver;
++ u32 rev_id;
+
+ struct mtk_wed_ring tx_ring[MTK_WED_TX_QUEUES];
+ struct mtk_wed_ring txfree_ring;
+--
+2.18.0
+
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9997-add-wed-rx-support-for-mt7896.patch b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9997-add-wed-rx-support-for-mt7896.patch
index 8af3142..64c3d33 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9997-add-wed-rx-support-for-mt7896.patch
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9997-add-wed-rx-support-for-mt7896.patch
@@ -8,17 +8,17 @@
arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 42 +-
arch/arm64/boot/dts/mediatek/mt7986b.dtsi | 42 +-
drivers/net/ethernet/mediatek/Makefile | 2 +-
- drivers/net/ethernet/mediatek/mtk_wed.c | 631 ++++++++++++++++--
+ drivers/net/ethernet/mediatek/mtk_wed.c | 625 ++++++++++++++++--
drivers/net/ethernet/mediatek/mtk_wed.h | 51 ++
drivers/net/ethernet/mediatek/mtk_wed_ccif.c | 133 ++++
drivers/net/ethernet/mediatek/mtk_wed_ccif.h | 45 ++
.../net/ethernet/mediatek/mtk_wed_debugfs.c | 90 +++
drivers/net/ethernet/mediatek/mtk_wed_mcu.c | 586 ++++++++++++++++
drivers/net/ethernet/mediatek/mtk_wed_mcu.h | 125 ++++
- drivers/net/ethernet/mediatek/mtk_wed_regs.h | 145 +++-
+ drivers/net/ethernet/mediatek/mtk_wed_regs.h | 144 +++-
drivers/net/ethernet/mediatek/mtk_wed_wo.c | 573 ++++++++++++++++
- drivers/net/ethernet/mediatek/mtk_wed_wo.h | 336 ++++++++++
- include/linux/soc/mediatek/mtk_wed.h | 75 ++-
+ drivers/net/ethernet/mediatek/mtk_wed_wo.h | 327 +++++++++
+ include/linux/soc/mediatek/mtk_wed.h | 74 ++-
14 files changed, 2796 insertions(+), 75 deletions(-)
create mode 100644 drivers/net/ethernet/mediatek/mtk_wed_ccif.c
create mode 100644 drivers/net/ethernet/mediatek/mtk_wed_ccif.h
@@ -170,7 +170,7 @@
resets = <ðsysrst 0>;
reset-names = "wocpu_rst";
diff --git a/drivers/net/ethernet/mediatek/Makefile b/drivers/net/ethernet/mediatek/Makefile
-index 3528f1b3c..0c724a55c 100644
+index 3528f1b..0c724a5 100644
--- a/drivers/net/ethernet/mediatek/Makefile
+++ b/drivers/net/ethernet/mediatek/Makefile
@@ -10,5 +10,5 @@ mtk_eth-$(CONFIG_NET_MEDIATEK_SOC_WED) += mtk_wed.o
@@ -181,7 +181,7 @@
+obj-$(CONFIG_NET_MEDIATEK_SOC_WED) += mtk_wed_ops.o mtk_wed_wo.o mtk_wed_mcu.o mtk_wed_ccif.o
obj-$(CONFIG_NET_MEDIATEK_HNAT) += mtk_hnat/
diff --git a/drivers/net/ethernet/mediatek/mtk_wed.c b/drivers/net/ethernet/mediatek/mtk_wed.c
-index 48b0353bb..75527956b 100644
+index 2700176..b037d00 100644
--- a/drivers/net/ethernet/mediatek/mtk_wed.c
+++ b/drivers/net/ethernet/mediatek/mtk_wed.c
@@ -13,11 +13,19 @@
@@ -733,7 +733,7 @@
static void
-mtk_wed_ring_reset(struct mtk_wdma_desc *desc, int size, int scale)
+mtk_wed_rx_hw_init(struct mtk_wed_device *dev)
- {
++{
+ wed_w32(dev, MTK_WED_WPDMA_RX_D_RST_IDX,
+ MTK_WED_WPDMA_RX_D_RST_CRX_IDX |
+ MTK_WED_WPDMA_RX_D_RST_DRV_IDX);
@@ -760,7 +760,7 @@
+
+static void
+mtk_wed_ring_reset(struct mtk_wdma_desc *desc, int size, int scale, bool tx)
-+{
+ {
+ __le32 ctrl;
int i;
@@ -1014,23 +1014,8 @@
mtk_wed_dma_enable(dev);
dev->running = true;
-@@ -809,6 +1298,7 @@ mtk_wed_attach(struct mtk_wed_device *dev)
- __releases(RCU)
- {
- struct mtk_wed_hw *hw;
-+ u16 ver;
- int ret = 0;
-
- RCU_LOCKDEP_WARN(!rcu_read_lock_held(),
-@@ -839,11 +1329,24 @@ mtk_wed_attach(struct mtk_wed_device *dev)
-
- dev->ver = FIELD_GET(MTK_WED_REV_ID_MAJOR,
- wed_r32(dev, MTK_WED_REV_ID));
-+ if (dev->ver > MTK_WED_V1)
-+ ver = FIELD_GET(MTK_WED_REV_ID_MINOR,
-+ wed_r32(dev, MTK_WED_REV_ID));
-+
-+ dev->rev_id = ((dev->ver << 28) | ver << 16);
+@@ -847,9 +1336,17 @@ mtk_wed_attach(struct mtk_wed_device *dev)
+ dev->rev_id = ((dev->ver << 28) | ver << 16);
ret = mtk_wed_buffer_alloc(dev);
- if (ret) {
@@ -1050,7 +1035,7 @@
}
mtk_wed_hw_init_early(dev);
-@@ -851,7 +1354,12 @@ mtk_wed_attach(struct mtk_wed_device *dev)
+@@ -857,7 +1354,12 @@ mtk_wed_attach(struct mtk_wed_device *dev)
if (dev->ver == MTK_WED_V1)
regmap_update_bits(hw->hifsys, HIFSYS_DMA_AG_MAP,
BIT(hw->index), 0);
@@ -1063,7 +1048,7 @@
out:
mutex_unlock(&hw_lock);
-@@ -877,10 +1385,10 @@ mtk_wed_tx_ring_setup(struct mtk_wed_device *dev, int idx, void __iomem *regs)
+@@ -883,10 +1385,10 @@ mtk_wed_tx_ring_setup(struct mtk_wed_device *dev, int idx, void __iomem *regs)
BUG_ON(idx > ARRAY_SIZE(dev->tx_ring));
@@ -1076,7 +1061,7 @@
return -ENOMEM;
ring->reg_base = MTK_WED_RING_TX(idx);
-@@ -927,6 +1435,35 @@ mtk_wed_txfree_ring_setup(struct mtk_wed_device *dev, void __iomem *regs)
+@@ -933,6 +1435,35 @@ mtk_wed_txfree_ring_setup(struct mtk_wed_device *dev, void __iomem *regs)
return 0;
}
@@ -1112,7 +1097,7 @@
static u32
mtk_wed_irq_get(struct mtk_wed_device *dev, u32 mask)
{
-@@ -1014,6 +1551,8 @@ void mtk_wed_add_hw(struct device_node *np, struct mtk_eth *eth,
+@@ -1020,6 +1551,8 @@ void mtk_wed_add_hw(struct device_node *np, struct mtk_eth *eth,
.attach = mtk_wed_attach,
.tx_ring_setup = mtk_wed_tx_ring_setup,
.txfree_ring_setup = mtk_wed_txfree_ring_setup,
@@ -1121,7 +1106,7 @@
.start = mtk_wed_start,
.stop = mtk_wed_stop,
.reset_dma = mtk_wed_reset_dma,
-@@ -1022,6 +1561,7 @@ void mtk_wed_add_hw(struct device_node *np, struct mtk_eth *eth,
+@@ -1028,6 +1561,7 @@ void mtk_wed_add_hw(struct device_node *np, struct mtk_eth *eth,
.irq_get = mtk_wed_irq_get,
.irq_set_mask = mtk_wed_irq_set_mask,
.detach = mtk_wed_detach,
@@ -1129,7 +1114,7 @@
};
struct device_node *eth_np = eth->dev->of_node;
struct platform_device *pdev;
-@@ -1077,6 +1617,7 @@ void mtk_wed_add_hw(struct device_node *np, struct mtk_eth *eth,
+@@ -1083,6 +1617,7 @@ void mtk_wed_add_hw(struct device_node *np, struct mtk_eth *eth,
regmap_write(hw->mirror, 0, 0);
regmap_write(hw->mirror, 4, 0);
}
@@ -1138,7 +1123,7 @@
mtk_wed_hw_add_debugfs(hw);
diff --git a/drivers/net/ethernet/mediatek/mtk_wed.h b/drivers/net/ethernet/mediatek/mtk_wed.h
-index 9b17b7405..8ef5253ca 100644
+index 9b17b74..8ef5253 100644
--- a/drivers/net/ethernet/mediatek/mtk_wed.h
+++ b/drivers/net/ethernet/mediatek/mtk_wed.h
@@ -13,6 +13,7 @@
@@ -1242,7 +1227,7 @@
#endif
diff --git a/drivers/net/ethernet/mediatek/mtk_wed_ccif.c b/drivers/net/ethernet/mediatek/mtk_wed_ccif.c
new file mode 100644
-index 000000000..22ef337d0
+index 0000000..22ef337
--- /dev/null
+++ b/drivers/net/ethernet/mediatek/mtk_wed_ccif.c
@@ -0,0 +1,133 @@
@@ -1381,7 +1366,7 @@
+}
diff --git a/drivers/net/ethernet/mediatek/mtk_wed_ccif.h b/drivers/net/ethernet/mediatek/mtk_wed_ccif.h
new file mode 100644
-index 000000000..68ade449c
+index 0000000..68ade44
--- /dev/null
+++ b/drivers/net/ethernet/mediatek/mtk_wed_ccif.h
@@ -0,0 +1,45 @@
@@ -1431,7 +1416,7 @@
+
+#endif
diff --git a/drivers/net/ethernet/mediatek/mtk_wed_debugfs.c b/drivers/net/ethernet/mediatek/mtk_wed_debugfs.c
-index f420f187e..4a9e684ed 100644
+index f420f18..4a9e684 100644
--- a/drivers/net/ethernet/mediatek/mtk_wed_debugfs.c
+++ b/drivers/net/ethernet/mediatek/mtk_wed_debugfs.c
@@ -2,6 +2,7 @@
@@ -1573,7 +1558,7 @@
}
diff --git a/drivers/net/ethernet/mediatek/mtk_wed_mcu.c b/drivers/net/ethernet/mediatek/mtk_wed_mcu.c
new file mode 100644
-index 000000000..723bdfd55
+index 0000000..723bdfd
--- /dev/null
+++ b/drivers/net/ethernet/mediatek/mtk_wed_mcu.c
@@ -0,0 +1,586 @@
@@ -2165,7 +2150,7 @@
+
diff --git a/drivers/net/ethernet/mediatek/mtk_wed_mcu.h b/drivers/net/ethernet/mediatek/mtk_wed_mcu.h
new file mode 100644
-index 000000000..6a5ac7672
+index 0000000..6a5ac76
--- /dev/null
+++ b/drivers/net/ethernet/mediatek/mtk_wed_mcu.h
@@ -0,0 +1,125 @@
@@ -2295,7 +2280,7 @@
+
+#endif
diff --git a/drivers/net/ethernet/mediatek/mtk_wed_regs.h b/drivers/net/ethernet/mediatek/mtk_wed_regs.h
-index e107de7ba..9d021e2da 100644
+index b189761..9d021e2 100644
--- a/drivers/net/ethernet/mediatek/mtk_wed_regs.h
+++ b/drivers/net/ethernet/mediatek/mtk_wed_regs.h
@@ -4,6 +4,8 @@
@@ -2315,15 +2300,7 @@
struct mtk_wdma_desc {
__le32 buf0;
-@@ -31,6 +34,7 @@ struct mtk_wdma_desc {
- #define MTK_WED_REV_ID 0x000
- #define MTK_WED_REV_ID_MAJOR GENMASK(7, 0)
- #endif
-+#define MTK_WED_REV_ID_MINOR GENMASK(27, 16)
-
- #define MTK_WED_RESET 0x008
- #define MTK_WED_RESET_TX_BM BIT(0)
-@@ -41,6 +45,8 @@ struct mtk_wdma_desc {
+@@ -42,6 +45,8 @@ struct mtk_wdma_desc {
#define MTK_WED_RESET_WED_TX_DMA BIT(12)
#define MTK_WED_RESET_WDMA_RX_DRV BIT(17)
#define MTK_WED_RESET_WDMA_INT_AGENT BIT(19)
@@ -2332,7 +2309,7 @@
#define MTK_WED_RESET_WED BIT(31)
#define MTK_WED_CTRL 0x00c
-@@ -52,8 +58,12 @@ struct mtk_wdma_desc {
+@@ -53,8 +58,12 @@ struct mtk_wdma_desc {
#define MTK_WED_CTRL_WED_TX_BM_BUSY BIT(9)
#define MTK_WED_CTRL_WED_TX_FREE_AGENT_EN BIT(10)
#define MTK_WED_CTRL_WED_TX_FREE_AGENT_BUSY BIT(11)
@@ -2347,7 +2324,7 @@
#define MTK_WED_CTRL_FINAL_DIDX_READ BIT(24)
#define MTK_WED_CTRL_ETH_DMAD_FMT BIT(25)
#define MTK_WED_CTRL_MIB_READ_CLEAR BIT(28)
-@@ -68,8 +78,8 @@ struct mtk_wdma_desc {
+@@ -69,8 +78,8 @@ struct mtk_wdma_desc {
#define MTK_WED_EXT_INT_STATUS_TX_TKID_LO_TH BIT(10)
#define MTK_WED_EXT_INT_STATUS_TX_TKID_HI_TH BIT(11)
#endif
@@ -2358,7 +2335,7 @@
#define MTK_WED_EXT_INT_STATUS_RX_DRV_R_RESP_ERR BIT(16)
#define MTK_WED_EXT_INT_STATUS_RX_DRV_W_RESP_ERR BIT(17)
#define MTK_WED_EXT_INT_STATUS_RX_DRV_COHERENT BIT(18)
-@@ -86,8 +96,8 @@ struct mtk_wdma_desc {
+@@ -87,8 +96,8 @@ struct mtk_wdma_desc {
#define MTK_WED_EXT_INT_STATUS_ERROR_MASK (MTK_WED_EXT_INT_STATUS_TF_LEN_ERR | \
MTK_WED_EXT_INT_STATUS_TKID_WO_PYLD | \
MTK_WED_EXT_INT_STATUS_TKID_TITO_INVALID | \
@@ -2369,7 +2346,7 @@
MTK_WED_EXT_INT_STATUS_RX_DRV_R_RESP_ERR | \
MTK_WED_EXT_INT_STATUS_RX_DRV_W_RESP_ERR | \
MTK_WED_EXT_INT_STATUS_RX_DRV_COHERENT | \
-@@ -96,6 +106,8 @@ struct mtk_wdma_desc {
+@@ -97,6 +106,8 @@ struct mtk_wdma_desc {
MTK_WED_EXT_INT_STATUS_TX_DMA_W_RESP_ERR)
#define MTK_WED_EXT_INT_MASK 0x028
@@ -2378,7 +2355,7 @@
#define MTK_WED_STATUS 0x060
#define MTK_WED_STATUS_TX GENMASK(15, 8)
-@@ -183,6 +195,9 @@ struct mtk_wdma_desc {
+@@ -184,6 +195,9 @@ struct mtk_wdma_desc {
#define MTK_WED_RING_RX(_n) (0x400 + (_n) * 0x10)
@@ -2388,7 +2365,7 @@
#define MTK_WED_WPDMA_INT_TRIGGER 0x504
#define MTK_WED_WPDMA_INT_TRIGGER_RX_DONE BIT(1)
#define MTK_WED_WPDMA_INT_TRIGGER_TX_DONE GENMASK(5, 4)
-@@ -239,13 +254,19 @@ struct mtk_wdma_desc {
+@@ -240,13 +254,19 @@ struct mtk_wdma_desc {
#define MTK_WED_WPDMA_INT_CTRL_TX 0x530
#define MTK_WED_WPDMA_INT_CTRL_TX0_DONE_EN BIT(0)
@@ -2409,7 +2386,7 @@
#define MTK_WED_WPDMA_INT_CTRL_TX_FREE 0x538
#define MTK_WED_WPDMA_INT_CTRL_TX_FREE_DONE_EN BIT(0)
-@@ -270,13 +291,40 @@ struct mtk_wdma_desc {
+@@ -271,13 +291,40 @@ struct mtk_wdma_desc {
#define MTK_WED_WPDMA_TX_MIB(_n) (0x5a0 + (_n) * 4)
#define MTK_WED_WPDMA_TX_COHERENT_MIB(_n) (0x5d0 + (_n) * 4)
@@ -2450,7 +2427,7 @@
#define MTK_WED_WDMA_GLO_CFG_RX_DRV_EN BIT(2)
#define MTK_WED_WDMA_GLO_CFG_RX_DRV_BUSY BIT(3)
#define MTK_WED_WDMA_GLO_CFG_BT_SIZE GENMASK(5, 4)
-@@ -320,6 +368,20 @@ struct mtk_wdma_desc {
+@@ -321,6 +368,20 @@ struct mtk_wdma_desc {
#define MTK_WED_WDMA_RX_RECYCLE_MIB(_n) (0xae8 + (_n) * 4)
#define MTK_WED_WDMA_RX_PROCESSED_MIB(_n) (0xaf0 + (_n) * 4)
@@ -2471,7 +2448,7 @@
#define MTK_WED_RING_OFS_BASE 0x00
#define MTK_WED_RING_OFS_COUNT 0x04
#define MTK_WED_RING_OFS_CPU_IDX 0x08
-@@ -330,12 +392,13 @@ struct mtk_wdma_desc {
+@@ -331,12 +392,13 @@ struct mtk_wdma_desc {
#define MTK_WDMA_GLO_CFG 0x204
#define MTK_WDMA_GLO_CFG_TX_DMA_EN BIT(0)
@@ -2486,7 +2463,7 @@
#define MTK_WDMA_RESET_IDX 0x208
#define MTK_WDMA_RESET_IDX_TX GENMASK(3, 0)
#define MTK_WDMA_RESET_IDX_RX GENMASK(17, 16)
-@@ -359,4 +422,70 @@ struct mtk_wdma_desc {
+@@ -360,4 +422,70 @@ struct mtk_wdma_desc {
/* DMA channel mapping */
#define HIFSYS_DMA_AG_MAP 0x008
@@ -2559,7 +2536,7 @@
#endif
diff --git a/drivers/net/ethernet/mediatek/mtk_wed_wo.c b/drivers/net/ethernet/mediatek/mtk_wed_wo.c
new file mode 100644
-index 000000000..67dcffb26
+index 0000000..8434272
--- /dev/null
+++ b/drivers/net/ethernet/mediatek/mtk_wed_wo.c
@@ -0,0 +1,573 @@
@@ -3138,7 +3115,7 @@
+}
diff --git a/drivers/net/ethernet/mediatek/mtk_wed_wo.h b/drivers/net/ethernet/mediatek/mtk_wed_wo.h
new file mode 100644
-index 000000000..d962e3a33
+index 0000000..5824f39
--- /dev/null
+++ b/drivers/net/ethernet/mediatek/mtk_wed_wo.h
@@ -0,0 +1,327 @@
@@ -3470,7 +3447,7 @@
+#endif
+
diff --git a/include/linux/soc/mediatek/mtk_wed.h b/include/linux/soc/mediatek/mtk_wed.h
-index ffd547a4c..c74dd4aad 100644
+index 631360b..393f3ca 100644
--- a/include/linux/soc/mediatek/mtk_wed.h
+++ b/include/linux/soc/mediatek/mtk_wed.h
@@ -7,6 +7,9 @@
@@ -3517,12 +3494,7 @@
struct mtk_wed_device {
#ifdef CONFIG_NET_MEDIATEK_SOC_WED
const struct mtk_wed_ops *ops;
-@@ -42,39 +63,59 @@ struct mtk_wed_device {
- int wdma_idx;
- int irq;
- u8 ver;
-+ u32 rev_id;
-
+@@ -47,35 +77,54 @@ struct mtk_wed_device {
struct mtk_wed_ring tx_ring[MTK_WED_TX_QUEUES];
struct mtk_wed_ring txfree_ring;
struct mtk_wed_ring tx_wdma[MTK_WED_TX_QUEUES];
@@ -3582,7 +3554,7 @@
} wlan;
#endif
};
-@@ -85,6 +126,10 @@ struct mtk_wed_ops {
+@@ -86,6 +135,10 @@ struct mtk_wed_ops {
void __iomem *regs);
int (*txfree_ring_setup)(struct mtk_wed_device *dev,
void __iomem *regs);
@@ -3593,7 +3565,7 @@
void (*detach)(struct mtk_wed_device *dev);
void (*stop)(struct mtk_wed_device *dev);
-@@ -96,6 +141,8 @@ struct mtk_wed_ops {
+@@ -97,6 +150,8 @@ struct mtk_wed_ops {
u32 (*irq_get)(struct mtk_wed_device *dev, u32 mask);
void (*irq_set_mask)(struct mtk_wed_device *dev, u32 mask);
@@ -3602,7 +3574,7 @@
};
extern const struct mtk_wed_ops __rcu *mtk_soc_wed_ops;
-@@ -128,6 +175,10 @@ mtk_wed_device_attach(struct mtk_wed_device *dev)
+@@ -129,6 +184,10 @@ mtk_wed_device_attach(struct mtk_wed_device *dev)
(_dev)->ops->tx_ring_setup(_dev, _ring, _regs)
#define mtk_wed_device_txfree_ring_setup(_dev, _regs) \
(_dev)->ops->txfree_ring_setup(_dev, _regs)
@@ -3613,7 +3585,7 @@
#define mtk_wed_device_reg_read(_dev, _reg) \
(_dev)->ops->reg_read(_dev, _reg)
#define mtk_wed_device_reg_write(_dev, _reg, _val) \
-@@ -136,6 +187,8 @@ mtk_wed_device_attach(struct mtk_wed_device *dev)
+@@ -137,6 +196,8 @@ mtk_wed_device_attach(struct mtk_wed_device *dev)
(_dev)->ops->irq_get(_dev, _mask)
#define mtk_wed_device_irq_set_mask(_dev, _mask) \
(_dev)->ops->irq_set_mask(_dev, _mask)
@@ -3622,7 +3594,7 @@
#else
static inline bool mtk_wed_device_active(struct mtk_wed_device *dev)
{
-@@ -145,10 +198,13 @@ static inline bool mtk_wed_device_active(struct mtk_wed_device *dev)
+@@ -146,10 +207,13 @@ static inline bool mtk_wed_device_active(struct mtk_wed_device *dev)
#define mtk_wed_device_start(_dev, _mask) do {} while (0)
#define mtk_wed_device_tx_ring_setup(_dev, _ring, _regs) -ENODEV
#define mtk_wed_device_txfree_ring_setup(_dev, _ring, _regs) -ENODEV
@@ -3637,5 +3609,5 @@
#endif
--
-2.32.0
+2.18.0
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9999-flow-offload-add-mtkhnat-qdma-qos.patch b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9999-flow-offload-add-mtkhnat-qdma-qos.patch
new file mode 100644
index 0000000..f5a1b03
--- /dev/null
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9999-flow-offload-add-mtkhnat-qdma-qos.patch
@@ -0,0 +1,670 @@
+diff --git a/drivers/net/ethernet/mediatek/Makefile b/drivers/net/ethernet/mediatek/Makefile
+index 0c724a5..93cd55f 100644
+--- a/drivers/net/ethernet/mediatek/Makefile
++++ b/drivers/net/ethernet/mediatek/Makefile
+@@ -5,7 +5,7 @@
+
+ obj-$(CONFIG_NET_MEDIATEK_SOC) += mtk_eth.o
+ mtk_eth-y := mtk_eth_soc.o mtk_sgmii.o mtk_eth_path.o mtk_eth_dbg.o mtk_eth_reset.o \
+- mtk_ppe.o mtk_ppe_debugfs.o mtk_ppe_offload.o
++ mtk_ppe.o mtk_ppe_debugfs.o mtk_ppe_offload.o mtk_qdma_debugfs.o
+ mtk_eth-$(CONFIG_NET_MEDIATEK_SOC_WED) += mtk_wed.o
+ ifdef CONFIG_DEBUG_FS
+ mtk_eth-$(CONFIG_NET_MEDIATEK_SOC_WED) += mtk_wed_debugfs.o
+diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+index efdd2e6..9ffc46b 100644
+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+@@ -3992,6 +3992,8 @@ static int mtk_probe(struct platform_device *pdev)
+ }
+
+ mtk_ppe_debugfs_init(eth);
++
++ mtk_qdma_debugfs_init(eth);
+ }
+
+ for (i = 0; i < MTK_MAX_DEVS; i++) {
+@@ -4101,6 +4103,7 @@ static const struct mtk_soc_data mt2701_data = {
+ .rxd_size = sizeof(struct mtk_rx_dma),
+ .dma_max_len = MTK_TX_DMA_BUF_LEN,
+ .dma_len_offset = MTK_TX_DMA_BUF_SHIFT,
++ .qdma_tx_sch = 2,
+ },
+ };
+
+@@ -4118,6 +4121,7 @@ static const struct mtk_soc_data mt7621_data = {
+ .rxd_size = sizeof(struct mtk_rx_dma),
+ .dma_max_len = MTK_TX_DMA_BUF_LEN,
+ .dma_len_offset = MTK_TX_DMA_BUF_SHIFT,
++ .qdma_tx_sch = 2,
+ },
+ };
+
+@@ -4136,6 +4140,7 @@ static const struct mtk_soc_data mt7622_data = {
+ .rxd_size = sizeof(struct mtk_rx_dma),
+ .dma_max_len = MTK_TX_DMA_BUF_LEN,
+ .dma_len_offset = MTK_TX_DMA_BUF_SHIFT,
++ .qdma_tx_sch = 2,
+ },
+ };
+
+@@ -4153,6 +4158,7 @@ static const struct mtk_soc_data mt7623_data = {
+ .rxd_size = sizeof(struct mtk_rx_dma),
+ .dma_max_len = MTK_TX_DMA_BUF_LEN,
+ .dma_len_offset = MTK_TX_DMA_BUF_SHIFT,
++ .qdma_tx_sch = 2,
+ },
+ };
+
+@@ -4187,6 +4193,7 @@ static const struct mtk_soc_data mt7986_data = {
+ .rxd_size = sizeof(struct mtk_rx_dma_v2),
+ .dma_max_len = MTK_TX_DMA_BUF_LEN_V2,
+ .dma_len_offset = MTK_TX_DMA_BUF_SHIFT_V2,
++ .qdma_tx_sch = 4,
+ },
+ };
+
+@@ -4205,6 +4212,7 @@ static const struct mtk_soc_data mt7981_data = {
+ .rxd_size = sizeof(struct mtk_rx_dma_v2),
+ .dma_max_len = MTK_TX_DMA_BUF_LEN_V2,
+ .dma_len_offset = MTK_TX_DMA_BUF_SHIFT_V2,
++ .qdma_tx_sch = 4,
+ },
+ };
+
+@@ -4220,6 +4228,7 @@ static const struct mtk_soc_data rt5350_data = {
+ .rxd_size = sizeof(struct mtk_rx_dma),
+ .dma_max_len = MTK_TX_DMA_BUF_LEN,
+ .dma_len_offset = MTK_TX_DMA_BUF_SHIFT,
++ .qdma_tx_sch = 4,
+ },
+ };
+
+diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+index c87a823..955bb27 100644
+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+@@ -352,10 +352,21 @@
+
+ /* QDMA TX Queue Configuration Registers */
+ #define MTK_QTX_CFG(x) (QDMA_BASE + (x * 0x10))
++#define MTK_QTX_CFG_HW_RESV_CNT_OFFSET GENMASK(15, 8)
++#define MTK_QTX_CFG_SW_RESV_CNT_OFFSET GENMASK(7, 0)
+ #define QDMA_RES_THRES 4
+
+ /* QDMA TX Queue Scheduler Registers */
+ #define MTK_QTX_SCH(x) (QDMA_BASE + 4 + (x * 0x10))
++#define MTK_QTX_SCH_TX_SCH_SEL BIT(31)
++#define MTK_QTX_SCH_TX_SCH_SEL_V2 GENMASK(31, 30)
++#define MTK_QTX_SCH_MIN_RATE_EN BIT(27)
++#define MTK_QTX_SCH_MIN_RATE_MAN GENMASK(26, 20)
++#define MTK_QTX_SCH_MIN_RATE_EXP GENMASK(19, 16)
++#define MTK_QTX_SCH_MAX_RATE_WGHT GENMASK(15, 12)
++#define MTK_QTX_SCH_MAX_RATE_EN BIT(11)
++#define MTK_QTX_SCH_MAX_RATE_MAN GENMASK(10, 4)
++#define MTK_QTX_SCH_MAX_RATE_EXP GENMASK(3, 0)
+
+ /* QDMA RX Base Pointer Register */
+ #define MTK_QRX_BASE_PTR0 (QDMA_BASE + 0x100)
+@@ -373,7 +384,9 @@
+ #define MTK_QRX_DRX_IDX0 (QDMA_BASE + 0x10c)
+
+ /* QDMA Page Configuration Register */
+-#define MTK_QDMA_PAGE (QDMA_BASE + 0x1f0)
++#define MTK_QDMA_PAGE (QDMA_BASE + 0x1f0)
++#define MTK_QTX_CFG_PAGE GENMASK(3, 0)
++#define MTK_QTX_PER_PAGE (16)
+
+ /* QDMA Global Configuration Register */
+ #define MTK_QDMA_GLO_CFG (QDMA_BASE + 0x204)
+@@ -410,6 +423,9 @@
+ #define FC_THRES_DROP_EN (7 << 16)
+ #define FC_THRES_MIN 0x4444
+
++/* QDMA TX Scheduler Rate Control Register */
++#define MTK_QDMA_TX_2SCH_BASE (QDMA_BASE + 0x214)
++
+ /* QDMA Interrupt Status Register */
+ #define MTK_QDMA_INT_STATUS (QDMA_BASE + 0x218)
+ #if defined(CONFIG_MEDIATEK_NETSYS_V2)
+@@ -444,6 +460,11 @@
+ /* QDMA Interrupt Mask Register */
+ #define MTK_QDMA_HRED2 (QDMA_BASE + 0x244)
+
++/* QDMA TX Queue MIB Interface Register */
++#define MTK_QTX_MIB_IF (QDMA_BASE + 0x2bc)
++#define MTK_MIB_ON_QTX_CFG BIT(31)
++#define MTK_VQTX_MIB_EN BIT(28)
++
+ /* QDMA TX Forward CPU Pointer Register */
+ #define MTK_QTX_CTX_PTR (QDMA_BASE +0x300)
+
+@@ -471,6 +492,14 @@
+ /* QDMA FQ Free Page Buffer Length Register */
+ #define MTK_QDMA_FQ_BLEN (QDMA_BASE +0x32c)
+
++/* QDMA TX Scheduler Rate Control Register */
++#define MTK_QDMA_TX_4SCH_BASE(x) (QDMA_BASE + 0x398 + (((x) >> 1) * 0x4))
++#define MTK_QDMA_TX_SCH_MASK GENMASK(15, 0)
++#define MTK_QDMA_TX_SCH_MAX_WFQ BIT(15)
++#define MTK_QDMA_TX_SCH_RATE_EN BIT(11)
++#define MTK_QDMA_TX_SCH_RATE_MAN GENMASK(10, 4)
++#define MTK_QDMA_TX_SCH_RATE_EXP GENMASK(3, 0)
++
+ /* WDMA Registers */
+ #define MTK_WDMA_DTX_PTR(x) (WDMA_BASE(x) + 0xC)
+ #define MTK_WDMA_GLO_CFG(x) (WDMA_BASE(x) + 0x204)
+@@ -1223,6 +1252,7 @@ struct mtk_soc_data {
+ u32 rxd_size;
+ u32 dma_max_len;
+ u32 dma_len_offset;
++ u32 qdma_tx_sch;
+ } txrx;
+ };
+
+@@ -1353,6 +1383,7 @@ struct mtk_eth {
+ spinlock_t syscfg0_lock;
+ struct timer_list mtk_dma_monitor_timer;
+
++ u8 qos_mode;
+ u8 ppe_num;
+ struct mtk_ppe *ppe[MTK_MAX_PPE_NUM];
+ struct rhashtable flow_table;
+@@ -1412,4 +1443,6 @@ void mtk_eth_set_dma_device(struct mtk_eth *eth, struct device *dma_dev);
+
+ int mtk_ppe_debugfs_init(struct mtk_eth *eth);
+
++int mtk_qdma_debugfs_init(struct mtk_eth *eth);
++
+ #endif /* MTK_ETH_H */
+diff --git a/drivers/net/ethernet/mediatek/mtk_ppe.c b/drivers/net/ethernet/mediatek/mtk_ppe.c
+index a49275f..1767823 100755
+--- a/drivers/net/ethernet/mediatek/mtk_ppe.c
++++ b/drivers/net/ethernet/mediatek/mtk_ppe.c
+@@ -406,6 +406,16 @@ int mtk_foe_entry_set_wdma(struct mtk_foe_entry *entry, int wdma_idx, int txq,
+ return 0;
+ }
+
++int mtk_foe_entry_set_qid(struct mtk_foe_entry *entry, int qid)
++{
++ u32 *ib2 = mtk_foe_entry_ib2(entry);
++
++ *ib2 &= ~MTK_FOE_IB2_QID;
++ *ib2 |= FIELD_PREP(MTK_FOE_IB2_QID, qid);
++ *ib2 |= MTK_FOE_IB2_PSE_QOS;
++
++ return 0;
++}
+ static inline bool mtk_foe_entry_usable(struct mtk_foe_entry *entry)
+ {
+ return !(entry->ib1 & MTK_FOE_IB1_STATIC) &&
+diff --git a/drivers/net/ethernet/mediatek/mtk_ppe.h b/drivers/net/ethernet/mediatek/mtk_ppe.h
+index 8076e5d..c46c4d9 100644
+--- a/drivers/net/ethernet/mediatek/mtk_ppe.h
++++ b/drivers/net/ethernet/mediatek/mtk_ppe.h
+@@ -356,6 +356,7 @@ int mtk_foe_entry_set_vlan(struct mtk_foe_entry *entry, int vid);
+ int mtk_foe_entry_set_pppoe(struct mtk_foe_entry *entry, int sid);
+ int mtk_foe_entry_set_wdma(struct mtk_foe_entry *entry, int wdma_idx, int txq,
+ int bss, int wcid);
++int mtk_foe_entry_set_qid(struct mtk_foe_entry *entry, int qid);
+ int mtk_foe_entry_commit(struct mtk_ppe *ppe, struct mtk_flow_entry *entry);
+ void mtk_foe_entry_clear(struct mtk_ppe *ppe, struct mtk_flow_entry *entry);
+ int mtk_foe_entry_idle_time(struct mtk_ppe *ppe, struct mtk_flow_entry *entry);
+diff --git a/drivers/net/ethernet/mediatek/mtk_ppe_offload.c b/drivers/net/ethernet/mediatek/mtk_ppe_offload.c
+index f258539..3b17819 100755
+--- a/drivers/net/ethernet/mediatek/mtk_ppe_offload.c
++++ b/drivers/net/ethernet/mediatek/mtk_ppe_offload.c
+@@ -203,9 +203,13 @@ mtk_flow_set_output_device(struct mtk_eth *eth, struct mtk_foe_entry *foe,
+ }
+
+ dsa_port = mtk_flow_get_dsa_port(&dev);
+- if (dsa_port >= 0)
++ if (dsa_port >= 0) {
+ mtk_foe_entry_set_dsa(foe, dsa_port);
+
++ if (eth->qos_mode == 2)
++ mtk_foe_entry_set_qid(foe, dsa_port);
++ }
++
+ if (dev == eth->netdev[0])
+ pse_port = 1;
+ else if (dev == eth->netdev[1])
+diff --git a/drivers/net/ethernet/mediatek/mtk_qdma_debugfs.c b/drivers/net/ethernet/mediatek/mtk_qdma_debugfs.c
+new file mode 100644
+index 0000000..198b924
+--- /dev/null
++++ b/drivers/net/ethernet/mediatek/mtk_qdma_debugfs.c
+@@ -0,0 +1,433 @@
++/* SPDX-License-Identifier: GPL-2.0
++ *
++ * Copyright (c) 2022 MediaTek Inc.
++ * Author: Henry Yen <henry.yen@mediatek.com>
++ * Bo-Cun Chen <bc-bocun.chen@mediatek.com>
++ */
++
++#include <linux/kernel.h>
++#include <linux/debugfs.h>
++#include "mtk_eth_soc.h"
++
++#define MAX_PPPQ_PORT_NUM 6
++
++static struct mtk_eth *_eth;
++
++static void mtk_qdma_qos_shaper_ebl(struct mtk_eth *eth, u32 id, u32 enable)
++{
++ u32 val;
++
++ if (enable) {
++ val = MTK_QTX_SCH_MIN_RATE_EN | MTK_QTX_SCH_MAX_RATE_EN;
++ val |= FIELD_PREP(MTK_QTX_SCH_MIN_RATE_MAN, 1) |
++ FIELD_PREP(MTK_QTX_SCH_MIN_RATE_EXP, 4) |
++ FIELD_PREP(MTK_QTX_SCH_MAX_RATE_MAN, 25) |
++ FIELD_PREP(MTK_QTX_SCH_MAX_RATE_EXP, 5) |
++ FIELD_PREP(MTK_QTX_SCH_MAX_RATE_WGHT, 4);
++
++ writel(val, eth->base + MTK_QTX_SCH(id % MTK_QTX_PER_PAGE));
++ } else {
++ writel(0, eth->base + MTK_QTX_SCH(id % MTK_QTX_PER_PAGE));
++ }
++}
++
++static void mtk_qdma_qos_disable(struct mtk_eth *eth)
++{
++ u32 id, val;
++
++ for (id = 0; id < MAX_PPPQ_PORT_NUM; id++) {
++ mtk_qdma_qos_shaper_ebl(eth, id, 0);
++
++ writel(FIELD_PREP(MTK_QTX_CFG_HW_RESV_CNT_OFFSET, 4) |
++ FIELD_PREP(MTK_QTX_CFG_SW_RESV_CNT_OFFSET, 4),
++ eth->base + MTK_QTX_CFG(id % MTK_QTX_PER_PAGE));
++ }
++
++ val = (MTK_QDMA_TX_SCH_MAX_WFQ) | (MTK_QDMA_TX_SCH_MAX_WFQ << 16);
++ for (id = 0; id < eth->soc->txrx.qdma_tx_sch; id += 2) {
++ if (eth->soc->txrx.qdma_tx_sch == 4)
++ writel(val, eth->base + MTK_QDMA_TX_4SCH_BASE(id));
++ else
++ writel(val, eth->base + MTK_QDMA_TX_2SCH_BASE);
++ }
++}
++
++static void mtk_qdma_qos_pppq_enable(struct mtk_eth *eth)
++{
++ u32 id, val;
++
++ for (id = 0; id < MAX_PPPQ_PORT_NUM; id++) {
++ mtk_qdma_qos_shaper_ebl(eth, id, 1);
++
++ writel(FIELD_PREP(MTK_QTX_CFG_HW_RESV_CNT_OFFSET, 4) |
++ FIELD_PREP(MTK_QTX_CFG_SW_RESV_CNT_OFFSET, 4),
++ eth->base + MTK_QTX_CFG(id % MTK_QTX_PER_PAGE));
++ }
++
++ val = (MTK_QDMA_TX_SCH_MAX_WFQ) | (MTK_QDMA_TX_SCH_MAX_WFQ << 16);
++ for (id = 0; id < eth->soc->txrx.qdma_tx_sch; id+= 2) {
++ if (eth->soc->txrx.qdma_tx_sch == 4)
++ writel(val, eth->base + MTK_QDMA_TX_4SCH_BASE(id));
++ else
++ writel(val, eth->base + MTK_QDMA_TX_2SCH_BASE);
++ }
++}
++
++ static ssize_t mtk_qmda_debugfs_write_qos(struct file *file, const char __user *buffer,
++ size_t count, loff_t *data)
++{
++ struct seq_file *m = file->private_data;
++ struct mtk_eth *eth = m->private;
++ char buf[8];
++ int len = count;
++
++ if ((len > 8) || copy_from_user(buf, buffer, len))
++ return -EFAULT;
++
++ if (buf[0] == '0') {
++ pr_info("HQoS is going to be disabled !\n");
++ eth->qos_mode = 0;
++ mtk_qdma_qos_disable(eth);
++ } else if (buf[0] == '1') {
++ pr_info("HQoS mode is going to be enabled !\n");
++ eth->qos_mode = 1;
++ } else if (buf[0] == '2') {
++ pr_info("Per-port-per-queue mode is going to be enabled !\n");
++ pr_info("PPPQ use qid 0~5 (scheduler 0).\n");
++ eth->qos_mode = 2;
++ mtk_qdma_qos_pppq_enable(eth);
++ }
++
++ return len;
++}
++
++static int mtk_qmda_debugfs_read_qos(struct seq_file *m, void *private)
++{
++ struct mtk_eth *eth = m->private;
++
++ seq_printf(m, "value=%d, HQoS is %s now!\n",
++ eth->qos_mode, (eth->qos_mode) ? "enabled" : "disabled");
++
++ return 0;
++}
++
++static int mtk_qmda_debugfs_open_qos(struct inode *inode, struct file *file)
++{
++ return single_open(file, mtk_qmda_debugfs_read_qos,
++ inode->i_private);
++}
++
++static ssize_t mtk_qmda_debugfs_read_qos_sched(struct file *file, char __user *user_buf,
++ size_t count, loff_t *ppos)
++{
++ struct mtk_eth *eth = _eth;
++ long id = (long)file->private_data;
++ char *buf;
++ unsigned int len = 0, buf_len = 1500;
++ int enable, scheduling, max_rate, scheduler, i;
++ ssize_t ret_cnt;
++ u32 val;
++
++ buf = kzalloc(buf_len, GFP_KERNEL);
++ if (!buf)
++ return -ENOMEM;
++
++ if (eth->soc->txrx.qdma_tx_sch == 4)
++ val = readl(eth->base + MTK_QDMA_TX_4SCH_BASE(id));
++ else
++ val = readl(eth->base + MTK_QDMA_TX_2SCH_BASE);
++
++ if (id & 0x1)
++ val >>= 16;
++
++ enable = FIELD_GET(MTK_QDMA_TX_SCH_RATE_EN, val);
++ scheduling = FIELD_GET(MTK_QDMA_TX_SCH_MAX_WFQ, val);
++ max_rate = FIELD_GET(MTK_QDMA_TX_SCH_RATE_MAN, val);
++ while (val--)
++ max_rate *= 10;
++
++ len += scnprintf(buf + len, buf_len - len,
++ "EN\tScheduling\tMAX\tQueue#\n%d\t%s%16d\t", enable,
++ (scheduling == 1) ? "WRR" : "SP", max_rate);
++
++ for (i = 0; i < MTK_QDMA_TX_NUM; i++) {
++ val = readl(eth->base + MTK_QDMA_PAGE) & ~MTK_QTX_CFG_PAGE;
++ val |= FIELD_PREP(MTK_QTX_CFG_PAGE, i / MTK_QTX_PER_PAGE);
++ writel(val, eth->base + MTK_QDMA_PAGE);
++
++ val = readl(eth->base + MTK_QTX_SCH(i % MTK_QTX_PER_PAGE));
++ if (eth->soc->txrx.qdma_tx_sch == 4)
++ scheduler = FIELD_GET(MTK_QTX_SCH_TX_SCH_SEL_V2, val);
++ else
++ scheduler = FIELD_GET(MTK_QTX_SCH_TX_SCH_SEL, val);
++ if (id == scheduler)
++ len += scnprintf(buf + len, buf_len - len, "%d ", i);
++ }
++
++ len += scnprintf(buf + len, buf_len - len, "\n");
++ if (len > buf_len)
++ len = buf_len;
++
++ ret_cnt = simple_read_from_buffer(user_buf, count, ppos, buf, len);
++
++ kfree(buf);
++ return ret_cnt;
++}
++
++static ssize_t mtk_qmda_debugfs_write_qos_sched(struct file *file, const char __user *buf,
++ size_t length, loff_t *offset)
++{
++ struct mtk_eth *eth = _eth;
++ long id = (long)file->private_data;
++ char line[64] = {0}, scheduling[32];
++ int enable, rate, exp = 0, shift = 0;
++ size_t size;
++ u32 val = 0;
++
++ if (length >= sizeof(line))
++ return -EINVAL;
++
++ if (copy_from_user(line, buf, length))
++ return -EFAULT;
++
++ if (sscanf(line, "%d %s %d", &enable, scheduling, &rate) != 3)
++ return -EFAULT;
++
++ while (rate > 127) {
++ rate /= 10;
++ exp++;
++ }
++
++ line[length] = '\0';
++
++ if (enable)
++ val |= FIELD_PREP(MTK_QDMA_TX_SCH_RATE_EN, 1);
++ if (strcmp(scheduling, "sp") != 0)
++ val |= FIELD_PREP(MTK_QDMA_TX_SCH_MAX_WFQ, 1);
++ val |= FIELD_PREP(MTK_QDMA_TX_SCH_RATE_MAN, rate);
++ val |= FIELD_PREP(MTK_QDMA_TX_SCH_RATE_EXP, exp);
++
++ if (id & 0x1)
++ shift = 16;
++
++ if (eth->soc->txrx.qdma_tx_sch == 4)
++ val = readl(eth->base+ MTK_QDMA_TX_4SCH_BASE(id));
++ else
++ val = readl(eth->base + MTK_QDMA_TX_2SCH_BASE);
++
++ val &= ~(MTK_QDMA_TX_SCH_MASK << shift);
++ val |= val << shift;
++ if (eth->soc->txrx.qdma_tx_sch == 4)
++ writel(val, eth->base + MTK_QDMA_TX_4SCH_BASE(id));
++ else
++ writel(val, eth->base + MTK_QDMA_TX_2SCH_BASE);
++
++ size = strlen(line);
++ *offset += size;
++
++ return length;
++}
++
++static ssize_t mtk_qmda_debugfs_read_qos_queue(struct file *file, char __user *user_buf,
++ size_t count, loff_t *ppos)
++{
++ struct mtk_eth *eth = _eth;
++ long id = (long)file->private_data;
++ char *buf;
++ unsigned int len = 0, buf_len = 1500;
++ int min_rate_en, min_rate, min_rate_exp;
++ int max_rate_en, max_weight, max_rate, max_rate_exp;
++ u32 qtx_sch, qtx_cfg, scheduler, val;
++ ssize_t ret_cnt;
++
++ buf = kzalloc(buf_len, GFP_KERNEL);
++ if (!buf)
++ return -ENOMEM;
++
++ val = readl(eth->base + MTK_QDMA_PAGE) & ~MTK_QTX_CFG_PAGE;
++ val |= FIELD_PREP(MTK_QTX_CFG_PAGE, id / MTK_QTX_PER_PAGE);
++ writel(val, eth->base + MTK_QDMA_PAGE);
++
++ qtx_cfg = readl(eth->base + MTK_QTX_CFG(id % MTK_QTX_PER_PAGE));
++ qtx_sch = readl(eth->base + MTK_QTX_SCH(id % MTK_QTX_PER_PAGE));
++ if (eth->soc->txrx.qdma_tx_sch == 4)
++ scheduler = FIELD_GET(MTK_QTX_SCH_TX_SCH_SEL_V2, qtx_sch);
++ else
++ scheduler = FIELD_GET(MTK_QTX_SCH_TX_SCH_SEL, qtx_sch);
++
++ min_rate_en = FIELD_GET(MTK_QTX_SCH_MIN_RATE_EN, qtx_sch);
++ min_rate = FIELD_GET(MTK_QTX_SCH_MIN_RATE_MAN, qtx_sch);
++ min_rate_exp = FIELD_GET(MTK_QTX_SCH_MIN_RATE_EXP, qtx_sch);
++ max_rate_en = FIELD_GET(MTK_QTX_SCH_MAX_RATE_EN, qtx_sch);
++ max_weight = FIELD_GET(MTK_QTX_SCH_MAX_RATE_WGHT, qtx_sch);
++ max_rate = FIELD_GET(MTK_QTX_SCH_MAX_RATE_MAN, qtx_sch);
++ max_rate_exp = FIELD_GET(MTK_QTX_SCH_MAX_RATE_EXP, qtx_sch);
++ while (min_rate_exp--)
++ min_rate *= 10;
++
++ while (max_rate_exp--)
++ max_rate *= 10;
++
++ len += scnprintf(buf + len, buf_len - len,
++ "scheduler: %d\nhw resv: %d\nsw resv: %d\n", scheduler,
++ (qtx_cfg >> 8) & 0xff, qtx_cfg & 0xff);
++
++ /* Switch to debug mode */
++ val = readl(eth->base + MTK_QTX_MIB_IF) & ~MTK_MIB_ON_QTX_CFG;
++ val |= MTK_MIB_ON_QTX_CFG;
++ writel(val, eth->base + MTK_QTX_MIB_IF);
++
++ val = readl(eth->base + MTK_QTX_MIB_IF) & ~MTK_VQTX_MIB_EN;
++ val |= MTK_VQTX_MIB_EN;
++ writel(val, eth->base + MTK_QTX_MIB_IF);
++
++ qtx_cfg = readl(eth->base + MTK_QTX_CFG(id % MTK_QTX_PER_PAGE));
++ qtx_sch = readl(eth->base + MTK_QTX_SCH(id % MTK_QTX_PER_PAGE));
++
++ len += scnprintf(buf + len, buf_len - len,
++ "packet count: %u\n", qtx_cfg);
++ len += scnprintf(buf + len, buf_len - len,
++ "packet drop: %u\n\n", qtx_sch);
++
++ /* Recover to normal mode */
++ val = readl(eth->base + MTK_QTX_MIB_IF);
++ val &= ~MTK_MIB_ON_QTX_CFG;
++ writel(val, eth->base + MTK_QTX_MIB_IF);
++
++ val = readl(eth->base + MTK_QTX_MIB_IF);
++ val &= ~MTK_VQTX_MIB_EN;
++ writel(val, eth->base + MTK_QTX_MIB_IF);
++
++ len += scnprintf(buf + len, buf_len - len,
++ " EN RATE WEIGHT\n");
++ len += scnprintf(buf + len, buf_len - len,
++ "----------------------------\n");
++ len += scnprintf(buf + len, buf_len - len,
++ "max%5d%9d%9d\n", max_rate_en, max_rate, max_weight);
++ len += scnprintf(buf + len, buf_len - len,
++ "min%5d%9d -\n", min_rate_en, min_rate);
++
++ if (len > buf_len)
++ len = buf_len;
++
++ ret_cnt = simple_read_from_buffer(user_buf, count, ppos, buf, len);
++
++ kfree(buf);
++
++ return ret_cnt;
++}
++
++static ssize_t mtk_qmda_debugfs_write_qos_queue(struct file *file, const char __user *buf,
++ size_t length, loff_t *offset)
++{
++ struct mtk_eth *eth = _eth;
++ long id = (long)file->private_data;
++ char line[64] = {0};
++ int max_enable, max_rate, max_exp = 0;
++ int min_enable, min_rate, min_exp = 0;
++ int scheduler, weight, resv;
++ size_t size;
++ u32 val;
++
++ if (length >= sizeof(line))
++ return -EINVAL;
++
++ if (copy_from_user(line, buf, length))
++ return -EFAULT;
++
++ if (sscanf(line, "%d %d %d %d %d %d %d", &scheduler, &min_enable, &min_rate,
++ &max_enable, &max_rate, &weight, &resv) != 7)
++ return -EFAULT;
++
++ line[length] = '\0';
++
++ while (max_rate > 127) {
++ max_rate /= 10;
++ max_exp++;
++ }
++
++ while (min_rate > 127) {
++ min_rate /= 10;
++ min_exp++;
++ }
++
++ val = readl(eth->base + MTK_QDMA_PAGE) & ~MTK_QTX_CFG_PAGE;
++ val |= FIELD_PREP(MTK_QTX_CFG_PAGE, id / MTK_QTX_PER_PAGE);
++ writel(val, eth->base + MTK_QDMA_PAGE);
++
++ if (eth->soc->txrx.qdma_tx_sch == 4)
++ val = FIELD_PREP(MTK_QTX_SCH_TX_SCH_SEL_V2, scheduler);
++ else
++ val = FIELD_PREP(MTK_QTX_SCH_TX_SCH_SEL, scheduler);
++ if (min_enable)
++ val |= MTK_QTX_SCH_MIN_RATE_EN;
++ val |= FIELD_PREP(MTK_QTX_SCH_MIN_RATE_MAN, min_rate);
++ val |= FIELD_PREP(MTK_QTX_SCH_MIN_RATE_EXP, min_exp);
++ if (max_enable)
++ val |= MTK_QTX_SCH_MAX_RATE_EN;
++ val |= FIELD_PREP(MTK_QTX_SCH_MAX_RATE_WGHT, weight);
++ val |= FIELD_PREP(MTK_QTX_SCH_MAX_RATE_MAN, max_rate);
++ val |= FIELD_PREP(MTK_QTX_SCH_MAX_RATE_EXP, max_exp);
++ writel(val, eth->base + MTK_QTX_SCH(id % MTK_QTX_PER_PAGE));
++
++ val = readl(eth->base + MTK_QTX_CFG(id % MTK_QTX_PER_PAGE));
++ val |= FIELD_PREP(MTK_QTX_CFG_HW_RESV_CNT_OFFSET, resv);
++ val |= FIELD_PREP(MTK_QTX_CFG_SW_RESV_CNT_OFFSET, resv);
++ writel(val, eth->base + MTK_QTX_CFG(id % MTK_QTX_PER_PAGE));
++
++ size = strlen(line);
++ *offset += size;
++
++ return length;
++}
++
++int mtk_qdma_debugfs_init(struct mtk_eth *eth)
++{
++ static const struct file_operations fops_qos = {
++ .open = mtk_qmda_debugfs_open_qos,
++ .read = seq_read,
++ .llseek = seq_lseek,
++ .write = mtk_qmda_debugfs_write_qos,
++ .release = single_release,
++ };
++
++ static const struct file_operations fops_qos_sched = {
++ .open = simple_open,
++ .read = mtk_qmda_debugfs_read_qos_sched,
++ .write = mtk_qmda_debugfs_write_qos_sched,
++ .llseek = default_llseek,
++ };
++
++ static const struct file_operations fops_qos_queue = {
++ .open = simple_open,
++ .read = mtk_qmda_debugfs_read_qos_queue,
++ .write = mtk_qmda_debugfs_write_qos_queue,
++ .llseek = default_llseek,
++ };
++
++ struct dentry *root;
++ long i;
++ char name[16];
++
++ _eth = eth;
++
++ root = debugfs_lookup("mtk_ppe", NULL);
++ if (!root)
++ return -ENOMEM;
++
++ debugfs_create_file("qos_mode", S_IRUGO, root, eth, &fops_qos);
++
++ for (i = 0; i < eth->soc->txrx.qdma_tx_sch; i++) {
++ snprintf(name, sizeof(name), "qdma_sch%ld", i);
++ debugfs_create_file(name, S_IRUGO, root, (void *)i,
++ &fops_qos_sched);
++ }
++
++ for (i = 0; i < MTK_QDMA_TX_NUM; i++) {
++ snprintf(name, sizeof(name), "qdma_txq%ld", i);
++ debugfs_create_file(name, S_IRUGO, root, (void *)i,
++ &fops_qos_queue);
++ }
++
++ return 0;
++}
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/mt7986.cfg b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/mt7986.cfg
index a028c93..a6664da 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/mt7986.cfg
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/mt7986.cfg
@@ -531,3 +531,7 @@
CONFIG_ZLIB_DEFLATE=y
CONFIG_ZLIB_INFLATE=y
CONFIG_ZONE_DMA32=y
+# CONFIG_BPF_KPROBE_OVERRIDE is not set
+# CONFIG_KPROBE_EVENTS_ON_NOTRACE is not set
+# CONFIG_PREEMPTIRQ_DELAY_TEST is not set
+# CONFIG_HIST_TRIGGERS is not set