[rdk-b][common][bsp][Refactor and sync kernel/wifi from Openwrt]
[Description]
Refactor and sync kernel/wifi from Openwrt
[Release-log]
N/A
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/generic/backport-5.4/393-v5.5-sch_cake-drop-unused-variable-tin_quantum_prio.patch b/recipes-kernel/linux/linux-mediatek-5.4/generic/backport-5.4/393-v5.5-sch_cake-drop-unused-variable-tin_quantum_prio.patch
index 6c9e8ad..70fc29f 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/generic/backport-5.4/393-v5.5-sch_cake-drop-unused-variable-tin_quantum_prio.patch
+++ b/recipes-kernel/linux/linux-mediatek-5.4/generic/backport-5.4/393-v5.5-sch_cake-drop-unused-variable-tin_quantum_prio.patch
@@ -41,7 +41,7 @@
if (b->sparse_flow_count + b->bulk_flow_count)
empty = false;
-@@ -2269,8 +2268,7 @@ static int cake_config_besteffort(struct
+@@ -2273,8 +2272,7 @@ static int cake_config_besteffort(struct
cake_set_rate(b, rate, mtu,
us_to_ns(q->target), us_to_ns(q->interval));
@@ -51,7 +51,7 @@
return 0;
}
-@@ -2281,8 +2279,7 @@ static int cake_config_precedence(struct
+@@ -2285,8 +2283,7 @@ static int cake_config_precedence(struct
struct cake_sched_data *q = qdisc_priv(sch);
u32 mtu = psched_mtu(qdisc_dev(sch));
u64 rate = q->rate_bps;
@@ -61,7 +61,7 @@
u32 i;
q->tin_cnt = 8;
-@@ -2295,18 +2292,14 @@ static int cake_config_precedence(struct
+@@ -2299,18 +2296,14 @@ static int cake_config_precedence(struct
cake_set_rate(b, rate, mtu, us_to_ns(q->target),
us_to_ns(q->interval));
@@ -83,7 +83,7 @@
}
return 0;
-@@ -2375,8 +2368,7 @@ static int cake_config_diffserv8(struct
+@@ -2379,8 +2372,7 @@ static int cake_config_diffserv8(struct
struct cake_sched_data *q = qdisc_priv(sch);
u32 mtu = psched_mtu(qdisc_dev(sch));
u64 rate = q->rate_bps;
@@ -93,7 +93,7 @@
u32 i;
q->tin_cnt = 8;
-@@ -2392,18 +2384,14 @@ static int cake_config_diffserv8(struct
+@@ -2396,18 +2388,14 @@ static int cake_config_diffserv8(struct
cake_set_rate(b, rate, mtu, us_to_ns(q->target),
us_to_ns(q->interval));
@@ -115,7 +115,7 @@
}
return 0;
-@@ -2442,17 +2430,11 @@ static int cake_config_diffserv4(struct
+@@ -2446,17 +2434,11 @@ static int cake_config_diffserv4(struct
cake_set_rate(&q->tins[3], rate >> 2, mtu,
us_to_ns(q->target), us_to_ns(q->interval));
@@ -137,7 +137,7 @@
return 0;
}
-@@ -2483,15 +2465,10 @@ static int cake_config_diffserv3(struct
+@@ -2487,15 +2469,10 @@ static int cake_config_diffserv3(struct
cake_set_rate(&q->tins[2], rate >> 2, mtu,
us_to_ns(q->target), us_to_ns(q->interval));
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/generic/backport-5.4/800-v5.5-scsi-core-Add-sysfs-attributes-for-VPD-pages-0h-and-.patch b/recipes-kernel/linux/linux-mediatek-5.4/generic/backport-5.4/800-v5.5-scsi-core-Add-sysfs-attributes-for-VPD-pages-0h-and-.patch
index 2133280..d963222 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/generic/backport-5.4/800-v5.5-scsi-core-Add-sysfs-attributes-for-VPD-pages-0h-and-.patch
+++ b/recipes-kernel/linux/linux-mediatek-5.4/generic/backport-5.4/800-v5.5-scsi-core-Add-sysfs-attributes-for-VPD-pages-0h-and-.patch
@@ -68,7 +68,7 @@
kfree(sdev->inquiry);
kfree(sdev);
-@@ -891,6 +900,8 @@ static struct bin_attribute dev_attr_vpd
+@@ -899,6 +908,8 @@ static struct bin_attribute dev_attr_vpd
sdev_vpd_pg_attr(pg83);
sdev_vpd_pg_attr(pg80);
@@ -77,7 +77,7 @@
static ssize_t show_inquiry(struct file *filep, struct kobject *kobj,
struct bin_attribute *bin_attr,
-@@ -1223,12 +1234,18 @@ static umode_t scsi_sdev_bin_attr_is_vis
+@@ -1231,12 +1242,18 @@ static umode_t scsi_sdev_bin_attr_is_vis
struct scsi_device *sdev = to_scsi_device(dev);
@@ -96,7 +96,7 @@
return S_IRUGO;
}
-@@ -1271,8 +1288,10 @@ static struct attribute *scsi_sdev_attrs
+@@ -1279,8 +1296,10 @@ static struct attribute *scsi_sdev_attrs
};
static struct bin_attribute *scsi_sdev_bin_attrs[] = {
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/generic/defconfig b/recipes-kernel/linux/linux-mediatek-5.4/generic/defconfig
index e1a3747..d793e06 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/generic/defconfig
+++ b/recipes-kernel/linux/linux-mediatek-5.4/generic/defconfig
@@ -298,6 +298,7 @@
# CONFIG_ARM64_ERRATUM_1024718 is not set
# CONFIG_ARM64_ERRATUM_1463225 is not set
# CONFIG_ARM64_ERRATUM_1542419 is not set
+# CONFIG_ARM64_ERRATUM_1742098 is not set
# CONFIG_ARM64_ERRATUM_819472 is not set
# CONFIG_ARM64_ERRATUM_824069 is not set
# CONFIG_ARM64_ERRATUM_826319 is not set
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/generic/hack-5.4/721-phy_packets.patch b/recipes-kernel/linux/linux-mediatek-5.4/generic/hack-5.4/721-phy_packets.patch
index dfc9aa5..f9fa50b 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/generic/hack-5.4/721-phy_packets.patch
+++ b/recipes-kernel/linux/linux-mediatek-5.4/generic/hack-5.4/721-phy_packets.patch
@@ -56,7 +56,7 @@
*/
--- a/include/linux/skbuff.h
+++ b/include/linux/skbuff.h
-@@ -2692,6 +2692,10 @@ static inline int pskb_trim(struct sk_bu
+@@ -2694,6 +2694,10 @@ static inline int pskb_trim(struct sk_bu
return (len < skb->len) ? __pskb_trim(skb, len) : 0;
}
@@ -67,7 +67,7 @@
/**
* pskb_trim_unique - remove end from a paged unique (not cloned) buffer
* @skb: buffer to alter
-@@ -2823,16 +2827,6 @@ static inline struct sk_buff *dev_alloc_
+@@ -2825,16 +2829,6 @@ static inline struct sk_buff *dev_alloc_
}
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/generic/pending-5.4/655-increase_skb_pad.patch b/recipes-kernel/linux/linux-mediatek-5.4/generic/pending-5.4/655-increase_skb_pad.patch
index ab79395..16c65ce 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/generic/pending-5.4/655-increase_skb_pad.patch
+++ b/recipes-kernel/linux/linux-mediatek-5.4/generic/pending-5.4/655-increase_skb_pad.patch
@@ -9,7 +9,7 @@
--- a/include/linux/skbuff.h
+++ b/include/linux/skbuff.h
-@@ -2658,7 +2658,7 @@ static inline int pskb_network_may_pull(
+@@ -2660,7 +2660,7 @@ static inline int pskb_network_may_pull(
* NET_IP_ALIGN(2) + ethernet_header(14) + IP_header(20/40) + ports(8)
*/
#ifndef NET_SKB_PAD
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/generic/pending-5.4/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch b/recipes-kernel/linux/linux-mediatek-5.4/generic/pending-5.4/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch
index 28901d7..10e58b4 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/generic/pending-5.4/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch
+++ b/recipes-kernel/linux/linux-mediatek-5.4/generic/pending-5.4/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch
@@ -251,7 +251,7 @@
kfree(net->ipv6.ip6_blk_hole_entry);
#endif
dst_entries_destroy(&net->ipv6.ip6_dst_ops);
-@@ -6428,6 +6477,9 @@ void __init ip6_route_init_special_entri
+@@ -6434,6 +6483,9 @@ void __init ip6_route_init_special_entri
init_net.ipv6.ip6_prohibit_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev);
init_net.ipv6.ip6_blk_hole_entry->dst.dev = init_net.loopback_dev;
init_net.ipv6.ip6_blk_hole_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev);
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/generic/pending-5.4/680-NET-skip-GRO-for-foreign-MAC-addresses.patch b/recipes-kernel/linux/linux-mediatek-5.4/generic/pending-5.4/680-NET-skip-GRO-for-foreign-MAC-addresses.patch
index abdf445..3162efd 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/generic/pending-5.4/680-NET-skip-GRO-for-foreign-MAC-addresses.patch
+++ b/recipes-kernel/linux/linux-mediatek-5.4/generic/pending-5.4/680-NET-skip-GRO-for-foreign-MAC-addresses.patch
@@ -22,10 +22,10 @@
#endif
--- a/include/linux/skbuff.h
+++ b/include/linux/skbuff.h
-@@ -824,6 +824,7 @@ struct sk_buff {
- #ifdef CONFIG_TLS_DEVICE
+@@ -826,6 +826,7 @@ struct sk_buff {
__u8 decrypted:1;
#endif
+ __u8 scm_io_uring:1;
+ __u8 gro_skip:1;
#ifdef CONFIG_NET_SCHED
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988-clkitg.dtsi b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988-clkitg.dtsi
index f753470..44809d9 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988-clkitg.dtsi
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988-clkitg.dtsi
@@ -43,7 +43,7 @@
<&topckgen CK_TOP_CB_MM_D8>,
<&topckgen CK_TOP_CB_APLL2_196M>,
<&topckgen CK_TOP_CB_APLL2_D4>,
- <&topckgen CK_TOP_CB_NET1_D4>,
+ <&system_clk>,
<&topckgen CK_TOP_CB_NET1_D5>,
<&topckgen CK_TOP_NET1_D5_D2>,
<&topckgen CK_TOP_NET1_D5_D4>,
@@ -143,8 +143,6 @@
<&topckgen CK_TOP_ETH_SYS_200M_SEL>,
<&topckgen CK_TOP_ETH_SYS_SEL>,
<&topckgen CK_TOP_ETH_XGMII_SEL>,
- <&topckgen CK_TOP_BUS_TOPS_SEL>,
- <&topckgen CK_TOP_NPU_TOPS_SEL>,
<&topckgen CK_TOP_DRAMC_SEL>,
<&topckgen CK_TOP_DRAMC_MD32_SEL>,
<&topckgen CK_TOP_INFRA_F26M_SEL>,
@@ -159,15 +157,12 @@
<&topckgen CK_TOP_CKM_SEL>,
<&topckgen CK_TOP_DA_SELM_XTAL_SEL>,
<&topckgen CK_TOP_PEXTP_SEL>,
- <&topckgen CK_TOP_TOPS_P2_26M_SEL>,
<&topckgen CK_TOP_MCUSYS_BACKUP_625M_SEL>,
<&topckgen CK_TOP_NETSYS_SYNC_250M_SEL>,
<&topckgen CK_TOP_MACSEC_SEL>,
- <&topckgen CK_TOP_NETSYS_TOPS_400M_SEL>,
<&topckgen CK_TOP_NETSYS_PPEFB_250M_SEL>,
<&topckgen CK_TOP_NETSYS_WARP_SEL>,
<&topckgen CK_TOP_ETH_MII_SEL>,
- <&topckgen CK_TOP_CK_NPU_SEL_CM_TOPS_SEL>,
<&infracfg CK_INFRA_CK_F26M>,
<&system_clk>,
<&system_clk>,
@@ -333,8 +328,8 @@
<&sgmiisys0 CK_SGM0_RX_EN>,
<&sgmiisys1 CK_SGM1_TX_EN>,
<&sgmiisys1 CK_SGM1_RX_EN>,
- <&mcusys CK_MCU_BUS_DIV_SEL>,
- <&mcusys CK_MCU_ARM_DIV_SEL>;
+ <&system_clk>,
+ <&system_clk>;
clock-names = "0", "1", "2", "3", "4", "5", "6", "7", "8", "9",
"10", "11", "12", "13", "14", "15", "16", "17",
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-emmc.dts b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-emmc.dts
index 373fdc3..14b51a6 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-emmc.dts
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-emmc.dts
@@ -158,6 +158,7 @@
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
fixed-link {
@@ -170,6 +171,7 @@
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
phy-handle = <&phy0>;
};
@@ -177,6 +179,7 @@
gmac2: mac@2 {
compatible = "mediatek,eth-mac";
reg = <2>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
phy-handle = <&phy1>;
};
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-sd.dts b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-sd.dts
index 0cf3d6c..a82f180 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-sd.dts
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-sd.dts
@@ -149,6 +149,7 @@
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
fixed-link {
@@ -161,6 +162,7 @@
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
phy-handle = <&phy0>;
};
@@ -168,6 +170,7 @@
gmac2: mac@2 {
compatible = "mediatek,eth-mac";
reg = <2>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
phy-handle = <&phy1>;
};
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-snfi-nand.dts b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-snfi-nand.dts
index 8e49212..7358c69 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-snfi-nand.dts
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-snfi-nand.dts
@@ -184,6 +184,7 @@
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
fixed-link {
@@ -196,6 +197,7 @@
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
phy-handle = <&phy0>;
};
@@ -203,6 +205,7 @@
gmac2: mac@2 {
compatible = "mediatek,eth-mac";
reg = <2>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
phy-handle = <&phy1>;
};
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nand.dts b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nand.dts
index 69f9f2e..0a4800e 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nand.dts
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nand.dts
@@ -265,6 +265,7 @@
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
fixed-link {
@@ -277,6 +278,7 @@
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
phy-handle = <&phy0>;
};
@@ -284,6 +286,7 @@
gmac2: mac@2 {
compatible = "mediatek,eth-mac";
reg = <2>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
phy-handle = <&phy1>;
};
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nor.dts b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nor.dts
index 8e832f3..35982e3 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nor.dts
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nor.dts
@@ -174,6 +174,7 @@
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
fixed-link {
@@ -186,6 +187,7 @@
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
phy-handle = <&phy0>;
};
@@ -193,6 +195,7 @@
gmac2: mac@2 {
compatible = "mediatek,eth-mac";
reg = <2>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
phy-handle = <&phy1>;
};
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-e2p5g-spim-nand.dts b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-e2p5g-spim-nand.dts
index 8f0d5c9..9f93866 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-e2p5g-spim-nand.dts
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-e2p5g-spim-nand.dts
@@ -269,6 +269,7 @@
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
fixed-link {
@@ -281,6 +282,7 @@
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
+ mac-type = "gdm";
phy-mode = "2500base-x";
phy-handle = <&phy13>;
};
@@ -288,6 +290,7 @@
gmac2: mac@2 {
compatible = "mediatek,eth-mac";
reg = <2>;
+ mac-type = "gdm";
phy-mode = "2500base-x";
phy-handle = <&phy5>;
};
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-i2p5g-spim-nand.dts b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-i2p5g-spim-nand.dts
index e0ffe52..055eba6 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-i2p5g-spim-nand.dts
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-i2p5g-spim-nand.dts
@@ -182,16 +182,13 @@
status = "disabled";
};
-&usxgmiisys1 {
- internal_2500;
-};
-
ð {
status = "okay";
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
fixed-link {
@@ -204,13 +201,15 @@
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
- phy-mode = "10gbase-kr";
+ mac-type = "xgdm";
+ phy-mode = "xgmii";
phy-handle = <&phy0>;
};
gmac2: mac@2 {
compatible = "mediatek,eth-mac";
reg = <2>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
phy-handle = <&phy1>;
};
@@ -221,7 +220,7 @@
phy0: ethernet-phy@0 {
reg = <15>;
compatible = "ethernet-phy-ieee802.3-c45";
- phy-mode = "10gbase-kr";
+ phy-mode = "xgmii";
};
phy1: ethernet-phy@8 {
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-sfp-spim-nand.dts b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-sfp-spim-nand.dts
index 4335fcf..4b224a9 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-sfp-spim-nand.dts
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-sfp-spim-nand.dts
@@ -300,6 +300,7 @@
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
fixed-link {
@@ -312,6 +313,7 @@
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
managed = "in-band-status";
sfp = <&sfp_esp1>;
@@ -320,6 +322,7 @@
gmac2: mac@2 {
compatible = "mediatek,eth-mac";
reg = <2>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
managed = "in-band-status";
sfp = <&sfp_esp0>;
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-spim-nand-4pcie.dts b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-spim-nand-4pcie.dts
index 86221c2..6332128 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-spim-nand-4pcie.dts
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-spim-nand-4pcie.dts
@@ -280,6 +280,7 @@
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
fixed-link {
@@ -292,6 +293,7 @@
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
phy-handle = <&phy0>;
};
@@ -299,6 +301,7 @@
gmac2: mac@2 {
compatible = "mediatek,eth-mac";
reg = <2>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
phy-handle = <&phy1>;
};
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-spim-nand.dts b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-spim-nand.dts
index 1f300dd..07ad467 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-spim-nand.dts
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-spim-nand.dts
@@ -300,6 +300,7 @@
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
fixed-link {
@@ -312,6 +313,7 @@
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
phy-handle = <&phy0>;
};
@@ -319,6 +321,7 @@
gmac2: mac@2 {
compatible = "mediatek,eth-mac";
reg = <2>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
phy-handle = <&phy1>;
};
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/clk/mediatek/clk-mt7988.c b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/clk/mediatek/clk-mt7988.c
index b0cefe9..6ccd92f 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/clk/mediatek/clk-mt7988.c
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/clk/mediatek/clk-mt7988.c
@@ -981,12 +981,15 @@
0x0314, 4, 0, 0, 0, 0x0318, 0, 0x0314, "clkxtal"),
};
+static struct clk_onecell_data *mt7988_infra_clk_data __initdata;
+static struct clk_onecell_data *mt7988_infra_ao_clk_data __initdata;
static struct clk_onecell_data *mt7988_top_clk_data __initdata;
static struct clk_onecell_data *mt7988_pll_clk_data __initdata;
static void __init mtk_clk_enable_critical(void)
{
- if (!mt7988_top_clk_data || !mt7988_pll_clk_data)
+ if (!mt7988_infra_clk_data || !mt7988_infra_ao_clk_data
+ || !mt7988_top_clk_data || !mt7988_pll_clk_data)
return;
clk_prepare_enable(mt7988_pll_clk_data->clks[CK_APMIXED_ARM_B]);
@@ -995,19 +998,25 @@
clk_prepare_enable(mt7988_top_clk_data->clks[CK_TOP_DRAMC_SEL]);
clk_prepare_enable(mt7988_top_clk_data->clks[CK_TOP_DRAMC_MD32_SEL]);
clk_prepare_enable(mt7988_top_clk_data->clks[CK_TOP_INFRA_F26M_SEL]);
+ clk_prepare_enable(mt7988_top_clk_data->clks[CK_TOP_PEXTP_P0_SEL]);
+ clk_prepare_enable(mt7988_top_clk_data->clks[CK_TOP_PEXTP_P1_SEL]);
+ clk_prepare_enable(mt7988_top_clk_data->clks[CK_TOP_PEXTP_P2_SEL]);
+ clk_prepare_enable(mt7988_top_clk_data->clks[CK_TOP_PEXTP_P3_SEL]);
+ clk_prepare_enable(
+ mt7988_infra_ao_clk_data->clks[CK_INFRA_PCIE_PERI_26M_CK_P3]);
}
static void __init mtk_infracfg_init(struct device_node *node)
{
int r;
- mt7988_top_clk_data = mtk_alloc_clk_data(CLK_INFRA_NR_CLK);
+ mt7988_infra_clk_data = mtk_alloc_clk_data(CLK_INFRA_NR_CLK);
mtk_clk_register_factors(infra_divs, ARRAY_SIZE(infra_divs),
- mt7988_top_clk_data);
+ mt7988_infra_clk_data);
r = of_clk_add_provider(node, of_clk_src_onecell_get,
- mt7988_top_clk_data);
+ mt7988_infra_clk_data);
if (r)
pr_err("%s(): could not register clock provider: %d\n",
@@ -1049,7 +1058,6 @@
static void __init mtk_infracfg_ao_init(struct device_node *node)
{
- struct clk_onecell_data *clk_data;
int r;
void __iomem *base;
@@ -1059,18 +1067,21 @@
return;
}
- clk_data = mtk_alloc_clk_data(CLK_INFRA_AO_NR_CLK);
+ mt7988_infra_ao_clk_data = mtk_alloc_clk_data(CLK_INFRA_AO_NR_CLK);
mtk_clk_register_muxes(infra_muxes, ARRAY_SIZE(infra_muxes), node,
- &mt7988_clk_lock, clk_data);
+ &mt7988_clk_lock, mt7988_infra_ao_clk_data);
mtk_clk_register_gates(node, infra_clks, ARRAY_SIZE(infra_clks),
- clk_data);
+ mt7988_infra_ao_clk_data);
- r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
+ r = of_clk_add_provider(node, of_clk_src_onecell_get,
+ mt7988_infra_ao_clk_data);
if (r)
pr_err("%s(): could not register clock provider: %d\n",
__func__, r);
+
+ mtk_clk_enable_critical();
}
CLK_OF_DECLARE(mtk_infracfg_ao, "mediatek,mt7988-infracfg_ao",
mtk_infracfg_ao_init);
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_path.c b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_path.c
index 2b78ee1..04f3f26 100755
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_path.c
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_path.c
@@ -31,6 +31,8 @@
return "gmac2_rgmii";
case MTK_ETH_PATH_GMAC2_SGMII:
return "gmac2_sgmii";
+ case MTK_ETH_PATH_GMAC2_XGMII:
+ return "gmac2_xgmii";
case MTK_ETH_PATH_GMAC2_GEPHY:
return "gmac2_gephy";
case MTK_ETH_PATH_GMAC3_SGMII:
@@ -133,6 +135,56 @@
return 0;
}
+static int set_mux_gmac2_to_xgmii(struct mtk_eth *eth, u64 path)
+{
+ unsigned int val = 0;
+ bool updated = true;
+ int mac_id = 0;
+
+ dev_dbg(eth->dev, "path %s in %s updated = %d\n",
+ mtk_eth_path_name(path), __func__, updated);
+
+ spin_lock(ð->syscfg0_lock);
+
+ regmap_read(eth->ethsys, ETHSYS_SYSCFG0, &val);
+
+ switch (path) {
+ case MTK_ETH_PATH_GMAC2_XGMII:
+ val &= ~(u32)SYSCFG0_SGMII_GMAC2_V2;
+ mac_id = MTK_GMAC2_ID;
+ break;
+ default:
+ updated = false;
+ break;
+ };
+
+ if (updated)
+ regmap_update_bits(eth->ethsys, ETHSYS_SYSCFG0,
+ SYSCFG0_SGMII_MASK, val);
+
+ /* Enable GDM/XGDM Path */
+ if (eth->mac[mac_id]->type == MTK_GDM_TYPE) {
+ val = mtk_r32(eth, MTK_GDMA_EG_CTRL(mac_id));
+ mtk_w32(eth, val & ~MTK_GDMA_XGDM_SEL,
+ MTK_GDMA_EG_CTRL(mac_id));
+ } else if (eth->mac[mac_id]->type == MTK_XGDM_TYPE) {
+ val = mtk_r32(eth, MTK_GDMA_EG_CTRL(mac_id));
+ mtk_w32(eth, val | MTK_GDMA_XGDM_SEL,
+ MTK_GDMA_EG_CTRL(mac_id));
+
+ val = mtk_r32(eth, MTK_XGMAC_STS(mac_id));
+ mtk_w32(eth, val | (MTK_XGMAC_FORCE_LINK << 16),
+ MTK_XGMAC_STS(mac_id));
+ }
+
+ spin_unlock(ð->syscfg0_lock);
+
+ dev_dbg(eth->dev, "path %s in %s updated = %d\n",
+ mtk_eth_path_name(path), __func__, updated);
+
+ return 0;
+}
+
static int set_mux_gmac1_gmac2_to_sgmii_rgmii(struct mtk_eth *eth, u64 path)
{
unsigned int val = 0;
@@ -179,7 +231,7 @@
{
unsigned int val = 0;
bool updated = true;
- int mac_id = 0, id = 0;
+ int mac_id = 0;
dev_dbg(eth->dev, "path %s in %s updated = %d\n",
mtk_eth_path_name(path), __func__, updated);
@@ -210,19 +262,10 @@
if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V3) &&
mac_id == MTK_GMAC2_ID) {
- id = mtk_mac2xgmii_id(eth, mac_id);
- if (MTK_HAS_FLAGS(eth->xgmii->flags[id],
- MTK_USXGMII_INT_2500)) {
- val = mtk_r32(eth, MTK_XGMAC_STS(mac_id));
- mtk_w32(eth,
- val | (MTK_XGMAC_FORCE_LINK << 16),
- MTK_XGMAC_STS(mac_id));
- } else {
- regmap_update_bits(eth->infra,
- TOP_MISC_NETSYS_PCS_MUX,
- NETSYS_PCS_MUX_MASK,
- MUX_G2_USXGMII_SEL);
- }
+ regmap_update_bits(eth->infra,
+ TOP_MISC_NETSYS_PCS_MUX,
+ NETSYS_PCS_MUX_MASK,
+ MUX_G2_USXGMII_SEL);
}
}
@@ -290,6 +333,10 @@
.cap_bit = MTK_ETH_MUX_U3_GMAC2_TO_QPHY,
.set_path = set_mux_u3_gmac2_to_qphy,
}, {
+ .name = "mux_gmac2_to_xgmii",
+ .cap_bit = MTK_ETH_MUX_GMAC2_TO_XGMII,
+ .set_path = set_mux_gmac2_to_xgmii,
+ }, {
.name = "mux_gmac1_gmac2_to_sgmii_rgmii",
.cap_bit = MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII,
.set_path = set_mux_gmac1_gmac2_to_sgmii_rgmii,
@@ -374,6 +421,25 @@
return 0;
}
+int mtk_gmac_xgmii_path_setup(struct mtk_eth *eth, int mac_id)
+{
+ int err;
+ u64 path;
+
+ if (mac_id == 1)
+ path = MTK_ETH_PATH_GMAC2_XGMII;
+
+ if (!path)
+ return -EINVAL;
+
+ /* Setup proper MUXes along the path */
+ err = mtk_eth_mux_setup(eth, path);
+ if (err)
+ return err;
+
+ return 0;
+}
+
int mtk_gmac_gephy_path_setup(struct mtk_eth *eth, int mac_id)
{
int err;
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c
index 37b6c68..080e53e 100755
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -332,6 +332,13 @@
goto init_err;
}
break;
+ case PHY_INTERFACE_MODE_XGMII:
+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_XGMII)) {
+ err = mtk_gmac_xgmii_path_setup(eth, mac->id);
+ if (err)
+ goto init_err;
+ }
+ break;
case PHY_INTERFACE_MODE_USXGMII:
case PHY_INTERFACE_MODE_10GKR:
if (MTK_HAS_CAPS(eth->soc->caps, MTK_USXGMII)) {
@@ -455,8 +462,7 @@
}
/* Setup gmac */
- if (state->interface == PHY_INTERFACE_MODE_USXGMII ||
- state->interface == PHY_INTERFACE_MODE_10GKR) {
+ if (mac->type == MTK_XGDM_TYPE) {
mtk_w32(mac->hw, MTK_GDMA_XGDM_SEL, MTK_GDMA_EG_CTRL(mac->id));
mtk_w32(mac->hw, MAC_MCR_FORCE_LINK_DOWN, MTK_MAC_MCR(mac->id));
@@ -683,6 +689,8 @@
!(MTK_HAS_CAPS(mac->hw->soc->caps, MTK_SGMII) &&
(state->interface == PHY_INTERFACE_MODE_SGMII ||
phy_interface_mode_is_8023z(state->interface))) &&
+ !(MTK_HAS_CAPS(mac->hw->soc->caps, MTK_XGMII) &&
+ (state->interface == PHY_INTERFACE_MODE_XGMII)) &&
!(MTK_HAS_CAPS(mac->hw->soc->caps, MTK_USXGMII) &&
(state->interface == PHY_INTERFACE_MODE_USXGMII)) &&
!(MTK_HAS_CAPS(mac->hw->soc->caps, MTK_USXGMII) &&
@@ -715,6 +723,8 @@
case PHY_INTERFACE_MODE_TRGMII:
phylink_set(mask, 1000baseT_Full);
break;
+ case PHY_INTERFACE_MODE_XGMII:
+ /* fall through */
case PHY_INTERFACE_MODE_1000BASEX:
phylink_set(mask, 1000baseX_Full);
/* fall through; */
@@ -774,6 +784,12 @@
}
}
+ if (mac->type == MTK_XGDM_TYPE) {
+ phylink_clear(mask, 10baseT_Half);
+ phylink_clear(mask, 100baseT_Half);
+ phylink_clear(mask, 1000baseT_Half);
+ }
+
phylink_set(mask, Pause);
phylink_set(mask, Asym_Pause);
@@ -3841,8 +3857,9 @@
static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np)
{
const __be32 *_id = of_get_property(np, "reg", NULL);
+ const char *label;
struct phylink *phylink;
- int phy_mode, id, err;
+ int mac_type, phy_mode, id, err;
struct mtk_mac *mac;
struct mtk_phylink_priv *phylink_priv;
struct fwnode_handle *fixed_node;
@@ -3906,9 +3923,25 @@
mac->phylink_config.dev = ð->netdev[id]->dev;
mac->phylink_config.type = PHYLINK_NETDEV;
- mac->type = (phy_mode == PHY_INTERFACE_MODE_10GKR ||
- phy_mode == PHY_INTERFACE_MODE_USXGMII) ?
- MTK_XGDM_TYPE : MTK_GDM_TYPE;
+ mac->type = 0;
+ if (!of_property_read_string(np, "mac-type", &label)) {
+ for (mac_type = 0; mac_type < MTK_GDM_TYPE_MAX; mac_type++) {
+ if (!strcasecmp(label, gdm_type(mac_type)))
+ break;
+ }
+
+ switch (mac_type) {
+ case 0:
+ mac->type = MTK_GDM_TYPE;
+ break;
+ case 1:
+ mac->type = MTK_XGDM_TYPE;
+ break;
+ default:
+ dev_warn(eth->dev, "incorrect mac-type\n");
+ break;
+ };
+ }
phylink = phylink_create(&mac->phylink_config,
of_fwnode_handle(mac->of_node),
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h
index 39543c7..a961042 100755
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h
@@ -1090,6 +1090,18 @@
MTK_GDM_TYPE_MAX
};
+static inline const char *gdm_type(int type)
+{
+ switch (type) {
+ case MTK_GDM_TYPE:
+ return "gdm";
+ case MTK_XGDM_TYPE:
+ return "xgdm";
+ default:
+ return "unkown";
+ }
+}
+
/* struct mtk_tx_buf - This struct holds the pointers to the memory pointed at
* by the TX descriptor s
* @skb: The SKB pointer of the packet being sent
@@ -1180,6 +1192,7 @@
MTK_RGMII_BIT = 0,
MTK_TRGMII_BIT,
MTK_SGMII_BIT,
+ MTK_XGMII_BIT,
MTK_USXGMII_BIT,
MTK_ESW_BIT,
MTK_GEPHY_BIT,
@@ -1203,6 +1216,7 @@
MTK_ETH_MUX_GDM1_TO_GMAC1_ESW_BIT,
MTK_ETH_MUX_GMAC2_GMAC0_TO_GEPHY_BIT,
MTK_ETH_MUX_U3_GMAC2_TO_QPHY_BIT,
+ MTK_ETH_MUX_GMAC2_TO_XGMII_BIT,
MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII_BIT,
MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII_BIT,
MTK_ETH_MUX_GMAC123_TO_GEPHY_SGMII_BIT,
@@ -1214,6 +1228,7 @@
MTK_ETH_PATH_GMAC1_SGMII_BIT,
MTK_ETH_PATH_GMAC2_RGMII_BIT,
MTK_ETH_PATH_GMAC2_SGMII_BIT,
+ MTK_ETH_PATH_GMAC2_XGMII_BIT,
MTK_ETH_PATH_GMAC2_GEPHY_BIT,
MTK_ETH_PATH_GMAC3_SGMII_BIT,
MTK_ETH_PATH_GDM1_ESW_BIT,
@@ -1226,6 +1241,7 @@
#define MTK_RGMII BIT_ULL(MTK_RGMII_BIT)
#define MTK_TRGMII BIT_ULL(MTK_TRGMII_BIT)
#define MTK_SGMII BIT_ULL(MTK_SGMII_BIT)
+#define MTK_XGMII BIT_ULL(MTK_XGMII_BIT)
#define MTK_USXGMII BIT_ULL(MTK_USXGMII_BIT)
#define MTK_ESW BIT_ULL(MTK_ESW_BIT)
#define MTK_GEPHY BIT_ULL(MTK_GEPHY_BIT)
@@ -1251,6 +1267,8 @@
BIT_ULL(MTK_ETH_MUX_GMAC2_GMAC0_TO_GEPHY_BIT)
#define MTK_ETH_MUX_U3_GMAC2_TO_QPHY \
BIT_ULL(MTK_ETH_MUX_U3_GMAC2_TO_QPHY_BIT)
+#define MTK_ETH_MUX_GMAC2_TO_XGMII \
+ BIT_ULL(MTK_ETH_MUX_GMAC2_TO_XGMII_BIT)
#define MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII \
BIT_ULL(MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII_BIT)
#define MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII \
@@ -1266,6 +1284,7 @@
#define MTK_ETH_PATH_GMAC1_SGMII BIT_ULL(MTK_ETH_PATH_GMAC1_SGMII_BIT)
#define MTK_ETH_PATH_GMAC2_RGMII BIT_ULL(MTK_ETH_PATH_GMAC2_RGMII_BIT)
#define MTK_ETH_PATH_GMAC2_SGMII BIT_ULL(MTK_ETH_PATH_GMAC2_SGMII_BIT)
+#define MTK_ETH_PATH_GMAC2_XGMII BIT_ULL(MTK_ETH_PATH_GMAC2_XGMII_BIT)
#define MTK_ETH_PATH_GMAC2_GEPHY BIT_ULL(MTK_ETH_PATH_GMAC2_GEPHY_BIT)
#define MTK_ETH_PATH_GMAC3_SGMII BIT_ULL(MTK_ETH_PATH_GMAC3_SGMII_BIT)
#define MTK_ETH_PATH_GDM1_ESW BIT_ULL(MTK_ETH_PATH_GDM1_ESW_BIT)
@@ -1278,6 +1297,7 @@
#define MTK_GMAC1_SGMII (MTK_ETH_PATH_GMAC1_SGMII | MTK_SGMII)
#define MTK_GMAC2_RGMII (MTK_ETH_PATH_GMAC2_RGMII | MTK_RGMII)
#define MTK_GMAC2_SGMII (MTK_ETH_PATH_GMAC2_SGMII | MTK_SGMII)
+#define MTK_GMAC2_XGMII (MTK_ETH_PATH_GMAC2_XGMII | MTK_XGMII)
#define MTK_GMAC2_GEPHY (MTK_ETH_PATH_GMAC2_GEPHY | MTK_GEPHY)
#define MTK_GMAC3_SGMII (MTK_ETH_PATH_GMAC3_SGMII | MTK_SGMII)
#define MTK_GDM1_ESW (MTK_ETH_PATH_GDM1_ESW | MTK_ESW)
@@ -1302,6 +1322,10 @@
(MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII | MTK_MUX | \
MTK_SHARED_SGMII)
+/* 2: GMAC2 -> XGMII */
+#define MTK_MUX_GMAC2_TO_XGMII \
+ (MTK_ETH_MUX_GMAC2_TO_XGMII | MTK_MUX | MTK_INFRA)
+
/* 0: GMACx -> GEPHY, 1: GMACx -> SGMII where x is 1 or 2 */
#define MTK_MUX_GMAC12_TO_GEPHY_SGMII \
(MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII | MTK_MUX)
@@ -1347,7 +1371,8 @@
MTK_MUX_GMAC123_TO_GEPHY_SGMII | MTK_QDMA | \
MTK_NETSYS_V3 | MTK_RSTCTRL_PPE1 | \
MTK_GMAC1_USXGMII | MTK_GMAC2_USXGMII | \
- MTK_GMAC3_USXGMII | MTK_MUX_GMAC123_TO_USXGMII | MTK_RSS)
+ MTK_GMAC3_USXGMII | MTK_MUX_GMAC123_TO_USXGMII | \
+ MTK_GMAC2_XGMII | MTK_MUX_GMAC2_TO_XGMII | MTK_RSS)
struct mtk_tx_dma_desc_info {
dma_addr_t addr;
@@ -1405,7 +1430,6 @@
#define MTK_SGMII_PHYSPEED_5000 BIT(2)
#define MTK_SGMII_PHYSPEED_10000 BIT(3)
#define MTK_SGMII_PN_SWAP BIT(16)
-#define MTK_USXGMII_INT_2500 BIT(17)
#define MTK_HAS_FLAGS(flags, _x) (((flags) & (_x)) == (_x))
/* struct mtk_xgmii - This is the structure holding sgmii/usxgmii regmap and
@@ -1574,6 +1598,7 @@
void mtk_sgmii_setup_phya_gen2(struct mtk_xgmii *ss, int mac_id);
int mtk_gmac_sgmii_path_setup(struct mtk_eth *eth, int mac_id);
+int mtk_gmac_xgmii_path_setup(struct mtk_eth *eth, int mac_id);
int mtk_gmac_gephy_path_setup(struct mtk_eth *eth, int mac_id);
int mtk_gmac_rgmii_path_setup(struct mtk_eth *eth, int mac_id);
int mtk_gmac_usxgmii_path_setup(struct mtk_eth *eth, int mac_id);
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_usxgmii.c b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_usxgmii.c
index 363de90..7d4a3ed 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_usxgmii.c
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_usxgmii.c
@@ -22,10 +22,6 @@
ss->regmap_usxgmii[i] = syscon_node_to_regmap(np);
if (IS_ERR(ss->regmap_usxgmii[i]))
return PTR_ERR(ss->regmap_usxgmii[i]);
-
- ss->flags[i] &= ~(MTK_USXGMII_INT_2500);
- if (of_property_read_bool(np, "internal_2500"))
- ss->flags[i] |= MTK_USXGMII_INT_2500;
}
return 0;
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9999-1-ethernet-update-ppe-from-mt7986-to-mt7988.patch b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9999-1-ethernet-update-ppe-from-mt7986-to-mt7988.patch
new file mode 100644
index 0000000..543fd1c
--- /dev/null
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9999-1-ethernet-update-ppe-from-mt7986-to-mt7988.patch
@@ -0,0 +1,203 @@
+diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+index 4075ec2..524c5d9 100644
+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+@@ -1796,17 +1796,17 @@ static int mtk_poll_rx(struct napi_struct *napi, int budget,
+ skb_checksum_none_assert(skb);
+ skb->protocol = eth_type_trans(skb, netdev);
+
+-#if defined(CONFIG_MEDIATEK_NETSYS_V2)
+- hash = trxd.rxd5 & MTK_RXD5_FOE_ENTRY_V2;
++#if defined(CONFIG_MEDIATEK_NETSYS_V2) || defined(CONFIG_MEDIATEK_NETSYS_V3)
++ hash = trxd.rxd5 & MTK_RXD5_FOE_ENTRY_V2;
+ #else
+- hash = trxd.rxd4 & MTK_RXD4_FOE_ENTRY;
++ hash = trxd.rxd4 & MTK_RXD4_FOE_ENTRY;
+ #endif
+ if (hash != MTK_RXD4_FOE_ENTRY) {
+ hash = jhash_1word(hash, 0);
+ skb_set_hash(skb, hash, PKT_HASH_TYPE_L4);
+ }
+
+-#if defined(CONFIG_MEDIATEK_NETSYS_V2)
++#if defined(CONFIG_MEDIATEK_NETSYS_V2) || defined(CONFIG_MEDIATEK_NETSYS_V3)
+ reason = FIELD_GET(MTK_RXD5_PPE_CPU_REASON_V2, trxd.rxd5);
+ if (reason == MTK_PPE_CPU_REASON_HIT_UNBIND_RATE_REACHED) {
+ for (i = 0; i < eth->ppe_num; i++) {
+@@ -4626,11 +4626,15 @@ static const struct mtk_soc_data mt7988_data = {
+ .required_clks = MT7988_CLKS_BITMAP,
+ .required_pctl = false,
+ .has_sram = true,
++ .has_accounting = true,
++ .hash_way = 4,
++ .offload_version = 2,
+ .txrx = {
+ .txd_size = sizeof(struct mtk_tx_dma_v2),
+ .rxd_size = sizeof(struct mtk_rx_dma_v2),
+ .dma_max_len = MTK_TX_DMA_BUF_LEN_V2,
+ .dma_len_offset = MTK_TX_DMA_BUF_SHIFT_V2,
++ .qdma_tx_sch = 4,
+ },
+ };
+
+diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+index 5b39d87..94bd423 100644
+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+@@ -118,7 +118,7 @@
+ #define MTK_GDMA_UCS_EN BIT(20)
+ #define MTK_GDMA_STRP_CRC BIT(16)
+ #define MTK_GDMA_TO_PDMA 0x0
+-#if defined(CONFIG_MEDIATEK_NETSYS_V2)
++#if defined(CONFIG_MEDIATEK_NETSYS_V2) || defined(CONFIG_MEDIATEK_NETSYS_V3)
+ #define MTK_GDMA_TO_PPE0 0x3333
+ #define MTK_GDMA_TO_PPE1 0x4444
+ #else
+diff --git a/drivers/net/ethernet/mediatek/mtk_ppe.c b/drivers/net/ethernet/mediatek/mtk_ppe.c
+index 98f61fe..bd504d4 100755
+--- a/drivers/net/ethernet/mediatek/mtk_ppe.c
++++ b/drivers/net/ethernet/mediatek/mtk_ppe.c
+@@ -211,7 +211,7 @@ int mtk_foe_entry_prepare(struct mtk_foe_entry *entry, int type, int l4proto,
+ MTK_FOE_IB1_BIND_CACHE;
+ entry->ib1 = val;
+
+-#if defined(CONFIG_MEDIATEK_NETSYS_V2)
++#if defined(CONFIG_MEDIATEK_NETSYS_V2) || defined(CONFIG_MEDIATEK_NETSYS_V3)
+ val = FIELD_PREP(MTK_FOE_IB2_PORT_AG, 0xf) |
+ #else
+ val = FIELD_PREP(MTK_FOE_IB2_PORT_MG, 0x3f) |
+@@ -403,7 +403,7 @@ int mtk_foe_entry_set_wdma(struct mtk_foe_entry *entry, int wdma_idx, int txq,
+
+ *ib2 &= ~MTK_FOE_IB2_PORT_MG;
+ *ib2 |= MTK_FOE_IB2_WDMA_WINFO;
+-#if defined(CONFIG_MEDIATEK_NETSYS_V2)
++#if defined(CONFIG_MEDIATEK_NETSYS_V2) || defined(CONFIG_MEDIATEK_NETSYS_V3)
+ *ib2 |= FIELD_PREP(MTK_FOE_IB2_RX_IDX, txq);
+
+ l2->winfo = FIELD_PREP(MTK_FOE_WINFO_WCID, wcid) |
+@@ -867,13 +867,16 @@ int mtk_ppe_start(struct mtk_ppe *ppe)
+ mtk_ppe_init_foe_table(ppe);
+ ppe_w32(ppe, MTK_PPE_TB_BASE, ppe->foe_phys);
+
+- val = MTK_PPE_TB_CFG_ENTRY_80B |
++ val =
++#if !defined(CONFIG_MEDIATEK_NETSYS_V3)
++ MTK_PPE_TB_CFG_ENTRY_80B |
++#endif
+ MTK_PPE_TB_CFG_AGE_NON_L4 |
+ MTK_PPE_TB_CFG_AGE_UNBIND |
+ MTK_PPE_TB_CFG_AGE_TCP |
+ MTK_PPE_TB_CFG_AGE_UDP |
+ MTK_PPE_TB_CFG_AGE_TCP_FIN |
+-#if defined(CONFIG_MEDIATEK_NETSYS_V2)
++#if defined(CONFIG_MEDIATEK_NETSYS_V2) || defined(CONFIG_MEDIATEK_NETSYS_V3)
+ MTK_PPE_TB_CFG_INFO_SEL |
+ #endif
+ FIELD_PREP(MTK_PPE_TB_CFG_SEARCH_MISS,
+@@ -937,7 +940,7 @@ int mtk_ppe_start(struct mtk_ppe *ppe)
+
+ ppe_w32(ppe, MTK_PPE_DEFAULT_CPU_PORT, 0);
+
+-#if defined(CONFIG_MEDIATEK_NETSYS_V2)
++#if defined(CONFIG_MEDIATEK_NETSYS_V2) || defined(CONFIG_MEDIATEK_NETSYS_V3)
+ ppe_w32(ppe, MTK_PPE_DEFAULT_CPU_PORT1, 0xcb777);
+ ppe_w32(ppe, MTK_PPE_SBW_CTRL, 0x7f);
+ #endif
+diff --git a/drivers/net/ethernet/mediatek/mtk_ppe.h b/drivers/net/ethernet/mediatek/mtk_ppe.h
+index 703b2bd..03b4dfb 100644
+--- a/drivers/net/ethernet/mediatek/mtk_ppe.h
++++ b/drivers/net/ethernet/mediatek/mtk_ppe.h
+@@ -8,7 +8,7 @@
+ #include <linux/bitfield.h>
+ #include <linux/rhashtable.h>
+
+-#if defined(CONFIG_MEDIATEK_NETSYS_V2)
++#if defined(CONFIG_MEDIATEK_NETSYS_V2) || defined(CONFIG_MEDIATEK_NETSYS_V3)
+ #define MTK_MAX_PPE_NUM 2
+ #define MTK_ETH_PPE_BASE 0x2000
+ #else
+@@ -22,7 +22,7 @@
+ #define MTK_PPE_WAIT_TIMEOUT_US 1000000
+
+ #define MTK_FOE_IB1_UNBIND_TIMESTAMP GENMASK(7, 0)
+-#if defined(CONFIG_MEDIATEK_NETSYS_V2)
++#if defined(CONFIG_MEDIATEK_NETSYS_V2) || defined(CONFIG_MEDIATEK_NETSYS_V3)
+ #define MTK_FOE_IB1_UNBIND_SRC_PORT GENMASK(11, 8)
+ #define MTK_FOE_IB1_UNBIND_PACKETS GENMASK(19, 12)
+ #define MTK_FOE_IB1_UNBIND_PREBIND BIT(22)
+@@ -70,7 +70,7 @@ enum {
+ MTK_PPE_PKT_TYPE_IPV6_6RD = 7,
+ };
+
+-#if defined(CONFIG_MEDIATEK_NETSYS_V2)
++#if defined(CONFIG_MEDIATEK_NETSYS_V2) || defined(CONFIG_MEDIATEK_NETSYS_V3)
+ #define MTK_FOE_IB2_QID GENMASK(6, 0)
+ #define MTK_FOE_IB2_PORT_MG BIT(7)
+ #define MTK_FOE_IB2_PSE_QOS BIT(8)
+@@ -98,7 +98,18 @@ enum {
+
+ #define MTK_FOE_IB2_DSCP GENMASK(31, 24)
+
+-#if defined(CONFIG_MEDIATEK_NETSYS_V2)
++#if defined(CONFIG_MEDIATEK_NETSYS_V3)
++#define MTK_FOE_WINFO_WCID GENMASK(15, 0)
++#define MTK_FOE_WINFO_BSS GENMASK(23, 16)
++
++#define MTK_FOE_WINFO_PAO_USR_INFO GENMASK(15, 0)
++#define MTK_FOE_WINFO_PAO_TID GENMASK(19, 16)
++#define MTK_FOE_WINFO_PAO_IS_FIXEDRATE BIT(20)
++#define MTK_FOE_WINFO_PAO_IS_PRIOR BIT(21)
++#define MTK_FOE_WINFO_PAO_IS_SP BIT(22)
++#define MTK_FOE_WINFO_PAO_HF BIT(23)
++#define MTK_FOE_WINFO_PAO_AMSDU_EN BIT(24)
++#elif defined(CONFIG_MEDIATEK_NETSYS_V2)
+ #define MTK_FOE_WINFO_BSS GENMASK(5, 0)
+ #define MTK_FOE_WINFO_WCID GENMASK(15, 6)
+ #else
+@@ -128,7 +139,12 @@ struct mtk_foe_mac_info {
+ u16 pppoe_id;
+ u16 src_mac_lo;
+
+-#if defined(CONFIG_MEDIATEK_NETSYS_V2)
++#if defined(CONFIG_MEDIATEK_NETSYS_V3)
++ u16 minfo;
++ u16 resv1;
++ u32 winfo;
++ u32 winfo_pao;
++#elif defined(CONFIG_MEDIATEK_NETSYS_V2)
+ u16 minfo;
+ u16 winfo;
+ #endif
+@@ -249,7 +265,9 @@ struct mtk_foe_entry {
+ struct mtk_foe_ipv4_dslite dslite;
+ struct mtk_foe_ipv6 ipv6;
+ struct mtk_foe_ipv6_6rd ipv6_6rd;
+-#if defined(CONFIG_MEDIATEK_NETSYS_V2)
++#if defined(CONFIG_MEDIATEK_NETSYS_V3)
++ u32 data[31];
++#elif defined(CONFIG_MEDIATEK_NETSYS_V2)
+ u32 data[23];
+ #else
+ u32 data[19];
+diff --git a/drivers/net/ethernet/mediatek/mtk_ppe_offload.c b/drivers/net/ethernet/mediatek/mtk_ppe_offload.c
+index a5bf090..0e41ff2 100755
+--- a/drivers/net/ethernet/mediatek/mtk_ppe_offload.c
++++ b/drivers/net/ethernet/mediatek/mtk_ppe_offload.c
+@@ -195,7 +195,7 @@ mtk_flow_set_output_device(struct mtk_eth *eth, struct mtk_foe_entry *foe,
+ mtk_foe_entry_set_wdma(foe, info.wdma_idx, info.queue, info.bss,
+ info.wcid);
+ pse_port = 3;
+-#if defined(CONFIG_MEDIATEK_NETSYS_V2)
++#if defined(CONFIG_MEDIATEK_NETSYS_V2) || defined(CONFIG_MEDIATEK_NETSYS_V3)
+ if (info.wdma_idx == 0)
+ pse_port = 8;
+ else if (info.wdma_idx == 1)
+@@ -452,7 +452,7 @@ mtk_flow_offload_replace(struct mtk_eth *eth, struct flow_cls_offload *f)
+ return -ENOMEM;
+
+ i = 0;
+-#if defined(CONFIG_MEDIATEK_NETSYS_V2)
++#if defined(CONFIG_MEDIATEK_NETSYS_V2) || defined(CONFIG_MEDIATEK_NETSYS_V3)
+ if (idev && idev->netdev_ops->ndo_fill_receive_path) {
+ ctx.dev = idev;
+ idev->netdev_ops->ndo_fill_receive_path(&ctx, &path);
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/patches-5.4/8010-ovs-support-flow-offload.patch b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9999-flow-offload-ovs-support.patch
similarity index 100%
rename from recipes-kernel/linux/linux-mediatek-5.4/mediatek/patches-5.4/8010-ovs-support-flow-offload.patch
rename to recipes-kernel/linux/linux-mediatek-5.4/mediatek/flow_patch/9999-flow-offload-ovs-support.patch
diff --git a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/patches-5.4/patches-5.4.inc b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/patches-5.4/patches-5.4.inc
index f00effe..8335f20 100644
--- a/recipes-kernel/linux/linux-mediatek-5.4/mediatek/patches-5.4/patches-5.4.inc
+++ b/recipes-kernel/linux/linux-mediatek-5.4/mediatek/patches-5.4/patches-5.4.inc
@@ -121,7 +121,6 @@
file://8007-phy-phy-mtk-tphy-Add-PCIe-2-lane-efuse-support.patch \
file://8008-phy-phy-mtk-tphy-add-auto-load-valid-check-mechanism.patch \
file://8009-tphy-one-setting-of-TTSSC-Freq-Dev-for-all-IC-cases.patch \
- file://8010-ovs-support-flow-offload.patch \
file://8010-phy-phy-mtk-xsphy-support-type-switch-by-pericfg.patch \
file://8011-ovs-add-multicast-to-unicast-support.patch \
file://9000-PATCH-1-1-xHCI-change-compliance-mode-de-emphasis-default-as-g.patch \
diff --git a/recipes-kernel/linux/linux-mediatek_5.4.bb b/recipes-kernel/linux/linux-mediatek_5.4.bb
index 69680ed..e976566 100644
--- a/recipes-kernel/linux/linux-mediatek_5.4.bb
+++ b/recipes-kernel/linux/linux-mediatek_5.4.bb
@@ -7,8 +7,8 @@
KBRANCH ?= "linux-5.4.y"
-LINUX_VERSION ?= "5.4.219"
-SRCREV_machine ?= "fd92cfed8bc6668d314acd1e6da708a80826f768"
+LINUX_VERSION ?= "5.4.224"
+SRCREV_machine ?= "771a8acbb84145b943bd608ba376e104ebfa9664"
KMETA = "kernel-meta"
SRCREV_meta ?= "feeb59687bc0f054af837a5061f8d413ec7c93e9"