[rdkb][common][bsp][Refactor and sync wifi from openwrt]
[Description]
3a2eef0b [MAC80211][Release][Update release note for Filogic 880/860 MLO Beta release]
cfbd2411 [MAC80211][Release][Filogic 880/860 MLO Beta release]
6c180e3f [MAC80211][WiFi7][misc][Add Eagle BE14000 efem default bin]
a55f34db [MAC80211][Release][Prepare for Filogic 880/860 release]
5b45ebca [MAC80211][WiFi7][hostapd][Add puncture bitmap to ucode]
95bbea73 [MAC80211][WiFi6][mt76][Add PID to only report data-frame TX rate]
b15ced26 [MAC80211][WiFi6][hostapd][Fix DFS channel selection issue]
d59133cb [MAC80211][WiFi6][mt76][Fix pse info not correct information]
3921b4b2 [MAC80211][WiFi6][mt76][Fix incomplete QoS-map setting to FW]
4e7690c7 [MAC80211][WiFi6/7][app][Change ATECHANNEL mapping cmd]
eb37af90 [MAC80211][WiFi7][app][Add support for per-packet bw & primary selection]
0ea82adf [MAC80211][WiFi6][core][Fix DFS CAC issue after CSA]
[Release-log]
Change-Id: I9bec97ec1b2e1c49ed43a812a07a5b21fcbb70a6
diff --git a/recipes-wifi/linux-mt76/files/patches/1000-wifi-mt76-mt7915-add-mtk-internal-debug-tools-for-mt.patch b/recipes-wifi/linux-mt76/files/patches/1000-wifi-mt76-mt7915-add-mtk-internal-debug-tools-for-mt.patch
index 646d0bf..2af1061 100644
--- a/recipes-wifi/linux-mt76/files/patches/1000-wifi-mt76-mt7915-add-mtk-internal-debug-tools-for-mt.patch
+++ b/recipes-wifi/linux-mt76/files/patches/1000-wifi-mt76-mt7915-add-mtk-internal-debug-tools-for-mt.patch
@@ -1,7 +1,8 @@
-From 57ca0074490c096cf61f5857ceb233f9a763cf82 Mon Sep 17 00:00:00 2001
+From 3f35505b3bbdfe9e381dbaa1c2450a7e7e461989 Mon Sep 17 00:00:00 2001
From: Shayne Chen <shayne.chen@mediatek.com>
Date: Wed, 22 Jun 2022 10:39:47 +0800
-Subject: [PATCH] wifi: mt76: mt7915: add mtk internal debug tools for mt76
+Subject: [PATCH 01/70] wifi: mt76: mt7915: add mtk internal debug tools for
+ mt76
---
mt76_connac_mcu.h | 6 +
@@ -271,7 +272,7 @@
}
diff --git a/mt7915/main.c b/mt7915/main.c
-index 417002f..4d8cb1c 100644
+index b19b433..aa4b3ae 100644
--- a/mt7915/main.c
+++ b/mt7915/main.c
@@ -73,7 +73,11 @@ int mt7915_run(struct ieee80211_hw *hw)
@@ -481,7 +482,7 @@
#endif
diff --git a/mt7915/mt7915_debug.h b/mt7915/mt7915_debug.h
new file mode 100644
-index 0000000..1ec8de9
+index 0000000..2f9f3da
--- /dev/null
+++ b/mt7915/mt7915_debug.h
@@ -0,0 +1,1442 @@
@@ -850,8 +851,8 @@
+ [DBG_PSE_FREEPG_CNT] = { DBG_INVALID_BASE, 0x380},
+ [DBG_PSE_FREEPG_HEAD_TAIL] = { DBG_INVALID_BASE, 0x384},
+ [DBG_PSE_HIF0_PG_INFO] = { DBG_INVALID_BASE, 0x150},
-+ [DBG_PSE_PG_HIF1_GROUP] = { DBG_INVALID_BASE, 0x154},
-+ [DBG_PSE_HIF1_PG_INFO] = { DBG_INVALID_BASE, 0x160},
++ [DBG_PSE_PG_HIF1_GROUP] = { DBG_INVALID_BASE, 0x114},
++ [DBG_PSE_HIF1_PG_INFO] = { DBG_INVALID_BASE, 0x154},
+ [DBG_PSE_PG_CPU_GROUP] = { DBG_INVALID_BASE, 0x118},
+ [DBG_PSE_CPU_PG_INFO] = { DBG_INVALID_BASE, 0x158},
+ [DBG_PSE_PG_PLE_GROUP] = { DBG_INVALID_BASE, 0x11c},
@@ -863,7 +864,7 @@
+ [DBG_PSE_PG_LMAC2_GROUP] = { DBG_INVALID_BASE, 0x12c},
+ [DBG_PSE_LMAC2_PG_INFO] = { DBG_INVALID_BASE, 0x16c},
+ [DBG_PSE_PG_LMAC3_GROUP] = { DBG_INVALID_BASE, 0x130},
-+ [DBG_PSE_LMAC3_PG_INFO] = { DBG_INVALID_BASE, 0x17c},
++ [DBG_PSE_LMAC3_PG_INFO] = { DBG_INVALID_BASE, 0x170},
+ [DBG_PSE_PG_MDP_GROUP] = { DBG_INVALID_BASE, 0x134},
+ [DBG_PSE_MDP_PG_INFO] = { DBG_INVALID_BASE, 0x174},
+ [DBG_PSE_PG_PLE1_GROUP] = { DBG_INVALID_BASE, 0x120},
@@ -1383,17 +1384,17 @@
+#define MT_DBG_PSE_MDP_PG_INFO_MDP_SRC_CNT_MASK GENMASK(27, 16)
+#define MT_DBG_PSE_MDP_PG_INFO_MDP_RSV_CNT_MASK GENMASK(11, 0)
+
-+#define MT_DBG_PSE_FL_QUE_CTRL_0_ADDR MT_DBG_PLE(0x1b0)
++#define MT_DBG_PSE_FL_QUE_CTRL_0_ADDR MT_DBG_PSE(0x1b0)
+#define MT_DBG_PSE_FL_QUE_CTRL_0_EXECUTE_MASK BIT(31)
+#define MT_DBG_PSE_FL_QUE_CTRL_0_Q_BUF_QID_SHFT 24
+#define MT_DBG_PSE_FL_QUE_CTRL_0_Q_BUF_PID_SHFT 10
+#define MT_DBG_PSE_FL_QUE_CTRL_0_Q_BUF_WLANID_MASK GENMASK(9, 0)
+
-+#define MT_DBG_PSE_FL_QUE_CTRL_2_ADDR MT_DBG_PLE(0x1b8)
++#define MT_DBG_PSE_FL_QUE_CTRL_2_ADDR MT_DBG_PSE(0x1b8)
+#define MT_DBG_PSE_FL_QUE_CTRL_2_QUEUE_TAIL_FID_MASK GENMASK(27, 16)
+#define MT_DBG_PSE_FL_QUE_CTRL_2_QUEUE_HEAD_FID_MASK GENMASK(11, 0)
+
-+#define MT_DBG_PSE_FL_QUE_CTRL_3_ADDR MT_DBG_PLE(0x1bc)
++#define MT_DBG_PSE_FL_QUE_CTRL_3_ADDR MT_DBG_PSE(0x1bc)
+#define MT_DBG_PSE_FL_QUE_CTRL_3_QUEUE_PKT_NUM_MASK GENMASK(11, 0)
+
+
@@ -1929,7 +1930,7 @@
+#endif
diff --git a/mt7915/mtk_debugfs.c b/mt7915/mtk_debugfs.c
new file mode 100644
-index 0000000..665d8bd
+index 0000000..06cedaa
--- /dev/null
+++ b/mt7915/mtk_debugfs.c
@@ -0,0 +1,3750 @@
@@ -3746,8 +3747,8 @@
+ rsv_pg = FIELD_GET(MT_DBG_PSE_LMAC1_PG_INFO_LMAC1_RSV_CNT_MASK, pg_flow_ctrl[11]);
+ used_pg = FIELD_GET(MT_DBG_PSE_LMAC1_PG_INFO_LMAC1_SRC_CNT_MASK, pg_flow_ctrl[11]);
+ seq_printf(s, "\t\tThe used/reserved pages of LMAC1 group=0x%03x/0x%03x\n", used_pg, rsv_pg);
-+ seq_printf(s, "\tReserved page counter of LMAC2 group(0x82068180): 0x%08x\n", pg_flow_ctrl[11]);
-+ seq_printf(s, "\tLMAC2 group page status(0x82068184): 0x%08x\n", pg_flow_ctrl[12]);
++ seq_printf(s, "\tReserved page counter of LMAC2 group(0x82068180): 0x%08x\n", pg_flow_ctrl[12]);
++ seq_printf(s, "\tLMAC2 group page status(0x82068184): 0x%08x\n", pg_flow_ctrl[13]);
+ min_q = FIELD_GET(MT_DBG_PSE_PG_LMAC2_GROUP_LMAC2_MIN_QUOTA_MASK, pg_flow_ctrl[12]);
+ max_q = FIELD_GET(MT_DBG_PSE_PG_LMAC2_GROUP_LMAC2_MAX_QUOTA_MASK, pg_flow_ctrl[12]);
+ seq_printf(s, "\t\tThe max/min quota pages of LMAC2 group=0x%03x/0x%03x\n", max_q, min_q);
@@ -3773,8 +3774,8 @@
+ used_pg = FIELD_GET(MT_DBG_PSE_PLE_PG_INFO_PLE_SRC_CNT_MASK, pg_flow_ctrl[15]);
+ seq_printf(s, "\t\tThe used/reserved pages of PLE group=0x%03x/0x%03x\n", used_pg, rsv_pg);
+
-+ seq_printf(s, "\tReserved page counter of PLE1 group(0x82068168): 0x%08x\n", pg_flow_ctrl[14]);
-+ seq_printf(s, "\tPLE1 group page status(0x8206816c): 0x%08x\n", pg_flow_ctrl[15]);
++ seq_printf(s, "\tReserved page counter of PLE1 group(0x82068168): 0x%08x\n", pg_flow_ctrl[20]);
++ seq_printf(s, "\tPLE1 group page status(0x8206816c): 0x%08x\n", pg_flow_ctrl[21]);
+ min_q = FIELD_GET(MT_DBG_PSE_PG_PLE_GROUP_PLE_MIN_QUOTA_MASK, pg_flow_ctrl[20]);
+ max_q = FIELD_GET(MT_DBG_PSE_PG_PLE_GROUP_PLE_MAX_QUOTA_MASK, pg_flow_ctrl[20]);
+ seq_printf(s, "\t\tThe max/min quota pages of PLE1 group=0x%03x/0x%03x\n", max_q, min_q);
@@ -4859,7 +4860,7 @@
+ struct mt76_dev *mdev = NULL;
+ int i;
+
-+ seq_printf(s, "Version: 2.2.24.5\n");
++ seq_printf(s, "Version: 2.2.24.7\n");
+
+ if (!test_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state))
+ return 0;
@@ -5873,5 +5874,5 @@
return ret;
}
--
-2.18.0
+2.45.2