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filogic
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atf
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fe2243bd92558bce509e55f551e63b3606e850cf
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plat
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nvidia
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tegra
/
common
/
aarch64
cb2dd3a
feat(tegra): implement 'pwr_domain_off_early' handler
by Varun Wadekar
· 1 year, 6 months ago
c9f2953
Tegra: common: fixup the bl31 code size to be copied at reset
by anzhou
· 4 years, 3 months ago
1b3196f
Tegra: remove unused cortex_a53.h
by Varun Wadekar
· 5 years ago
de947b7
Tegra: remove "platform_get_core_pos" function
by Varun Wadekar
· 5 years ago
ad2d5f3
Tegra: assembly version of the 'plat_core_pos_by_mpidr' handler
by Varun Wadekar
· 6 years ago
7f8d848
Tegra: aarch64: calculate core position from one place
by Kalyani Chidambaram
· 6 years ago
c9bd0aa
Tegra: disable CPUACTLR access from lower exception levels
by Varun Wadekar
· 6 years ago
09a22e7
tegra: add support for multi console interface
by Ambroise Vincent
· 5 years ago
fa99b22
Tegra: use 'PLATFORM_MAX_CPUS_PER_CLUSTER' to calculate core position
by Varun Wadekar
· 7 years ago
21c4272
Tegra: remove duplicate code from CPU's power on path
by Varun Wadekar
· 7 years ago
d417cea
Tegra: read-modify-write ACTLR_ELx registers
by Steven Kao
· 7 years ago
6dc0d76
Tegra210: skip the BTB invalidate workaround for B01 SKUs
by Harvey Hsieh
· 8 years ago
fbdfce1
Tegra: support to set the L2 ECC and Parity enable bit
by Harvey Hsieh
· 8 years ago
1eb64a1
Add plat_crash_console_flush to platforms without it
by Antonio Nino Diaz
· 6 years ago
91b11c3
Tegra: Rename CORTEX_A57_ACTLR_EL1 to *CPUACTLR*
by Eleanor Bonnici
· 7 years ago
b4c75e9
Add new alignment parameter to func assembler macro
by Julius Werner
· 7 years ago
e363146
Fix order of remaining platform #includes
by Isla Mitchell
· 7 years ago
1384a16
Unique names for defines in the CPU libraries
by Varun Wadekar
· 7 years ago
fa3cf0b
Use SPDX license identifiers
by dp-arm
· 8 years ago
4e6ae18
Tegra: no need to re-init the same console
by Varun Wadekar
· 8 years ago
2bb9f47
Tegra: replace ASM signed tests with unsigned
by Douglas Raillard
· 8 years ago
69ce101
Tegra: enable ECC/Parity protection for Cortex-A57 CPUs
by Varun Wadekar
· 8 years ago
25e658e
Tegra: include platform_def.h to access UART macros
by Varun Wadekar
· 9 years ago
1ec441e
Tegra: relocate code to BL31_BASE during cold boot
by Varun Wadekar
· 9 years ago
d2014c6
Tegra: init normal/crash console for platforms
by Varun Wadekar
· 9 years ago
39f87d1
Tegra: use ClusterId for calculating core position
by Varun Wadekar
· 9 years ago
b24dea9
Tegra: enable processor retention and L2/CPUECTLR access
by Varun Wadekar
· 9 years ago
e7ae6db
Disable PL011 UART before configuring it
by Juan Castillo
· 9 years ago
a78bb1b
Tegra: remove support for legacy platform APIs
by Varun Wadekar
· 9 years ago
4e9c231
Tegra210: wait for 512 timer ticks before retention entry
by Varun Wadekar
· 9 years ago
d1b6150
Tegra: Introduce config for enabling NS access to L2/CPUECTRL regs
by Varun Wadekar
· 9 years ago
b316e24
Support for NVIDIA's Tegra T210 SoCs
by Varun Wadekar
· 9 years ago